This patch works fine with the rv64ilp32 Linux kernel self-building.
It is tested with binutils together.
Tested-by: Guo Ren
On Sat, Nov 16, 2024 at 12:22 PM Liao Shihua wrote:
>
> RISC-V N32 ABI means using 32-bit ABI on 64-bit ISA, the discussion in
> https://github.com/riscv-non-
On Mon, May 22, 2023 at 10:51 AM Guo Ren wrote:
>
> On Fri, May 19, 2023 at 3:35 PM Kito Cheng wrote:
> >
> > I am concern about we didn't define POINTERS_EXTEND_UNSIGNED here, and
> > also concern about the code model stuffs, I know currently Guo-Ren's
>
(void)
> >&& riscv_abi != ABI_LP64 && riscv_abi != ABI_ILP32E)
> > error ("z*inx requires ABI ilp32, ilp32e or lp64");
> >
> > - /* We do not yet support ILP32 on RV64. */
> > - if (BITS_PER_WORD != POINTER_SIZE)
> > -error ("ABI requires %<-march=rv%d%>", POINTER_SIZE);
>
> It seems to also make -march=rv32g -mabi=lp64 become acceptable?
>
> >
--
Best Regards
Guo Ren
Hi Cooper,
Great Job!
Tested-by: Guo Ren
Here is kernel related patch with tested result:
https://lore.kernel.org/linux-riscv/1594279697-72511-2-git-send-email-guo...@kernel.org/T/#u
Best Regards
Guo Ren
On 2020/7/8 上午10:51, cooper wrote:
The linux kernel guys are discussing about
