[Patch 5/5] ARM 64 bit sync atomic operations [V3]

Test support for ARM 64bit sync intrinsics. gcc/testsuite/ * gcc.dg/di-longlong64-sync-1.c: New test. * gcc.dg/di-sync-multithread.c: New test. * gcc.target/arm/di-longlong64-sync-withhelpers.c: New test. * gcc.target/arm/di-longlong64-sync-withldrexd.c: Ne

[Patch 4/5] ARM 64 bit sync atomic operations [V3]

Add ARM 64bit sync helpers for use on older ARMs. Based on 32bit versions but with check for sufficiently new kernel version. gcc/ * config/arm/linux-atomic-64bit.c: New (based on linux-atomic.c) * config/arm/linux-atomic.c: Change comment to point to 64bit version

[Patch 3/5] ARM 64 bit sync atomic operations [V3]

Add support for ARM 64bit sync intrinsics. gcc/ * arm.c (arm_output_ldrex): Support ldrexd. (arm_output_strex): Support strexd. (arm_output_it): New helper to output it in Thumb2 mode only. (arm_output_sync_loop): Support DI mode,

[Patch 2/5] ARM 64 bit sync atomic operations [V3]

Micahel K. Edwards points out in PR/48126 that the sync is in the wrong place relative to the branch target of the compare, since the load could float up beyond the ldrex. PR target/48126 * config/arm/arm.c (arm_output_sync_loop): Move label before

[Patch 1/5] ARM 64 bit sync atomic operations [V3]

gcc/ * config/arm/arm.c (TARGET_HAVE_DMB_MCR): MCR Not available in Thumb1 diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 993e3a0..f6f1da7 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -288,7 +288,8 @@ extern void (*arm_lang_output_object_attributes_

[Patch 0/5] ARM 64 bit sync atomic operations [V3]

Hi, This is V3 of a series of 5 patches relating to ARM atomic operations; they incorporate most of the feedback from V2. Note the patch numbering/ ordering is different from v2; the two simple patches are now first. 1) Correct the definition of TARGET_HAVE_DMB_MCR so that it doesn't pr

[Patch 4/4] ARM 64 bit sync atomic operations [V2]

gcc/ * config/arm/arm.c (TARGET_HAVE_DMB_MCR) MCR Not available in Thumb1 but is available on armv6 diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 0d419d5..146b9ad 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -285,7 +285,8 @@ extern voi

[Patch 3/4] ARM 64 bit sync atomic operations [V2]

Micahel K. Edwards points out in PR/48126 that the sync is in the wrong place relative to the branch target of the compare, since the load could float up beyond the ldrex. gcc/ * config/arm/arm.c (arm_output_sync_loop): Move label before barier,

[Patch 2/4] ARM 64 bit sync atomic operations [V2]

Add ARM 64bit sync helpers for use on older ARMs. Based on 32bit versions but with check for sufficiently new kernel version. gcc/ * config/arm/linux-atomic-64bit.c: New (based on linux-atomic.c) * config/arm/linux-atomic.c: Change comment to point to 64bit ve

[Patch 0/4] ARM 64 bit sync atomic operations [V2]

Hi, This is V2 of a series of 4 patches relating to ARM atomic operations; they incorporate most of the feedback from V1 - thanks Ramana, Richard and Joseph for comments. 1) Provide 64 bit atomic operations using the new ldrexd/strexd in ARMv6k and above. 2) Provide fallbacks so that w

[Patch 3/3] ARM 64 bit atomic operations

As per pr/48126 Michael Edwards spotted that in the case where the compare fails in the cmpxchg, the barrier at the end wasn't taken theoretically allowing a following load to float up above the load value compared. diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 057f9ba..39057d2 1

[Patch 2/3] ARM 64 bit atomic operations

Provide fallbacks for 64bit atomics that call Linux commpage helpers when compiling for older machines. The code is based on the existing linux-atomic.c for other sizes, however it performs an init time check that the kernel is new enough to provide the helper. This relies on Nicolas P

[Patch 0/3] ARM 64 bit atomic operations

Hi, This is a series of 3 patches relating to ARM atomic operations. 1) Provide 64 bit atomic operations using the new ldrexd/strexd in ARMv6k and above. 2) Provide fallbacks so that when compiled for earlier CPUs a Linux kernel asssist is called (as per 32bit and smaller ops) 3)