LGTM
thanks
Carrot
On Thu, Jan 28, 2016 at 11:53 AM, Han Shen wrote:
> Backport trunk:r232727 fix for PR/69403 - wrong
> thumb2_ior_scc_strict_it insn pattern.
>
> Note this only affect armv7-a tuned for armv8 arch, tested / booted
> affected ChromeOS book.
>
> Ok for google/gcc-4_9 branch?
>
>
Hi
In aarch64 backend of google/4.9 branch, the split pattern for insn
aarch64_lshr_sisd_or_int_3 destroys one of the source operands,
causes the later usage of the operand get a wrong value (google bug
17907351).
The bug has been fixed in trunk by r220860. This patch backports it to
google/4.9 b
On Tue, Jun 9, 2015 at 11:43 PM, Richard Sandiford
wrote:
> Carrot Wei writes:
>> Index: simplify-got.c
>> ===
>> --- simplify-got.c (revision 224174)
>> +++ simplify-got.c (working copy)
>> @@ -1
Hi
I forgot to notify df framework when I removed an insn, it caused df
verification failure described in google bug b/16155462.
The following patch passed regression test on arm qemu in both thumb
and arm modes.
OK for google 4.9 branch?
Index: simplify-got.c
==
Hi
The more strict devirtualization condition in this patch helps to fix
google bug b/19872411.
Bootstraped and regression tested on x86-64.
OK for google 4.9 branch?
patch
Description: Binary data
This patch fixes google internal bug b/19277289. It can only be
reproduced in google 4.9 branch.
In function param_change_prob, there is following function call
walk_aliased_vdefs (&refd, gimple_vuse (stmt), record_modified, &info, NULL);
If the source code is compiled with optimization, but cfu
Yes, it has been long time since last merge, so it is good idea to do
another merge.
On Tue, Dec 16, 2014 at 11:32 AM, Xinliang David Li wrote:
> The fix is already in upstream gcc-4.9 branch? If yes, we just need a merge.
>
> David
>
> On Tue, Dec 16, 2014 at 11:30 AM, Carrot We
Hi
In Google application we hit the same problem as
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63341, so we also need
the patch r215585 for Google/4.9 branch.
It passed following tests:
bootstrap and regression test on x86-64.
regression test on ppc.
Google reference 18687126.
OK for Google/4
DR_MISALIGNMENT.
2014-10-22 Guozhi Wei
PR tree-optimization/63530
gcc.dg/vect/pr63530.c: New testcase.
On Tue, Oct 21, 2014 at 1:04 AM, Richard Biener
wrote:
> On Mon, Oct 20, 2014 at 10:10 PM, Carrot Wei wrote:
>> Hi Richard
>>
>> An arm testcase that can reproduce
20, 2014 at 1:19 AM, Richard Biener
wrote:
> On Fri, Oct 17, 2014 at 7:58 PM, Carrot Wei wrote:
>
> I miss a testcase. I also miss a comment before this code explaining
> why DR_MISALIGNMENT if not -1 is valid and why it is not valid if
DR_MISALIGNMENT (dr) == -1 means some unk
Hi
In current vectorization pass, when a new vector pointer is created,
its alignment is not set correctly. We should use DR_MISALIGNMENT (dr)
since only this alignment is adjusted when loop peeling or multi
version is occurred.
This patch passed following tests:
x86_64 bootstrap.
x86_64 regressi
LGTM.
Your description could be more detail, such as which tests on which target.
On Tue, Oct 7, 2014 at 2:06 PM, Sterling Augustine
wrote:
> The enclosed patch for google 4.9 is a backport of r210828 from
> trunk.
>
> googleref:b/14623977
>
> The given tests now pass when run by hand, but timeou
Ping.
On Mon, Sep 22, 2014 at 11:41 AM, Carrot Wei wrote:
> Hi
>
> The extended register width in add/adds/sub/subs/cmp instructions is
> not always the same as target register, it depends on both target
> register width and extension type. But in current implementation the
>
Hi
The extended register width in add/adds/sub/subs/cmp instructions is
not always the same as target register, it depends on both target
register width and extension type. But in current implementation the
extended register width is always the same as target register. We have
noticed it can gener
On 20 August 2014 20:51, Carrot Wei wrote:
>> Good suggestion. Add the testcase.
>>
>> thanks
>> Guozhi Wei
>>
>> 2014-08-20 Guozhi Wei
>>
>> PR target/62040
>
AArch64 maintainers, could you help to review following patches?
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg01966.html
https://gcc.gnu.org/ml/gcc-patches/2014-08/msg02060.html
thanks
Guozhi Wei
On Wed, Aug 20, 2014 at 12:51 PM, Carrot Wei wrote:
> Good suggestion. Add the testc
Hi
In insn pattern "*andim_ashift_bfiz", if the operands[2] is larger than
the size of register, gcc may generate invalid assembler code. If operands[2]
is larger than the size of the underlying type of INTVAL, the following insn
condition may also be undefined.
"exact_log2 ((INTVAL (operands[3])
wrote:
> Hi Carrot,
>
> cc'ing the aarch64 maintainers...
>
>
> On 20/08/14 00:43, Carrot Wei wrote:
>>
>> Hi
>>
>> Current AArch64 backend can generate rtl expressions like
>> (vec_duplicate:DI (const_int 0 [0])), which causes ICE in
>> simplify_
Hi
Current AArch64 backend can generate rtl expressions like
(vec_duplicate:DI (const_int 0 [0])), which causes ICE in
simplify_const_unary_operation because vec_duplicate should generate
vector mode only.
As suggested by Andrew in the bug entry, I split the original insn
patterns to avoid scalar
Thank you for the comment, I've updated the patch.
OK for trunk and 4.9 branch?
2014-08-08 Guozhi Wei
* config/rs6000/rs6000.md (*movdi_internal64): Add a new constraint.
On Wed, Aug 6, 2014 at 7:28 PM, Segher Boessenkool
wrote:
> On Wed, Aug 06, 2014 at 04:48:26PM -0700
Hi
When compiling an internal application I got an ICE
due to an invalid instruction generated by reload.
Before IRA, I have following insns:
(insn 139 136 581 10 (set (reg:DI 567)
(const_int 0 [0])) ./strings/stringpiece.h:205 discrim 1 520
{*movdi_internal64}
(expr_list:REG_EQUIV
On 20 May 2014 18:37, Carrot Wei wrote:
>> >> Hi James
>> >>
>> >> Thank you for pointing this out. In the new patch I removed the
>> >> modification of vqdmulh_n_s32 and vqdmulhq_n_s32.
>> >>
>> >> Passed dejagnu
last operand's constraint.
(vqdmulhq_n_s16): Likewise.
On Mon, May 19, 2014 at 11:50 PM, James Greenhalgh
wrote:
> On Tue, May 20, 2014 at 07:18:40AM +0100, Carrot Wei wrote:
>> Hi
>
> Hi,
>
>> The last operand of instruction sqdmulh can only be low fp r
Hi
The last operand of instruction sqdmulh can only be low fp registers,
so we should use constraint "x". But the intrinsic functions use "w".
This patch fixed the constrains in these intrinsics.
Passed dejagnu test on aarch64 qemu. OK for trunk, 4.9 and 4.8?
thanks
Guozhi Wei
2014-05-19 Guoz
Hi
The following patch fixes an obvious wrong index used to access the
dense array. The patch has passed the bootstrap and regression tests
on x86-64.
OK for trunk?
thanks
Carrot
2014-02-23 Guozhi Wei
* sparseset.h (sparseset_pop): Fix the wrong index.
Index: sparseset.h
OK for google/gcc-4_7.
On Wed, Jun 5, 2013 at 2:45 PM, Jing Yu wrote:
> Add new validator manifest xfail file for native powerpc64 toolchain.
> Ok for google/gcc-4_7?
>
> Tested:
> ./validate_failures.py
> --manifest=powerpc64-grtev3-linux-gnu-native.xfail --
> results="gcc/gcc.sum g++/g++.sum gf
Hi
Since b/8397853 has been fixed, the related tests now passed, so we can remove
them from powerpc64-grtev3-linux-gnu.xfail now.
Tested with ./buildit --run_tests.
OK for google 4.7 branch?
thanks
Carrot
2013-05-29 Guozhi Wei
* powerpc64-grtev3-linux-gnu.xfail (*** g++): Remove passed re
OK for google branches.
On Thu, May 9, 2013 at 1:40 PM, Han Shen(沈涵) wrote:
> Hi, I'm to backport trunk patch @198547 for pr target/56732 to google
> branch google/gcc-4_8.
>
> This patch fixes arm ICE.
>
> Ok for google/gcc-4_8?
>
> [patch attached]
>
> H.
Hi
In function dw2_output_indirect_constant_1 a new var decl is created. Only
When the variable is not PUBLIC it is allocated static storage. Does anybody
know why the variable is not allocated static storage by marking TREE_STATIC
when it is PUBLIC?
The following patch marks the STATIC flag in a
by lipo, before that
these functions can't call into varpool_node. So could it because the original
implementation of these functions didn't consider the restrictions of
varpool_node
since it couldn't be called from there?
thanks
Carrot
> David
>
> On Thu, May 9, 2013 at 1
This patch fixed google bug entry 6124850.
The usage of varpool_node has some restrictions on the corresponding var decl.
In LIPO mode function notice_global_symbol may call varpool_node with a decl
that doesn't satisfy these restrictions since the function notice_global_symbol
can be directly or
OK for google branch. Should it also be in gcc4.8 branch?
thanks
Carrot
On Tue, May 7, 2013 at 12:01 PM, Han Shen(沈涵) wrote:
> Backport trunk@198344 - another fix to PR rtl-optimization/56847 - to
> google/gcc-4_8 branch.
>
> The first fix was trunk@198101 -
> http://gcc.gnu.org/ml/gcc-patches/2
,
>
> David
>
> On Thu, May 2, 2013 at 11:06 AM, Carrot Wei wrote:
>> This patch fixes google bug 8397853 and targets google 4.7 branch.
>>
>> In LIPO mode, when coverage_obj_init is called, cgraph_state is
>> CGRAPH_STATE_FINISHED. The variable gcov_info_var is
commited as 198591.
On Fri, May 3, 2013 at 11:51 AM, Xinliang David Li wrote:
> Please do what Richard suggested. gcov_info_type can be obtained from
> gcov_info_var decl.
>
> David
>
>
> On Fri, May 3, 2013 at 11:31 AM, Carrot Wei wrote:
>> On Fri, May 3, 2013
On Fri, May 3, 2013 at 1:03 AM, Richard Biener
wrote:
> On Thu, May 2, 2013 at 10:41 PM, Carrot Wei wrote:
>> This patch outline the construction of gcov constructor from
>> coverage_obj_init
>> as a separate function build_init_ctor.
>>
>> It passed bootst
This patch outline the construction of gcov constructor from coverage_obj_init
as a separate function build_init_ctor.
It passed bootstrap and regression test on x86-64.
OK for trunk and google 4.7 branch?
thanks
Carrot
2013-05-02 Guozhi Wei
* coverage.c (gcov_info_type): New globa
This patch fixes google bug 8397853 and targets google 4.7 branch.
In LIPO mode, when coverage_obj_init is called, cgraph_state is
CGRAPH_STATE_FINISHED. The variable gcov_info_var is created but not
initialized. When cgraph_build_static_cdtor is called, the new function and
variables are expanded
Hi Jakub
I have run it on 4.6, it passes the following testing:
x86-64 bootstrap
x86-64 regression test
regression test on arm qemu
Is it OK for gcc4.6?
Ahmad, is it OK for google/gcc-4_6/ and google/gcc-4_6-mobile ?
thanks
Carrot
On Wed, Sep 12, 2012 at 2:01 PM, Carrot Wei wrote:
>
Hi Jakub
The same problem also affects gcc4.6,
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54398. Could this be
ported to 4.6 branch?
thanks
Carrot
On Mon, Feb 13, 2012 at 11:54 AM, Jakub Jelinek wrote:
>
> On Wed, Jan 04, 2012 at 05:21:38PM +, Marcus Shawcroft wrote:
> > Alias analysis by
OK for google/gcc-4_7.
thanks
Carrot
On Tue, Aug 14, 2012 at 7:14 AM, Han Shen(沈涵) wrote:
>
> Hi Carrot, could you take a look at this patch? Thanks!
>
> The modification is in upstream trunk patch revision - 186859.
>
> The same patch has been back ported to google/gcc-4_6
> (http://codereview.
On Wed, Jul 18, 2012 at 5:39 PM, Ramana Radhakrishnan
wrote:
> On 18 July 2012 09:20, Carrot Wei wrote:
>> On Tue, Jul 17, 2012 at 9:47 PM, Ramana Radhakrishnan
>> wrote:
>>> Carrot,
>>>
>>> Sorry about the delayed response.
>>>
>>>
On Tue, Jul 17, 2012 at 9:47 PM, Ramana Radhakrishnan
wrote:
> Carrot,
>
> Sorry about the delayed response.
>
> On 3 July 2012 12:28, Carrot Wei wrote:
>> On Thu, Jun 28, 2012 at 12:14 AM, Ramana Radhakrishnan
>> wrote:
>>> On 28 May 2012 11:08, Carrot Wei
Hi
The following patches implemented the optimizations suggested by
PR53189, optimizations of 64bit logic operation with constant. Could
any maintainer help to review it?
http://gcc.gnu.org/ml/gcc-patches/2012-07/msg00087.html
http://gcc.gnu.org/ml/gcc-patches/2012-07/msg00169.html
http://gcc.gnu
]);
+operands[4] = gen_highpart (SImode, operands[1]);
+operands[1] = gen_lowpart (SImode, operands[1]);
+operands[5] = gen_highpart_mode (SImode, DImode, operands[2]);
+operands[2] = gen_lowpart (SImode, operands[2]);
+ }"
[(set_attr "length" "8")
(se
] = gen_highpart (SImode, operands[1]);
+operands[1] = gen_lowpart (SImode, operands[1]);
+operands[5] = gen_highpart_mode (SImode, DImode, operands[2]);
+ operands[2] = gen_lowpart (SImode, operands[2]);
+ }"
[(set_attr "length" "8")
(set_attr "predicable" "yes&
On Thu, Jun 28, 2012 at 12:14 AM, Ramana Radhakrishnan
wrote:
> On 28 May 2012 11:08, Carrot Wei wrote:
>> Hi
>>
>> This is the second part of the patches that deals with 64bit and. It directly
>> extends the patterns anddi3, anddi3_insn and anddi3_neon to handle
On Fri, Jun 29, 2012 at 9:57 PM, Ramana Radhakrishnan
wrote:
>
> On 29 June 2012 12:23, Carrot Wei wrote:
> > Hi
> >
> > So the following is updated patch. Tested on qemu with arm/thumb modes
>
> Assuming this testing was with and without neon ? Because the pa
Hi
So the following is updated patch. Tested on qemu with arm/thumb modes
without regression.
thanks
Carrot
2012-06-29 Wei Guozhi
PR target/53447
* gcc.target/arm/pr53447-1.c: New testcase.
* gcc.target/arm/pr53447-2.c: New testcase.
2012-06-29 Wei Guozhi
On Thu, Jun 28, 2012 at 5:37 PM, Ramana Radhakrishnan
wrote:
> On 28 June 2012 10:03, Carrot Wei wrote:
>> Hi Ramana
>>
>> Thanks for the review, please see my inlined comments.
>>
>> On Thu, Jun 28, 2012 at 12:02 AM, Ramana Radhakrishnan
>> wrote:
&
Hi Ramana
Thanks for the review, please see my inlined comments.
On Thu, Jun 28, 2012 at 12:02 AM, Ramana Radhakrishnan
wrote:
>
> On 8 June 2012 10:12, Carrot Wei wrote:
> > Hi
> >
> > In rtl expression, substract a constant c is expressed as add a value -c,
> &g
ping^2
thanks
Carrot
On Mon, Jun 18, 2012 at 6:17 PM, Carrot Wei wrote:
> Hi
>
> Could ARM maintainers review following patches?
>
> http://gcc.gnu.org/ml/gcc-patches/2012-06/msg00497.html
> 64bit add/sub constants.
>
> http://gcc.gnu.org/ml/gcc-patches/2012-05/msg018
duplicated the alternatives in normal cases.
thanks
Carrot
On Wed, Jun 20, 2012 at 9:58 AM, Michael Hope wrote:
> On 18 June 2012 22:17, Carrot Wei wrote:
>> Hi
>>
>> Could ARM maintainers review following patches?
>>
>> http://gcc.gnu.org/ml/gcc-patches/2012-06/msg0049
Hi
Could ARM maintainers review following patches?
http://gcc.gnu.org/ml/gcc-patches/2012-06/msg00497.html
64bit add/sub constants.
http://gcc.gnu.org/ml/gcc-patches/2012-05/msg01834.html
64bit and with constants.
http://gcc.gnu.org/ml/gcc-patches/2012-05/msg01974.html
64bit xor with constants.
p; 0x));
+ }
+else
+ {
+ operands[5] = gen_highpart (SImode, operands[2]);
+ operands[2] = gen_lowpart (SImode, operands[2]);
+ }
}"
[(set_attr "conds" "clob")
(set_attr "length" "8")]
@@ -1122,6 +1150,25 @@
&& !(TARGET_HARD_FLOAT && TARGET_MAVERICK) && !TARGET_NEON"
"#"
@@ -630,8 +641,17 @@
operands[0] = gen_lowpart (SImode, operands[0]);
operands[4] = gen_highpart (SImode, operands[1]);
operands[1] = gen_lowpart (SImode, operands[1]);
-operands[5
Hi
This is the fourth part of the patches that deals with 64bit ior. It directly
extends the patterns iordi3, iordi3_insn and iordi3_neon to handle 64bit
constant operands.
Tested on arm qemu without regression.
OK for trunk?
thanks
Carrot
2012-06-05 Wei Guozhi
PR target/53447
amp;r,&r,&r")
+ (plus:DI (match_operand:DI 1 "s_register_operand" "%0, 0, r, 0, r")
+(match_operand:DI 2 "reg_or_int_operand" "r, 0, r, Dd,Dd")))
(clobber (reg:CC CC_REGNUM))]
"TARGET_32BIT && !(TARGET_HARD_FLOA
Hi
This is the third part of the patches that deals with 64bit xor. It extends
the patterns xordi3, xordi3_insn and xordi3_neon to handle 64bit constant
operands.
Tested on arm qemu without regression.
OK for trunk?
thanks
Carrot
2012-05-30 Wei Guozhi
PR target/53447
* gcc.
Hi
This is the second part of the patches that deals with 64bit and. It directly
extends the patterns anddi3, anddi3_insn and anddi3_neon to handle 64bit
constant operands.
Tested on arm qemu without regression.
OK for trunk?
thanks
Carrot
2012-05-28 Wei Guozhi
PR target/53447
Hi,
As described in PR53447, many 64bit ALU operations with constant can be
optimized to use corresponding 32bit instructions with immediate operands.
This is the first part of the patches that deals with 64bit add. It directly
extends the patterns adddi3, arm_adddi3 and adddi3_neon to handle con
OK for Google branches.
On Mon, May 7, 2012 at 12:21 PM, Jing Yu wrote:
> I would like to port this patch to google/gcc-4_6 and also
> google/gcc-4_6_2-mobile.
>
> From reading the patch, it does not change config for non-Android target.
>
> bootstrap,crosstool tests finished successfully on goog
On Fri, Feb 10, 2012 at 2:13 PM, Jing Yu wrote:
> On Thu, Feb 9, 2012 at 12:54 AM, Carrot Wei wrote:
>> Hi Richard and Jakub
>>
>> Since 4.6 contains the same bug, I would like to back port it to 4.6
>> branch. Could you approve it for 4.6?
>>
>> Jing
Hi Richard and Jakub
Since 4.6 contains the same bug, I would like to back port it to 4.6
branch. Could you approve it for 4.6?
Jing and Doug
Could you approve it for google/gcc-4_6-mobile branch?
thanks
Carrot
On Mon, Feb 6, 2012 at 9:14 PM, Richard Guenther
wrote:
> On Mon, Feb 6, 2012 at 2
Hi Jakub
Instead of disabling the sibcall, it could also be a valid tail call
optimization by moving the str after ldmia, and change the used
register(It should be handled by RA automatically), as following
...
add r4, r1, r4, lsl #2
ldmia r2, {r1, r2}
On Fri, Dec 9, 2011 at 4:56 PM, Richard Sandiford
wrote:
> Carrot Wei writes:
>> Since it also affects 4.6 branch, can this and r176270 also be ported
>> to gcc4.6?
>
> Always worth asking, but in this case, I'm not sure it's appropriate.
> The patch is pretty i
Since it also affects 4.6 branch, can this and r176270 also be ported to gcc4.6?
thanks
Carrot
On Wed, Jul 13, 2011 at 12:34 AM, Richard Sandiford
wrote:
> PR 48183 is caused by the fact that we don't really support integers
> (or least integer constants) wider than 2*HOST_BITS_PER_WIDE_INT:
>
>
Hi Tom
What's the behavior of your patch to the following case
typedef int int_unaligned __attribute__((aligned(1)));
int foo (int_unaligned *p)
{
return *p;
}
thanks
Carrot
On Tue, Sep 20, 2011 at 7:13 PM, Tom de Vries wrote:
> Hi Richard,
>
> I have a patch for PR43814. It introduces an op
Hi
We should not combine insns cross volatile insns. Combine.c already does this
check, postreload should also do so.
Bootstrapped and regtested on x86_64-unknown-linux-gnu.
Regtested on arm qemu.
thanks
Carrot
ChangeLog:
2011-09-19 Wei Guozhi
PR 49452
* postreload.c (reloa
ping
On Mon, Aug 8, 2011 at 11:00 AM, Guozhi Wei wrote:
>
> Hi
>
> I want to backport r174965 from trunk to google/gcc-4_6, which fixed vect-72.c
> failure in target arm, as described in
> http://gcc.gnu.org/ml/gcc-patches/2011-06/msg00927.html
>
> Tested with buildit and regression test on arm q
Ping
On Wed, Jul 20, 2011 at 4:33 PM, Carrot Wei wrote:
> Oops, the ChangeLog should be
>
> 2011-07-20 Wei Guozhi
>
> * gcc.target/arm/vfp-1.c (test_ldst): Adjust negative offset.
>
>
> thanks
> Carrot
>
> On Wed, Jul 20, 2011 at 4:30 PM, Carrot
(lhs, 0), next_code);
thanks a lot.
Carrot
On Thu, Jul 28, 2011 at 4:47 PM, Jakub Jelinek wrote:
> On Thu, Jul 28, 2011 at 04:40:53PM +0800, Carrot Wei wrote:
>> ChangeLog:
>> 2011-07-28 Wei Guozhi
>>
>> PR rtl-optimization/49799
>> * pr4
+}
On Thu, Jul 28, 2011 at 4:04 PM, Jakub Jelinek wrote:
> On Thu, Jul 28, 2011 at 03:38:07PM +0800, Carrot Wei wrote:
>> OK for trunk and 4.6?
>>
>> ChangeLog:
>> 2011-07-28 Wei Guozhi
>>
>> PR rtl-optimization/49799
>> * comb
Hi
In function combine.c:make_compound_operation, it tries to transforms the
expression
(ashiftrt (ashift foo C1) C2) with C2 >= C1
into SIGN_EXTRACT.
It works pretty well in usual cases. But for the test case in PR49799, there is
an expression
(X << (tmp-1)) >> 16
tmp is an uninitializ
Oops, the ChangeLog should be
2011-07-20 Wei Guozhi
* gcc.target/arm/vfp-1.c (test_ldst): Adjust negative offset.
thanks
Carrot
On Wed, Jul 20, 2011 at 4:30 PM, Carrot Wei wrote:
> Hi
>
> The patch r169271 conservatively limits the offset of fp memory access to
> (-256
Hi
The patch r169271 conservatively limits the offset of fp memory access to
(-256..1024), but didn't adjust the related test case, so vfp-1.c fails in
thumb2 mode after the patch. This patch modifies test case vfp-1.c accordingly.
Tested with
make check-gcc RUNTESTFLAGS="--target_board=arm-sim/t
Hi Diego
The previous patch was done with svn merge.
This new version is done with svnmerge.py. Again tested with
make check-g++ RUNTESTFLAGS="--target_board=arm-sim/thumb/arch=armv7-a
dg.exp=anon-ns1.C"
make check-g++ RUNTESTFLAGS="dg.exp=anon-ns1.C"
BTW, there are some unexpected property cha
Thanks for the review.
Richard, what's the situation of unaligned memory access and how does
it conflict with this patch?
thanks
Carrot
On Tue, Jun 7, 2011 at 6:42 PM, Nick Clifton wrote:
> Hi Carrot,
>
>> 2011-05-06 Guozhi Wei
>>
>> PR target/47855
>> * config/arm/thumb2.md (t
It also breaks arm backend.
../trunk/configure '--build=x86_64-build_pc-linux-gnu'
'--host=x86_64-build_pc-linux-gnu'
'--target=arm-unknown-linux-gnueabi'
'--with-sysroot=/home/carrot/x-tools/arm-unknown-linux-gnueabi/arm-unknown-linux-gnueabi/sys-root'
'--disable-multilib' '--with-float=soft' '--
OK.
thanks
Carrot
On Tue, Jun 7, 2011 at 1:09 AM, wrote:
> The trunk version has been approved and committed as r174710. Backport
> it to google/main. The google/main version has the same logic but is
> slightly different since trunk has a different code structure here. OK
> for google/main?
>
Hi ARM maintainers
Could you help to review the following patches?
thanks
Carrot
On Tue, May 24, 2011 at 9:31 AM, Carrot Wei wrote:
> Hi
>
> http://gcc.gnu.org/ml/gcc-patches/2011-03/msg01973.html
> Use ldrd and strd to access two consecutive words
>
> http://gcc.gnu.org/ml/g
OK for google/main.
thanks
Carrot
On Thu, Jun 2, 2011 at 12:51 PM, Jing Yu wrote:
> http://gcc.gnu.org/ml/gcc-patches/2010-10/msg00134.html
> Backport r174549 to fix three testcases that are specific to ARM mode
> and therefore should be skipped when compiling for thumb.
>
> Thanks,
> Jing
>
> 2
Hi H.J.
This patch is also important to ChromeOS toolchain. Could you also try
to update and test it for google/main?
thanks
Carrot
On Wed, May 18, 2011 at 11:57 PM, H.J. Lu wrote:
> On Tue, Apr 26, 2011 at 6:05 AM, H.J. Lu wrote:
>> On Thu, Mar 31, 2011 at 7:57 AM, H.J. Lu wrote:
>>> On Mon,
Hi
I've tested the
#ifndef __ANDROID__
on arm qemu without regression. And also built Android toolchain
without this error.
thanks
Carrot
2011-05-26 Jing Yu
* ChangeLog.google-main: New file.
* getpagesize.c(getpagesize): Disable it for bionic.
Index: ChangeLog.google-ma
Hi
http://gcc.gnu.org/ml/gcc-patches/2011-03/msg01973.html
Use ldrd and strd to access two consecutive words
http://gcc.gnu.org/ml/gcc-patches/2011-05/msg00490.html
Compute attr length for thumb2 insns
http://gcc.gnu.org/ml/gcc-patches/2011-05/msg01092.html
Replace 32 bit instructions with 16 bi
On Fri, Dec 17, 2010 at 8:18 PM, Richard Earnshaw wrote:
>
> On Thu, 2010-12-16 at 14:45 -0800, Carrot Wei wrote:
>> Hi
>>
>> Compile the following c code with options -march=armv7-a -mthumb -Os
>>
>> int foo (int s)
>> {
>> return s ==
Hi
http://gcc.gnu.org/ml/gcc-patches/2011-03/msg01973.html
Use ldrd and strd to access two consecutive words
http://gcc.gnu.org/ml/gcc-patches/2011-05/msg00490.html
Compute attr length for thumb2 insns
thanks
Carrot
On Thu, May 5, 2011 at 5:42 PM, Richard Earnshaw wrote:
>
> On Thu, 2011-05-05 at 14:51 +0800, Guozhi Wei wrote:
> > Hi
> >
> > This is the third part of the fixing for
> >
> > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47855
> >
> > This patch contains the length computation/refinement for insn
On Fri, Apr 29, 2011 at 11:17 AM, Carrot Wei wrote:
> On Thu, Apr 28, 2011 at 10:08 PM, wrote:
>> I only have some stylistic comments for this patch. The new pass looks
>> OK to me, but I do not know this area well enough to do a good review.
>>
>> In your ChangeLog
Yes, after porting it to google/main.
Carrot
On Thu, Apr 28, 2011 at 10:26 PM, Diego Novillo wrote:
> Will you be proposing this patch for trunk as well?
>
>
> Diego.
>
On Thu, Apr 28, 2011 at 10:08 PM, wrote:
> I only have some stylistic comments for this patch. The new pass looks
> OK to me, but I do not know this area well enough to do a good review.
>
> In your ChangeLog entries, please remove the directory prefix from the
> file names.
>
done.
>
> http://
I will try this method for trunk later.
thanks
Carrot
On Wed, Apr 20, 2011 at 4:48 PM, Richard Earnshaw wrote:
>
> On Wed, 2011-04-20 at 16:26 +0800, Carrot Wei wrote:
>> On Tue, Apr 19, 2011 at 8:55 PM, Richard Earnshaw wrote:
>> >
>> > On Tue, 2011-04-19 at
On Tue, Apr 19, 2011 at 8:55 PM, Richard Earnshaw wrote:
>
> On Tue, 2011-04-19 at 17:41 +0800, Guozhi Wei wrote:
>> Reload pass tries to determine the stack frame, so it needs to check the
>> push/pop lr optimization opportunity. One of the criteria is if there is any
>> far jump inside the funct
On Tue, Apr 19, 2011 at 5:57 PM, Richard Guenther
wrote:
> On Tue, Apr 19, 2011 at 11:41 AM, Guozhi Wei wrote:
>> Reload pass tries to determine the stack frame, so it needs to check the
>> push/pop lr optimization opportunity. One of the criteria is if there is any
>> far jump inside the functio
On Mon, Apr 18, 2011 at 9:33 PM, Richard Earnshaw wrote:
>
> On Sat, 2011-04-16 at 12:34 +0800, Carrot Wei wrote:
>> Hi Richard
>>
>> Thank you for the detailed explanation. It sounds like an inherent
>> difficulty of rtl passes. Then the only opportunity is ldrb/str
-14 at 21:19 +0800, Carrot Wei wrote:
>> On Fri, Apr 8, 2011 at 6:51 PM, Ramana Radhakrishnan
>> wrote:
>> > On 08/04/11 10:57, Carrot Wei wrote:
>> >>
>> >> Hi
>> >>
>> >> This is the second part of the fixing for
>>
On Fri, Apr 8, 2011 at 6:51 PM, Ramana Radhakrishnan
wrote:
> On 08/04/11 10:57, Carrot Wei wrote:
>>
>> Hi
>>
>> This is the second part of the fixing for
>>
>> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47855
>>
>> This patc
Hi
This is the second part of the fixing for
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47855
This patch contains the length computation for insn patterns "*arm_movqi_insn"
and "*arm_addsi3". Since the alternatives and encodings are much more complex,
the attribute length is computed in separat
Sorry, which pattern in thumb2.md?
thanks
Carrot
On Fri, Apr 8, 2011 at 4:35 PM, Ramana Radhakrishnan
wrote:
> On 08/04/11 08:36, Carrot Wei wrote:
>>
>> Hi
>>
>> This patch moves the length computation of push_multi into a C
>> function to avoid the usage of
!hi_reg;}")
- (const_int 0)))
- (const_int 2)
- (const_int 4)))]
+ (symbol_ref "arm_attr_length_push_multi (operands[2], operands[1])"))]
)
(define_insn "stack_tie"
On Thu, Apr 7, 2011 at 7:30 PM, Ramana Radhakrish
On Thu, Apr 7, 2011 at 5:31 PM, Richard Sandiford
wrote:
> Hi Carrot,
>
> Sorry if this has already been reported, but the patch breaks bootstrap
> of arm-linux-gnueabi (or cross builds with --enable-werror). The problem
> is that this...
>
> uses a statement expression -- i.e. ({ code; result; }
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