[PATCH v2] RISC-V: Use vclmul for CRC expansion if available

vclmul if TARGET_ZVBC. (expand_reversed_crc_using_clmul): Likewise. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/crc-builtin-zvbc.c: New test. Signed-off-by: Anton Blanchard --- gcc/config/riscv/bitmanip.md | 5 +- gcc/config/riscv/riscv.cc

Re: [PATCH] RISC-V: Use vclmul for CRC expansion if available

Hi Jeff, > So this failed pre-commit CI: > > > https://github.com/ewlu/gcc-precommit-ci/issues/3301#issuecomment-2849962485 > > Whatever failure that is needs to be fixed :-) Sorry about that, I'll submit a new version with a fix to the test case. Thanks, Anton

[PATCH] RISC-V: Use vclmul for CRC expansion if available

vclmul if TARGET_ZVBC. (expand_reversed_crc_using_clmul): Likewise. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/crc-builtin-zvbc.c: New test. Signed-off-by: Anton Blanchard --- gcc/config/riscv/bitmanip.md | 5 +- gcc/config/riscv/riscv.cc

Re: [EXT] Re: [PATCH] RISC-V: Add tt-ascalon-d8 integer and floating point scheduling model

Hi Jeff, On Fri, Apr 25, 2025 at 6:04 AM Jeff Law wrote: > > On 4/24/25 2:37 AM, Anton Blanchard wrote: > > Add integer and floating point scheduling models for the Tenstorrent > > Ascalon 8 wide CPU. > > > > gcc/ChangeLog: > > * config/riscv/

[PATCH] RISC-V: Add tt-ascalon-d8 integer and floating point scheduling model

/riscv.md: Update tune attribute and include tt-ascalon-d8.md. * config/riscv/tenstorrent-ascalon.md: New file. Signed-off-by: Anton Blanchard --- gcc/config/riscv/riscv-cores.def | 2 +- gcc/config/riscv/riscv-opts.h | 1 + gcc/config/riscv/riscv.md | 3 +- gcc

[PATCH v2 1/2] RISC-V: Document thead-c906, xiangshan-nanhu, and generic-ooo

gcc/ChangeLog * doc/invoke.texi (RISC-V): Add thead-c906, xiangshan-nanhu to -mcpu, add generic-ooo and remove thead-c906 from -mtune. Signed-off-by: Anton Blanchard --- gcc/doc/invoke.texi | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/gcc/doc

[PATCH v2 2/2] RISC-V: Add Tenstorrent Ascalon 8 wide architecture

-mcpu. gcc/testsuite/ChangeLog: * gcc.target/riscv/mcpu-tt-ascalon-d8.c: New test. Signed-off-by: Anton Blanchard --- gcc/config/riscv/riscv-cores.def | 8 ++ gcc/config/riscv/riscv.cc | 22 ++ gcc/doc/invoke.texi | 3

Re: [PATCH] RISC-V: Add Tenstorrent Ascalon 8 wide architecture

Hi Jeff, Thanks for the review! On Sun, Dec 15, 2024 at 2:59 AM Jeff Law wrote: > If your integer divider has early exit paths you may want to reduce the > int_div costs a bit.I found that ~75% of the actual latency as the > cost worked pretty well for our uarch. Obviously this is a heurist

[PATCH] RISC-V: Add Tenstorrent Ascalon 8 wide architecture

-tt-ascalon-d8.c: New test. Signed-off-by: Anton Blanchard --- gcc/config/riscv/riscv-cores.def | 8 ++ gcc/config/riscv/riscv.cc | 22 ++ .../gcc.target/riscv/mcpu-tt-ascalon-d8.c | 76 +++ 3 files changed, 106 insertions(+) create mode

Re: gcc build problem (i386.c) -- missing declaration

Hi, > extern unsigned hook_uint_void_0 (void); > extern unsigned int hook_uint_mode_0 (machine_mode); > +extern bool hook_uint_uintp_false (unsigned int, unsigned int *); I'm seeing the same build issue on ppc64le, and your patch fixes it. Thanks. Anton

[PATCH] Save an instruction with -mprofile-kernel style profiling

option in the kernel we plan to support both the old and new behaviour. gcc/ 2015-04-16 Anton Blanchard * config/rs6000/rs6000.c (rs6000_output_function_prologue): No need for -mprofile-kernel to save LR to stack. --- gcc/config/rs6000/rs6000.c | 1 - 1 file changed, 1 deletion

[PATCH] Avoid an unused stack frame for -mprofile-kernel profiling on leaf functions.

gcc/: 2014-09-25 Anton Blanchard PR target/63354 * config/rs6000/rs6000.c (rs6000_keep_leaf_when_profiled): New function. * config/rs6000/linux64.h (TARGET_KEEP_LEAF_WHEN_PROFILED): Define. --- gcc/config/rs6000/linux64.h | 3 +++ gcc/config/rs6000/rs6000.c | 9

[RS6000] Fix rs6000_adjust_atomic_subword in little-endian mode

Fixes gcc/testsuite/gcc.dg/sync-2.c * config/rs6000/rs6000.c (rs6000_adjust_atomic_subword): Calculate correct shift value in little-endian mode. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c