Hi,
This patch adds support in the vectorizer for masking fold left reductions.
This avoids the need to insert a conditional assignment with some identity
value.
For example, this C code:
double
f (double *restrict x, int n)
{
double res = 0.0;
for (int i = 0; i < n; i++)
{
res +=
Hi,
This patch fixes bug 90681. It was caused by trying to SLP vectorize a non
grouped load. We've fixed it by tweaking a bit the implementation: mark
masked loads as not vectorizable, but support them as an special case. Then
the detect them in the test for normal non-grouped loads that was al
): Likewise.
(check_effective_target_vect_avg_qi): Check for SVE1 only.
> -Original Message-
> From: Richard Sandiford
> Sent: 29 May 2019 10:54
> To: Alejandro Martinez Vicente
> Cc: GCC Patches ; nd
> Subject: Re: Implement vector average patterns for SVE2
>
Hi,
This patch implements the [u]avgM3_floor and [u]avgM3_ceil optabs for SVE2.
Alejandro
gcc/ChangeLog:
2019-05-28 Alejandro Martinez
* config/aarch64/aarch64-sve2.md: New file.
(avg3_floor): New pattern.
(avg3_ceil): Likewise.
(*h): Likewise.
* conf
Hi Richards,
This is the new version of the patch, addressing your comments.
Alejandro
> -Original Message-
> From: Richard Sandiford
> Sent: 08 May 2019 14:36
> To: Richard Biener
> Cc: Alejandro Martinez Vicente ; GCC
> Patches ; nd
> Subject: Re: [Vectorizer
Great, committed in rev. 270975
Alejandro
> -Original Message-
> From: Richard Sandiford
> Sent: 07 May 2019 17:18
> To: Alejandro Martinez Vicente
> Cc: James Greenhalgh ; GCC Patches patc...@gcc.gnu.org>; nd ; Richard Biener
>
> Subject: Re: [Aarch64][SVE] V
Thanks for your comments Richard. I think this patch addresses them.
Alejandro
> -Original Message-
> From: Richard Sandiford
> Sent: 07 May 2019 15:46
> To: Alejandro Martinez Vicente
> Cc: James Greenhalgh ; GCC Patches patc...@gcc.gnu.org>; nd ; Richard Biene
1.c: New test for sum of absolute
differences.
> -Original Message-
> From: gcc-patches-ow...@gcc.gnu.org
> On Behalf Of Alejandro Martinez Vicente
> Sent: 11 February 2019 15:38
> To: James Greenhalgh
> Cc: GCC Patches ; nd ; Richard
> Sandiford ; Richard
> -Original Message-
> From: Richard Sandiford
> Sent: 29 April 2019 09:42
> To: Alejandro Martinez Vicente
> Cc: GCC Patches ; nd ; Richard
> Biener
> Subject: Re: [Aarch64][SVE] Dot product support
>
> Alejandro Martinez Vicente writ
lejandro Martinez Vicente
> Cc: GCC Patches ; nd ; Richard
> Biener
> Subject: Re: [Aarch64][SVE] Dot product support
>
> Alejandro Martinez Vicente writes:
> > Hi,
> >
> > This patch does two things. For the general vectorizer, it adds
> > support to per
Add myself to write after approval.
Alejandro
Committed to trunk in r 269246
Index: MAINTAINERS
===
--- MAINTAINERS(revision 269244)
+++ MAINTAINERS(working copy)
@@ -495,6 +495,7 @@
Jose E. Marchesi
Patrick
Hi,
Some of the narrowing/widening FP converts were missing from SVE. I fixed most
of them, so they can be vectorized. The ones missing are int64->fp16 and
fp16->int64.
I extended the tests to cover the cases that were missing.
I validated the patch with self-checking and running the new SVE tes
> -Original Message-
> From: James Greenhalgh
> Sent: 06 February 2019 17:42
> To: Alejandro Martinez Vicente
> Cc: GCC Patches ; nd ; Richard
> Sandiford ; Richard Biener
>
> Subject: Re: [Aarch64][SVE] Vectorise sum-of-absolute-differences
>
> On Mon, Fe
Hi,
This patch adds support to vectorize sum of absolute differences (SAD_EXPR)
using SVE. It also uses the new functionality to ensure that the resulting loop
is masked. Therefore, it depends on
https://gcc.gnu.org/ml/gcc-patches/2019-02/msg00016.html
Given this input code:
int
sum_abs (uint8_
Hi,
This patch does two things. For the general vectorizer, it adds support to
perform fully masked reductions over expressions that don't support masking.
This is achieved by using VEC_COND_EXPR where possible. At the moment this is
implemented for DOT_PROD_EXPR only, but the framework is there
> -Original Message-
> From: Richard Biener
> Sent: 17 January 2019 07:53
> To: Alejandro Martinez Vicente
> Cc: GCC Patches ; nd ; Richard
> Sandiford
> Subject: Re: [Vectorizer] Add SLP support for masked loads
>
> On Wed, Jan 16, 2019 at 2:37 PM Alejandr
Hi,
Current vectorizer doesn't support masked loads for SLP. We should add that, to
allow things like:
void
f (int *restrict x, int *restrict y, int *restrict z, int n)
{
for (int i = 0; i < n; i += 2)
{
x[i] = y[i] ? z[i] : 1;
x[i + 1] = y[i + 1] ? z[i + 1] : 2;
}
}
to be
Hi,
I updated the patch to address Wilco's comment and style issues.
Alejandro
> -Original Message-
> From: Wilco Dijkstra
> Sent: 08 January 2019 16:58
> To: GCC Patches ; Alejandro Martinez Vicente
>
> Cc: nd ; Richard Sandiford
> Subject: Re: [Aarc
Hi,
This patch adds support for copysign and xorsign builtins to SVE. With the new
expands, they can be vectorized using bitwise logical operations.
I tested this patch in an aarch64 machine bootstrapping the compiler and
running the checks.
Alejandro
gcc/Changelog:
2019-01-08 Alejandro Marti
vectorized builtin reductions without -ffast-math.
-Original Message-
From: Richard Biener
Sent: 19 December 2018 12:35
To: Alejandro Martinez Vicente
Cc: GCC Patches ; Richard Sandiford
; nd
Subject: Re: [Patch, Vectorizer, SVE] fmin/fmax builtin reduction support
On Wed, Dec 19, 2018 a
Hi all,
Loops that use the fmin/fmax builtins can be vectorized even without
-ffast-math using SVE's FMINNM/FMAXNM instructions. This is an example:
double
f (double *x, int n)
{
double res = 100.0;
for (int i = 0; i < n; ++i)
res = __builtin_fmin (res, x[i]);
return res;
}
Before th
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