Re: [PATCH v2 3/6] RISC-V: Add VLS modes to autovec iterators.

> diff --git > a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/strided_store-2.c > b/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/strided_store-2.c > index 4acac8f7efd..3745de1fd76 100644 > --- > a/gcc/testsuite/gcc.target/riscv/rvv/autovec/gather-scatter/strided_store-2

Re: [PATCH] xtensa: Optimize boolean evaluation or branching when EQ/NE to INT_MIN

On 2023/06/04 12:06, Jeff Law wrote: On 6/3/23 17:03, Andrew Pinski via Gcc-patches wrote: On Sat, Jun 3, 2023 at 3:53 PM Takayuki 'January June' Suwa via Gcc-patches wrote: This patch optimizes both the boolean evaluation of and the branching of EQ/NE against INT_MIN (-2147483648), by takin

Re: [PATCH v4 1/9] LoongArch: Introduce LoongArch32 target

On 12/11/25 09:32, Xi Ruoyao wrote: On Wed, 2025-12-10 at 19:21 +0800, WANG Xuerui wrote: On 11/27/25 17:22, mengqinggang wrote: [snip] diff --git a/gcc/config/loongarch/loongarch-c.cc b/gcc/config/loongarch/loongarch-c.cc index fc031a6fe90..6e2f8f43818 100644 --- a/gcc/config/loongarch/loonga

[PATCH] Update my maintainer entry email

Just updating with my new email address. ChangeLog: * MAINTAINERS (Pengxuan Zheng): Update email address. Signed-off-by: Pengxuan Zheng --- MAINTAINERS | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 53a35b919ca..91b70e657b7 100644

[PATCH v2] LoongArch: Add support for the TARGET_MODES_TIEABLE_P vectorization type.

v1->v2: Add the TARGET_MODES_TIEABLE_P function description and analyze the reasons for the cost change of Subreg type rtx after supporting vectorization. This hook returns true if a value of mode mode1 is accessible in mode mode2 without copying. On LA, for vector types V4SF and V8SF, the lower 1

Re: [pushed][PR122215, IRA]: Fix undefined behaviour of improve_allocation

Yea, it's on the weekly tracker, so barring surprises I'll probably backport it Monday in preparation for the Tuesday meeting. On Wed, Dec 10, 2025 at 8:31 AM Peter Bergner wrote: > On 12/5/25 11:30 AM, Vladimir Makarov wrote: > > The following patch fixes > > > > https://gcc.gnu.org/bugzilla/sh

[PATCH v5 3/3] doc: Document --with-windres in install.texi [PR108866]

gcc/ChangeLog: * doc/install.texi: Document --with-windres configure option. Signed-off-by: Peter Damianov --- gcc/doc/install.texi | 4 1 file changed, 4 insertions(+) diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 67553ffae69..76ab36e53f3 100644 --- a/gcc/doc/ins

[PATCH v5 1/3] Driver: Add support for Windows resource files (.rc, .res) [PR108866]

This patch adds support for compiling Windows resource files (.rc) and pre-compiled resource files (.res) directly through the GCC driver on PECOFF targets. Previously, users had to manually invoke windres to compile resource files before linking: windres -o resource.o resource.rc gcc mai

[PATCH v5 2/3] Driver: Implement --with-windres= argument to configure script [PR108866]

To align with the rest of the options (--with-ld, --with-as, --with-dsymutil), implement --with-windres for overriding the windres binary the driver invokes with an absolute path to a windres binary. gcc/ PR target/108866 * gcc.cc (find_a_program): Add check for DEFAULT_WINDRES.

Re: [PATCH v4 1/9] LoongArch: Introduce LoongArch32 target

On Wed, 2025-12-10 at 19:21 +0800, WANG Xuerui wrote: > On 11/27/25 17:22, mengqinggang wrote: > > [snip] > > diff --git a/gcc/config/loongarch/loongarch-c.cc > > b/gcc/config/loongarch/loongarch-c.cc > > index fc031a6fe90..6e2f8f43818 100644 > > --- a/gcc/config/loongarch/loongarch-c.cc > > +++ b

Re: [PATCH 1/2] cfg: Fix count when creating new forwarder block

On Tue, Dec 9, 2025 at 12:55 PM Andrew Pinski wrote: > > This was a bug previously but maybe did't matter as most of > the time the block was going to be removed after cddce. > Anyways the problem here is the count of the new bb was missing > of the first edge that was moved to it. So the fix is r

Re: [PATCH] i386: Fix and rework Windows TLS support

> Generic x86 changes are OK, and pic_32bit_operand change should be > backported to other release branches. Thanks. The pic_32bit_operand fix might uncover issues after such a long time, although we have not encountered any yet. -- Eric Botcazou

Re: [PATCH v9 0/7] Introduce Kernel Control Flow Integrity ABI [PR107048]

On Wed, Dec 10, 2025 at 06:55:31PM +, Sam James wrote: > Kees Cook writes: > > > Hi, > > > > This series implements[1][2] the Linux Kernel Control Flow Integrity > > ABI, which provides a function prototype based forward edge control flow > > integrity protection by instrumenting every indire

[PATCH v1] c, c++: Improve -Waddress warnings [PR88232]

This patch improves -Waddress warnings to be clearer and more actionable: - Use clearer wording: "testing the address of" instead of "the address of" - Add fix-it hints suggesting to call functions/lambdas with () - Only suggest () for functions/lambdas with no parameters - Don't show internal nam

[PATCH v5] arm.cc: fix thumb1 size-optimized function prolog violates -ffixed-rX [PR117366]

This patch fixes PR117366: arm thumb1 epilogue size optimizer violates -ffixed-r4. Test is crafted to check only r4-r6 to avoid potential conflict between -ffixed-reg-r7 and -fno-omit-frame-pointer. gcc/ChangeLog: PR target/117366 * arm.cc (thumb1_extra_regs_pushed): Take fixed reg

[PATCH v4] arm.cc: fix thumb1 prologue high reg restore violates -ffixed-rX [PR117468]

This patch fixes PR117468: ARM thumb1 compilation using -ffixed-reg with r4-r7, without -Os (which prohibits use of high registers), produces bad high register restoration code that clobbers the fixed register. Test is crafted to check only r4-r6 to avoid potential conflict between -ffixed-reg-r7

Re: [PATCH v4][RESEND] Factor out thread model detection with new `GCC_AC_THREAD_MODEL` macro

On Wed, 10 Dec 2025, John Ericson wrote: > Thank you Joseph! > > Mark: Sorry about that. I noticed that rereunning autoconf was adding > some blank lines, and that loading and saving the file in my editor > removed them due to .editorconfig. Maybe there is a new protocol for how > to regenerat

Re: [PATCH v2] C: fix issues when supporting counted_by fields in anonymous structure/unions [PR122495, PR122496]

On Tue, 9 Dec 2025, Qing Zhao wrote: > I have the following questions need your help: > > 1. I cannot come up with a valid testing case for “c_parser_enum_specifier” > when calling “finish_declspecs”, > I am wondering whether such testing cases existing? > Shall I skip checking counte

Re: [PATCH] [testsuite] [ia32] adjust testcases to cope with default-to-PIE

On Wed, Dec 10, 2025 at 9:27 PM Alexandre Oliva wrote: > > > A few testcases new in gcc-15 fail on i686-linux-gnu with PIE enabled > by default. Add -fno-PIE so that they find the code they test for. > > Regstrapped on x86_64-linux-gnu, trunk and gcc-15, also tested targeting > i686-linux-gnu wit

Re: [PATCH] i386: Fix and rework Windows TLS support

On Wed, Dec 10, 2025 at 3:45 PM Eric Botcazou wrote: > > Hi, > > The compiler can emit invalid movabs instructions at -O0 for TLS accesses in > 64-bit mode on Windows, for example with the attached testcase: > > eric@fomalhaut:~/build/gcc/x86_64-w64-mingw32> gcc/xgcc -Bgcc -c struct-2.c > /tmp/ccO

[PATCH v5 3/4] for_each_path: Pass to callback whether dir is machine-disambiguated

We will use this in the subsequent patch to control what filenames we search for. gcc/ChangeLog: * gcc.cc (for_each_path): Pass an additional boolean argument to the callback specifying whether the current directly being searched is machine-specific, as described above.

[PATCH v5 1/4] find_a_program: Separate from find_a_file

Do this by inlining (a copy of) find_a_file into find_a_program. This separation continues what I started in way back in 5fee8a0a9223d030c66d53c104fb0a431369248f --- there should be executable-specific logic cluttering up find_a_file either, but instead there is a clean separation. This commit is

[PATCH v5 2/4] driver: Simplify `find_a_program` and `find_a_file`

From: John Ericson Now that `find_a_program` and `find_a_file` have been separated, we can make a number of simplification in both of them. Most notably, we don't need a mode parameter, because one is always doing `R_OK`, and the other is always doing `X_OK`. This change also proves that some of

[PATCH v5 4/4] find_a_program: Search with machine prefix in some cases

Prefatory note: I've since learned that this quite similar to https://inbox.sourceware.org/gcc-patches/[email protected]/, postdating my original patch series, but predating this version. See that thread for additional motivation. That patch updated a few specific callsite f

Re: [PATCH v4 4/4] find_a_program: Search with machine prefix in some cases

I am going to resubmit this patch series in a moment. I will, by the book, call it v5, but the only change is adjusting to a conflict in a trivial way: $ git range-diff '@{upstream}@{1}~4..@{upstream}@{1}' HEAD~4..HEAD 1: 62c5a5bf430 = 1: b4c414b7424 find_a_program: Separate from find_a_file 2:

Re: [PATCH 1/9] c++: C++26 Reflection [PR120775]

On Fri, Dec 05, 2025 at 10:18:34PM +0530, Jason Merrill wrote: > > +static tree > > +cp_parser_reflection_name (cp_parser *parser) > > +{ > > + /* Look for the optional `::' operator. */ > > + bool global_scope_p > > += (cp_parser_global_scope_opt (parser, > > +

Re: [PATCH] x86: improve lea peepholes

On Wed, Dec 10, 2025 at 9:30 PM Alexandre Oliva wrote: > > > gcc.target/i386/lea-3.c fails on ia32 with PIE enabled by default. > There are two reasons for that: > > - setting up the PIC register requires one addl instruction, and the > testcase wants none > > - the expected lea-combining peepho

Re: [PATCH v2] [PR83782] ifunc: back-propagate ifunc_resolver to aliases

On Oct 29, 2024, Alexandre Oliva wrote: > On Nov 8, 2023, Alexandre Oliva wrote: >> Ping? > Ping? > https://gcc.gnu.org/pipermail/gcc-patches/2023-November/635731.html > The test still fails with gcc-14 and trunk on ia32 with -fPIE. I've > just retested it on trunk on i686-linux-gnu with -fP

[PATCH] [testsuite] allow relative line numbers in gnat.dg/

The wrappers for dg-warning and dg-error that handle relative line numbers with process-message are only activated if the global variables gcc_warning_prefix and gcc_error_prefix, respectively, are defined. gnat.exp didn't set these variables, so we couldn't use relative line numbers. Set them

[PATCH] [testsuite] xfail vect-121.c on ia32 [PR119293]

Once fre5 resolves conditional of the guard block for the vectorized loop, cfgcleanup removes the edge that bypasses it, adjusting the other edge probability, but not the edge's dest's count. The blocks get combined, and their counts are merged, but nothing adjusts the counts of the block that l

[PATCH] x86: improve lea peepholes

gcc.target/i386/lea-3.c fails on ia32 with PIE enabled by default. There are two reasons for that: - setting up the PIC register requires one addl instruction, and the testcase wants none - the expected lea-combining peephole doesn't get applied for two reasons: -- the second insn of the p

[PATCH] [testsuite] [ia32] adjust testcases to cope with default-to-PIE

A few testcases new in gcc-15 fail on i686-linux-gnu with PIE enabled by default. Add -fno-PIE so that they find the code they test for. Regstrapped on x86_64-linux-gnu, trunk and gcc-15, also tested targeting i686-linux-gnu with PIE enabled by default. Ok for trunk? for gcc/testsuite/Chang

[PATCH] PR107406 Valid allocatable LOCK_TYPE without co-dimension rejected .

The attached patch from Andre and input from Steve and Harald. Regression tested on x86_64_linux_gnu. Ok for mainline? Backport to 15 as it is a rejects valid? Regards, Jerry commit 57bd42f0e96b37b34bc2860e1451568f987988f7 Author: Jerry DeLisle Date: Wed Dec 10 10:38:29 2025 -0800 For

Re: [PATCH] match.pd: Optimize (A ^ B) & C ^ B to (A & C)|(B & ~C) late in pipeline

On 10/12/25 10:25 pm, Andrew Pinski wrote: > The only question I have is why reject INTEGER_CST and not VECTOR_CST? > Really why reject integer cst in general? > > Thanks, > Andrew Hi Andrew, The reason for rejecting |INTEGER_CST| is to avoid regressing rs6000 single rotate-and-insert/mask instr

Re: [PATCH v9 0/7] Introduce Kernel Control Flow Integrity ABI [PR107048]

Kees Cook writes: > Hi, > > This series implements[1][2] the Linux Kernel Control Flow Integrity > ABI, which provides a function prototype based forward edge control flow > integrity protection by instrumenting every indirect call to check for > a hash value before the target function address. I

Re: [PATCH] match.pd: Optimize (A ^ B) & C ^ B to (A & C)|(B & ~C) late in pipeline

On Wed, Dec 10, 2025 at 7:12 AM Kishan Parmar wrote: > > Hello, > > The expression (A ^ B) & C ^ B is the canonical GIMPLE form because it > optimizes for instruction count on generic targets. However, for > targets that support ANDN (like PowerPC andc), the equivalent > (A & C) | (B & ~C) form is

Re: [PATCH v4][RESEND] Factor out thread model detection with new `GCC_AC_THREAD_MODEL` macro

Thank you Joseph! Mark: Sorry about that. I noticed that rereunning autoconf was adding some blank lines, and that loading and saving the file in my editor removed them due to .editorconfig. Maybe there is a new protocol for how to regenerate the files, now? John On Wed, Dec 10, 2025, at 7:34

[COMMITTED 1/4] a68: fix `int * char' lowerer

This commit fixes the asserts in a68_loer_char_mult3 so it expects either int*char or char*int. It also expands the mult-char-1.a68 testcase to cover this case. Signed-off-by: Jose E. Marchesi gcc/algol68/ChangeLog * a68-low-prelude.cc (a68_lower_char_mult3): Fix asserts. gcc/testsuit

Re: [pushed][PR122215, IRA]: Fix undefined behaviour of improve_allocation

On 12/5/25 11:30 AM, Vladimir Makarov wrote: > The following patch fixes > > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=122215 I assume this is something we'll want back ported after some burn-in time on trunk? Peter

Re: [PATCH V10] Add -mcpu=future to the PowerPC

On 12/4/25 9:03 PM, Michael Meissner wrote: > +/* For now, just use power11 as the base processor for -mcpu=future. */ > +#define PROCESSOR_FUTURE PROCESSOR_POWER11 I think you want s/-mcpu=future/-mtune=future/ here, correct? Peter

Re: [PATCH] c++/modules: #include -> import

On Wed, 10 Dec 2025, Jason Merrill wrote: > Actually applying this revised version. Tested x86_64-pc-linux-gnu. > > -- 8< -- > > Since the standard library doesn't preclude an #include of a standard > library header from bringing in declarations from other headers, we can > translate an #inc

Re: [PATCH RFA] libstdc++: build modules for testsuite

On Tue, 11 Nov 2025 at 16:36, Jason Merrill wrote: > > Forgot to CC libstdc++ on this one. > > For information, I'm also attaching the "further change" that I've been > using for testing; I'm not proposing that change at this time. > > Forwarded Message > Subject: [PATCH RFA] lib

[PATCH] match.pd: Optimize (A ^ B) & C ^ B to (A & C)|(B & ~C) late in pipeline

Hello, The expression (A ^ B) & C ^ B is the canonical GIMPLE form because it optimizes for instruction count on generic targets. However, for targets that support ANDN (like PowerPC andc), the equivalent (A & C) | (B & ~C) form is preferable because it reduces register dependency chain. Currentl

Re: [PATCH v5 0/7] libstdc++: submdspan (part 2)

Hi Tomasz, Indeed, it's wonderful! Thank you for your persistent, thorough and very timely reviews; and taking care of landing the patches in trunk (and remembering patches that were posted months before the corresponding language got merged into the standard). I'm very happy that together we've

Re: [PATCH] c++/modules: #include -> import

On Wed, 10 Dec 2025, Jason Merrill wrote: > Actually applying this revised version. Tested x86_64-pc-linux-gnu. > > -- 8< -- > > Since the standard library doesn't preclude an #include of a standard > library header from bringing in declarations from other headers, we can > translate an #includ

[PATCH] ipa: Implement callback edge summary.

Hi, currently in trunk, every edge contains a 16 bit field called callback_id, which is used to link callback edges to their attributes, from which all additional information is calculated as is needed. This patch adds a new summary struct for callback edges, called callback_info. It allows us to

[PATCH] c++: delay noexcept parsing for templated friends [PR122668]

Bootstrapped and regtested on x86_64-pc-linux-gnu, does this look OK for trunk? -- >8 -- The r16-5425 workaround to delay current-instantiation name lookup within a friend's noexcept-spec is unsound because it considers the flag cp_noexcept_operand but that indicates a noexcept-expr, not a noexce

[PATCH] i386: Fix and rework Windows TLS support

Hi, The compiler can emit invalid movabs instructions at -O0 for TLS accesses in 64-bit mode on Windows, for example with the attached testcase: eric@fomalhaut:~/build/gcc/x86_64-w64-mingw32> gcc/xgcc -Bgcc -c struct-2.c /tmp/ccOM8wdd.s: Assembler messages: /tmp/ccOM8wdd.s:34: Error: operand typ

[PATCH] c++/modules: #include -> import

Actually applying this revised version. Tested x86_64-pc-linux-gnu. -- 8< -- Since the standard library doesn't preclude an #include of a standard library header from bringing in declarations from other headers, we can translate an #include of any of the importable headers as an import of . To

[pushed] c++: clean up gcms from compile-std1.C

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- I noticed that the .gcms from compile-std1.C were sticking around and confusing other tests; this patch enhances dg-module-cmi to understand and adds the appropriate directives to the test. gcc/testsuite/ChangeLog: * g++.dg/module

Re: [PATCH RFA] c++, libstdc++: add "modules" std to testsuite

On Tue, 11 Nov 2025 at 16:27, Jason Merrill wrote: > > Tested x86_64-pc-linux-gnu, OK for trunk? OK > > -- 8< -- > > Since modules aren't enabled by default at any -std= yet, let's add a > pseudo-std for them, like we already have for -fimplicit-constexpr. And > also add to target-supports so

Re: [PATCH 1/9] c++: C++26 Reflection [PR120775]

On Tue, Dec 09, 2025 at 08:38:26PM +0800, Jason Merrill wrote: > This suggests that we're doing the lookup in the context of "d.", which is > wrong. That is, we should reject > > struct A { static int x; }; > int q = A().[:^^x:]; // error, no 'x' in scope > > but the branch currently accepts th

Re: [PATCH v5 2/2] asf: Enable pass at O2 or higher on AArch64

On Tue, Dec 9, 2025 at 9:38 PM Andrew Pinski wrote: > On Tue, Dec 9, 2025 at 8:55 AM Konstantinos Eleftheriou > wrote: > > > > From: kelefth > > > > This patch enables the avoid-store-forwarding patch by default at O2 or > > higher on AArch64. > > I am not 100% convinced why this should be enab

Re: [PATCH v4][RESEND] Factor out thread model detection with new `GCC_AC_THREAD_MODEL` macro

Hi, On Tue, Dec 09, 2025 at 10:13:14PM +, Joseph Myers wrote: > On Tue, 9 Dec 2025, John Ericson wrote: > > > That's right. I lack the privileges to land them myself. I was told > > resubmitting them was the right thing to do for patches that never got > > merged. Can you apply them? > > I

Re: [PATCH 1/9] c++: C++26 Reflection [PR120775]

On Tue, Dec 09, 2025 at 08:38:26PM +0800, Jason Merrill wrote: > > > > + [:^^B::fn:]() // do not disable virtual dispatch > > > > + [:^^B:]::fn() // disable virtual dispatch > > > > + > > > > +so we check SPLICE_P. */ > > > > + if (parser->scope && !splice_p) > > >

RE: [PATCH v4] AArch64: Flip svbool_t equal conditionals in ternary operators.

> -Original Message- > From: Tejas Belagod > Sent: 10 December 2025 11:51 > To: [email protected] > Cc: Tejas Belagod ; Tamar Christina > ; [email protected] > Subject: [PATCH v4] AArch64: Flip svbool_t equal conditionals in ternary > operators. > > This patch flips == conditions: >

[PATCH v4] AArch64: Flip svbool_t equal conditionals in ternary operators.

This patch flips == conditions: p == q ? s1 : s2; to p != q ? s2 : s1; where p and q are svbool_t expression types. This is an optimization to avoid generating an extra bit inverse to check for equality. gcc/ * config/aarch64/aarch64.cc (aarch64_instruction_selection): Flip

[PATCH v2] doc: Document d and D suffixes as defined by decimal float TR [PR84717]

Also fix the index entries for the decimal float suffixes, which are not integer suffixes. gcc/ChangeLog: PR c/84717 * doc/extend.texi (Decimal Float): Document d and D suffixes. Fix index entries for decimal float suffixes. --- v2: document D as well as d gcc/doc/exten

Re: [PATCH] doc: Document 'd' suffix as defined by decimal float TR [PR84717]

On Wed, Dec 10, 2025 at 11:29:42AM +, Jonathan Wakely wrote: > Also fix the index entries for the decimal float suffixes, which are not > integer suffixes. Given that the earlier entries always talk about the lowercase and uppercase cases separately, shouldn't it talk about both d and D suffix

Re: [PATCH] doc: Document 'd' suffix as defined by decimal float TR [PR84717]

On Wed, 10 Dec 2025 at 11:29 +, Jonathan Wakely wrote: Also fix the index entries for the decimal float suffixes, which are not integer suffixes. gcc/ChangeLog: PR c/84717 * doc/extend.texi (Decimal Float): Document 'd' suffix. Fix index entries for decimal float suf

[PATCH] doc: Document 'd' suffix as defined by decimal float TR [PR84717]

Also fix the index entries for the decimal float suffixes, which are not integer suffixes. gcc/ChangeLog: PR c/84717 * doc/extend.texi (Decimal Float): Document 'd' suffix. Fix index entries for decimal float suffixes. --- OK for trunk and active branches? gcc/doc/exten

Re: [PATCH v4 1/9] LoongArch: Introduce LoongArch32 target

On 11/27/25 17:22, mengqinggang wrote: [snip] diff --git a/gcc/config/loongarch/loongarch-c.cc b/gcc/config/loongarch/loongarch-c.cc index fc031a6fe90..6e2f8f43818 100644 --- a/gcc/config/loongarch/loongarch-c.cc +++ b/gcc/config/loongarch/loongarch-c.cc @@ -55,6 +55,11 @@ loongarch_define_uncon

Re: [PATCH] aarch64: Remove RNG from -mcpu=neoverse-v2

Hi Richard, > On 10 Dec 2025, at 11:56, Richard Earnshaw wrote: > > On 10/12/2025 09:04, Kyrylo Tkachov wrote: >> Hi all, >> We've received reports from users confused about -mcpu=neoverse-v2 enabling >> the RNG intrinsics by default, even though it is an optional feature in the >> core and not

Re: [PATCH 1/2] Haifa scheduler: Prevent splitting of fusion pairs in dispatch scheduling

> On 4 Dec 2025, at 09:48, Richard Biener wrote: > > On Thu, 4 Dec 2025, Kyrylo Tkachov wrote: > >> Hi Maxim >> >>> On 25 Nov 2025, at 08:01, Maxim Kuvyrkov wrote: >>> >>> Hi Jennifer, >>> Hi Kyrylo, >>> >>> The logic behind this patch is sound, but I suggest doing this fix in >>> choose_

[PATCH] c++, v2: Fix up cp_compare_floating_point_conversion_ranks for dfp [PR122834]

On Wed, Dec 10, 2025 at 10:37:20AM +0100, Jakub Jelinek wrote: > Though, now that I think about it, for _Float16 and decltype (0.0bf16) > everything could be maybe representable even in _Decimal32. Here is a variant of the patch which returns -2 for _Float16 vs. decltype (0.0DL) (i.e. that the lat

Re: [PATCH] aarch64: Remove RNG from -mcpu=neoverse-v2

On 10/12/2025 09:04, Kyrylo Tkachov wrote: Hi all, We've received reports from users confused about -mcpu=neoverse-v2 enabling the RNG intrinsics by default, even though it is an optional feature in the core and not implemented in their implementation. We think it'd be cleaner to not enable it

[PATCH v4 2/3] aarch64: Split sve2-X extensions into sve2 + sve-X extension.

Changes the "sve2-sm4", "sve2-sha3", "sve2-bitperm", and "sve2-aes" to be aliases which imply both "sve2" and the new option "sve-sm4", "sve-sha3", "sve-bitperm", or "sve-aes" respectively. The EXPLICIT_OFF values are chosen to preserve the existing behaviour of +nosve2-X. This granularity is nee

[PATCH v4 3/3] aarch64: Add new target options for 2024 Architecture Extension and Armv9.6-A

This does not add support for these version (and the corresponding __ARM_FEATURE_ macros aren't implemented for this reason) but accepts the command line strings and allows these to be passed on to the assembler. Armv9.6-A is supported by the new "armv9.6-a" option and defined as "armv9.5-a+cmpbr+

[PATCH v4 1/3] aarch64: Add alias option support

Adds the AARCH64_OPT_EXTENSION_ALIAS macro to aarch64-option-extensions.def to define architecture features which gate no features themselves, but act as aliases for other features. When getting the extension string for some architecture flags, alias features should be used over their constituent

[PATCH v4 0/3] aarch64: Updates to architecture extension command line

Hello, This addresses Alices feedback to the V3, only updating the first patch and the commit message of the second. Bootstrapped and reg tested on aarch64-linux-gnu. Okay for master? Alfie Alfie Richards (3): aarch64: Add alias option support aarch64: Split sve2-X extensions into sve2 + s

Re: [PATCH 2/9] c++: C++26 Reflection [PR120775]

On 11/15/25 8:35 AM, Marek Polacek wrote: This contains the metafunction gperf bits. OK. Jason

[PATCH] RISC-V: Move pr123074.C to g++.target.

Hi, Andrew noticed that I added a c++ file to the wrong dir. This patch corrects it. Committing as obvious. Regards Robin gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/pr123074.C: Move to... * g++.target/riscv/rvv/autovec/pr123074.C: ...here. * gcc.target/ri

[PATCH v5 8/9] LoongArch: XALLOCAVEC allocate too large space on stack

Compare (length > la_max_inline_memcpy_size) and (length <= align * LARCH_MAX_MOVE_OPS_STRAIGHT) is signed. But loongarch_block_move_straight() -> XALLOCAVEC() -> alloca() allocate space as unsigned value. It may result in segment fault if length > 0x7fff. gcc/ChangeLog: * config/loo

[PATCH v5 6/9] LoongArch: Fix uint64_t a & 0xfffffffffff on LA32

"uint64_t a & 0xfff" expands to two and:SI on LA32 with -O0: (insn 8 7 9 (set (subreg:SI (reg:DI 82 [ a_2 ]) 0) (and:SI (reg:SI 83) (const_int -1 [0x]))) "t.c":3:5 -1 (nil)) (insn 10 9 11 (set (subreg:SI (reg:DI 82 [ a_2 ]) 4) (and:SI (re

[PATCH v5 9/9] LoongArch: Testcases for LA32

Add gcc.target/loongarch/la64 directory. Move vector tests in gcc.target/loongarch to gcc.target/loongarch/vector. gcc/testsuite/ChangeLog: * g++.target/loongarch/bytepick.C: Skip on LA32. * g++.target/loongarch/got-load.C: Likewise. * g++.target/loongarch/pr106828.C: Like

[PATCH v5 3/9] LoongArch: Machine description files for LA32

gcc/ChangeLog: * config/loongarch/constraints.md: Disable k on LA32. * config/loongarch/loongarch.md (*and3): Delete. (*and3_extend): New. (zero_extend2_la32r): New. (extend2_la32r): New. (extendqihi2_la32r): New. (*movdi_32bit): Remove not w

[PATCH v5 5/9] LoongArch: Add support for libgcc on LA32

LA32 does not support extreme code mode, change to medium code model on LA32. libgcc/ChangeLog: * configure: Regenerate. * configure.ac: Use different tmake_file for LA32 and LA64. * config/loongarch/t-crtstuff-la32: New file for LA32. Reviewed-by: Xi Ruoyao Reviewed-by:

[PATCH v5 7/9] LoongArch: Fix signed 32-bit overflow for loongarch32 target

From: Jiajie Chen When rhs equals to 0x7fff, adding 1 to rhs overflows SI, generating invalid const_int. gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_emit_int_compare): Call trunc_int_mode to ensure valid rhs. gcc/testsuite/ChangeLog: * gcc.target/loon

[PATCH v5 0/9] Add support for LoongArch32 target

These series patches introduce LoongArch32(LA32) ilp32d abi and LoongArch32 Reduced(LA32R) ilp32s abi. The ilp32 abi is similar to lp64 abi[1], with some differences in details. Most testcases have passed when using qemu-user. A LA32 linux system based on qemu is here[2]. The binutils and glibc

[PATCH v5 4/9] LoongArch: Add support for intrinsics on LA32

gcc/ChangeLog: * config/loongarch/larchintrin.h (__movgr2fcsr): Disable on soft float. (__cacop_w): New. (__lddir_d): Delete #error. (__ldpte_d): Likewise. (__crc_w_w_w): Disable on LA32 (__crc_w_d_w): Likewise. (__crcc_w_w_w): Likewise.

[PATCH v5 1/9] LoongArch: Introduce LoongArch32 target

Introduce LoongArch32 (LA32) ilp32d abi and LoongArch32 Reduced (LA32R) ilp32s abi. Add march la32v1.0 and la32rv1.0. Add mtune loongarch32 as a general tune. contrib/ChangeLog: * config-list.mk: Add loongarch32-linux-gnu*. gcc/ChangeLog: * config.gcc: Add target triple loongar

[PATCH v5 2/9] LoongArch: C and .h files for LA32

gcc/ChangeLog: * config/loongarch/loongarch-opts.cc (loongarch_target_option_override): Delete opts->x_flag_pcc_struct_return and enable mstrict-align by default on LA32. * config/loongarch/loongarch.cc (loongarch_for_each_saved_reg): Save reg depend on floa

Re: [PATCH] aarch64: Remove RNG from -mcpu=neoverse-v2

On Wed, Dec 10, 2025 at 1:29 AM Tamar Christina wrote: > > > -Original Message- > > From: Kyrylo Tkachov > > Sent: 10 December 2025 09:05 > > To: GCC Patches > > Cc: Tamar Christina ; Wilco Dijkstra > > ; Alice Carlotti ; Alex > > Coplan ; Andrew Pinski > > ; Richard Earnshaw > > > > Su

Re: [PATCH v1 7/9] aarch64: add Multi-vector 8-bit floating-point multiply-add long

On 11/5/2025 7:41 PM, Kyrylo Tkachov wrote: > On 5 Nov 2025, at 10:23, Tamar Christina wrote: > >> -Original Message- >> From: Kyrylo Tkachov >> Sent: 05 November 2025 17:44 >> To: Claudio Bantaloukas via Sourceware Forge > stage.sourceware.org> >> Cc: gcc-patches mailing li

[PATCH] c++: Fix up cp_compare_floating_point_conversion_ranks for dfp [PR122834]

Hi! The following testcase ICEs in cp_compare_floating_point_conversion_ranks, when it is called on one extended floating point type (right now always a binary floating point type) and a decimal floating point type (which we currently handle as neither standard nor extended floating point type, si

RE: [PATCH] aarch64: Remove RNG from -mcpu=neoverse-v2

> -Original Message- > From: Kyrylo Tkachov > Sent: 10 December 2025 09:05 > To: GCC Patches > Cc: Tamar Christina ; Wilco Dijkstra > ; Alice Carlotti ; Alex > Coplan ; Andrew Pinski > ; Richard Earnshaw > > Subject: [PATCH] aarch64: Remove RNG from -mcpu=neoverse-v2 > > Hi all, > > We

[PATCH] aarch64: Remove RNG from -mcpu=neoverse-v2

Hi all, We've received reports from users confused about -mcpu=neoverse-v2 enabling the RNG intrinsics by default, even though it is an optional feature in the core and not implemented in their implementation. We think it'd be cleaner to not enable it by default for -mcpu=neoverse-v2, same as for

Re: [PATCH] vect-generic: Fix expand_vector_mult [PR123069]

> Am 10.12.2025 um 09:29 schrieb Jakub Jelinek : > > Hi! > > The r16-5095 PR122065 change added build_int_cst call on vector types. > That is never correct, it ICEs already on the TYPE_PRECISION used at the > start of wide_int_to_tree_1. > > Fixed by using build_zero_cst instead. > > Bootst

[COMMITTED] libsanitizer: Update LOCAL_PATCHES

This patch updates LOCAL_PATCHES for commit 203d4dd09ba83121e447ce93ba98175b68d955f6 Author: Rainer Orth Date: Wed Dec 10 09:24:53 2025 +0100 libsanitizer: Restore local sanitizer_redefine_builtins.h patch Committed to trunk. Rainer -- --

[PATCH] vect-generic: Fix expand_vector_mult [PR123069]

Hi! The r16-5095 PR122065 change added build_int_cst call on vector types. That is never correct, it ICEs already on the TYPE_PRECISION used at the start of wide_int_to_tree_1. Fixed by using build_zero_cst instead. Bootstrapped/regtested on x86_64-linux, i686-linux and aarch64-linux, ok for tru

[COMMITTED] libsanitizer: Restore local sanitizer_redefine_builtins.h patch

The recent libsanitizer update broke the Solaris/SPARC build with the native assembler: many files don't compile any longer like /usr/bin/as: "/var/tmp//ccYsT60a.s", line 5: error: unknown opcode ".set" /usr/bin/as: "/var/tmp//ccYsT60a.s", line 5: error: statement syntax /usr/bin/as: "/var/tmp//cc

Re: [PATCH 4/4] Implement hierarchical discriminators for AutoFDO

Hi Honza. > On 2 Dec 2025, at 8:23 pm, Jan Hubicka wrote: > > External email: Use caution opening links or attachments > > >> gcc/ChangeLog: >> >> * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Assign >> hierarchical discriminators for loop unrolling. >> * cfgloopmanip.h

Re: [PATCH 1/4] Implement hierarchical discriminators for AutoFDO

Hi Honza, Thanks for the review. > On 1 Dec 2025, at 10:57 pm, Jan Hubicka wrote: > > External email: Use caution opening links or attachments > > >> gcc/ChangeLog: >> >>* Makefile.in: Add hierarchical_discriminator.o to OBJS. >>* hierarchical_discriminator.cc: New file. >>

Re: [PATCHv15] libstdc++: New generate_canonical impl (P0952, LWG2524) [PR119739]

On 11/20/25 11:13 AM, Tomasz Kaminski wrote: On Thu, Nov 20, 2025 at 4:51 PM Jonathan Wakely > wrote: On Thu, 25 Sep 2025 at 10:13 -0400, Nathan Myers wrote: >Changes in v15: > * Remove redundant , "uniform_int_dist.h". > * Improve comment text.