Re: [PATCH 00/19] doc: First batch of target options cleanups [PR122243]

On 11/19/25 13:07, Sandra Loosemore wrote: Continuing with PR122243 fixes, this set of patches covers about the first third of the target-specific options sections in invoke.texi. [snip] There are some cases where I made other changes to the .opt files that are outside of what I think I can self

Re: [PATCH] mips: MIPS backend, meet C++20

On 11/28/25 1:38 PM, Jakub Jelinek wrote: Hi! C++20, in particular https://wg21.link/P1120R0 paper voted into it, deprecates various operations between enumerators from different enumeration types etc., and as we've switched to -std=gnu++20 by default, this now results in warnings or errors d

Re: [PATCH] riscv: RISCV backend, meet C++20

On 11/28/25 1:33 PM, Jakub Jelinek wrote: On Fri, Nov 28, 2025 at 07:23:13PM +0100, Andreas Schwab wrote: This breaks bootstrap for riscv: In file included from ../../gcc/rtl.h:4039, from ../../gcc/config/riscv/riscv.cc:33: ../../gcc/config/riscv/riscv.cc: In function 'rtx_

[gccrs COMMIT 1/2] rust: add feature gate for lang_items.

From: Raiki Tamura gcc/rust/ChangeLog: * checks/errors/feature/rust-feature-gate.cc (FeatureGate::visit): Add check for lang_items. * checks/errors/feature/rust-feature-gate.h: Likewise. Signed-off-by: Raiki Tamura --- This change was merged into the gccrs repository and is po

[gccrs COMMIT] Remove non leaf errors

From: Pierre-Emmanuel Patry gcc/rust/ChangeLog: * parse/rust-parse-impl.h (Parser::parse_function): Return a nullptr on error instead of a valid function. (Parser::parse_let_stmt): Remove non leaf error. (Parser::parse_if_expr): Likewise. (Parser::parse_lo

Re: [PATCH 1/1] RISC-V: Emit \n\t at the end of instruction instead of ;

On Thu, 27 Nov 2025, Jim Lin wrote: > diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc > index 41ee4014c0d..082f4d6ac1c 100644 > --- a/gcc/config/riscv/riscv.cc > +++ b/gcc/config/riscv/riscv.cc > @@ -4885,7 +4885,7 @@ riscv_output_move (rtx dest, rtx src) > if (TARGET_

[RFC v4 08/11] AArch64/SVE: Relax the expectations of the popcnt-sve test

When predicated tails are enabled for basic block SLP vectorization, the assembly language generated by GCC when compiling popcnt-sve.c will change. Relax the regular expressions used by this test in preparation. Currently, analysis of f_v8hi succeeds with vector mode V16QI and the following GIMPL

[RFC v4 06/11] New parameter for vect_maybe_update_slp_op_vectype

Update all callers to pass a pointer to the vectorizer state into this helper function. Its value is temporarily unused but will be required for BB SLP with predicated tails. gcc/ChangeLog: * tree-vect-loop.cc (vectorizable_lane_reducing): Pass loop_vinfo to vect_maybe_update_slp_

[RFC v4 10/11] AArch64/SVE: Tests for use of predicated vector tails for BB SLP

New tests verify that GCC can generate predicated vector-length specific code for AArch64 if the specified vector length is shorter than, equal to, or longer than the number of elements to be processed (including if the specified length is sufficient but the minimum length would not be); other test

[RFC v4 05/11] Refactor check_load_store_for_partial_vectors

Moved existing code to determine the partial vector style for a load or store into a new function that will be reused for BB SLP with predicated tails. gcc/ChangeLog: * tree-vect-stmts.cc (vect_get_partial_vector_style): Define a new function to get the partial vectors style suppo

[RFC v4 11/11] Add extra conditional dump output to the vectorizer

Instruments those things that needed to be instrumented in order to develop predicated tails for basic block SLP (superword-level parallelism). gcc/ChangeLog: * tree-vect-loop.cc (vect_get_max_nscalars_per_iter): Dump the result. (vect_verify_full_masking): Dump the number

[RFC v4 01/11] Track the minimum and maximum number of lanes for BB SLP

To decide whether to create a new SLP instance for BB SLP, vect_analyze_slp_instance will need the minimum number of lanes in the SLP tree, which must not be less than the group size (otherwise "unrolling" is required). All usage of max_nunits is therefore replaced with a new class that encapsulate

[RFC v4 03/11] Implement recording/getting of mask/length for BB SLP

Add two new fields to SLP tree nodes, which are accessed as SLP_TREE_CAN_USE_PARTIAL_VECTORS_P and SLP_TREE_PARTIAL_VECTORS_STYLE. SLP_TREE_CAN_USE_PARTIAL_VECTORS_P is analogous to the existing predicate LOOP_VINFO_CAN_USE_PARTIAL_VECTORS_P. It is initialized to true. This flag just records wheth

[RFC v4 09/11] Extend BB SLP vectorization to use predicated tails

This enables use of a predicate mask or length limit for vectorization of basic blocks in cases where previously only the equivalent rolled (i.e. loop) form of some source code would have been vectorized. Predication is used for groups whose size is not neatly divisible into vectors of lengths that

[RFC v4 07/11] Handle variable-length vector types in store_constructor

When given a constructor of variable-length vector type, the store_constructor function now builds a vector with the number of elements specified by the constructor and uses it to emit the body of the kind of insn chosen by the convert_optab_handler function. Previously, this function used a fallba

[RFC v4 04/11] Update constant creation for BB SLP with predicated tails

Created a new function, gimple_build_vector_from_elems, for use when creating vectorized definitions for basic block vectorization in vect_create_constant_vectors. The existing gimple_build_vector function cannot be used for SVE vector types because it relies on the type associated with the tree_v

[RFC v4 02/11] Preparation to support predicated vector tails for BB SLP

Calls to vect_(get|record)_loop_(mask|len) are replaced with calls to new wrappers that have an extra (SLP node) parameter and which can operate on any vec_info, not just a loop_vec_info. These wrappers pass calls through to the original functions (and ignore the SLP node) when invoked with a loop_

[RFC v4 00/11] Extend BB SLP vectorization to use predicated tails

GCC already supports fully-predicated vectorisation for loops, both using "traditional" loop vectorisation and loop-aware SLP (superword-level parallelism). For example, GCC can vectorise: void foo (char *x) { for (int i = 0; i < 6; i += 2) { x[i] += 1; x[i + 1] += 2; } } fr

Re: [PATCH] Bump libgo SONAME

Richard Biener writes: > The following bumps the libgo SONAME to prevent PR119098 from re-appearing > for GCC 15/16. > > OK for trunk? > > Thanks, > Richard. > > PR libgo/122802 > * configure.ac (libtool_VERSION): Dump to 25:0:0. > * configure: Re-generate. Yes, thanks. I'll u

Re: [PATCH] Change the default C++ dialect to gnu++20

On Fri, 28 Nov 2025 at 18:28, Andreas Schwab wrote: > > This breaks bootstrap for riscv: > > In file included from ../../gcc/rtl.h:4039, > from ../../gcc/config/riscv/riscv.cc:33: > ../../gcc/config/riscv/riscv.cc: In function 'rtx_def* > riscv_unspec_address_offset(rtx, rtx, risc

[committed] powerpc: PowerPC backend, meet C++20

Hi! C++20, in particular https://wg21.link/P1120R0 paper voted into it, deprecates various operations between enumerators from different enumeration types etc., and as we've switched to -std=gnu++20 by default, this now results in warnings or errors during stage2 and onwards. The following patch

Re: [PATCH] c++: Handle TARGET_EXPR in tsubst_expr [PR117034]

On 2025-11-28 15:32, Patrick Palka wrote: > Hey Egas, thanks for the patch! > > On Fri, 28 Nov 2025, Egas Ribeiro wrote: > > > Lambdas used as non-type template arguments to concepts are wrapped > > in TARGET_EXPR nodes. After r16-5115 changed convert_template_argument > > to call instantiate_non

[PATCH] analyzer: Fix 3 C++20 warnings in analyzer

Hi! I've noticed ../../gcc/analyzer/known-function-manager.cc:86:33: warning: arithmetic between different enumeration types ‘internal_fn’ and ‘built_in_function’ is deprecated [-Wdeprecated-enum-enum-conversion] ../../gcc/analyzer/known-function-manager.cc:87:26: warning: arithmetic between di

[PATCH] loongarch: LoongArch backend, meet C++20

Hi! C++20, in particular https://wg21.link/P1120R0 paper voted into it, deprecates various operations between enumerators from different enumeration types etc., and as we've switched to -std=gnu++20 by default, this now results in warnings or errors during stage2 and onwards. The following patch

Re: [PATCH] mips: MIPS backend, meet C++20

On 11/28/25 1:38 PM, Jakub Jelinek wrote: Hi! C++20, in particular https://wg21.link/P1120R0 paper voted into it, deprecates various operations between enumerators from different enumeration types etc., and as we've switched to -std=gnu++20 by default, this now results in warnings or errors d

[PATCH] mips: MIPS backend, meet C++20

Hi! C++20, in particular https://wg21.link/P1120R0 paper voted into it, deprecates various operations between enumerators from different enumeration types etc., and as we've switched to -std=gnu++20 by default, this now results in warnings or errors during stage2 and onwards. The following patch

[PATCH] riscv: RISCV backend, meet C++20

On Fri, Nov 28, 2025 at 07:23:13PM +0100, Andreas Schwab wrote: > This breaks bootstrap for riscv: > > In file included from ../../gcc/rtl.h:4039, > from ../../gcc/config/riscv/riscv.cc:33: > ../../gcc/config/riscv/riscv.cc: In function 'rtx_def* > riscv_unspec_address_offset(rtx

Re: [PATCH] c++: Handle TARGET_EXPR in tsubst_expr [PR117034]

Hey Egas, thanks for the patch! On Fri, 28 Nov 2025, Egas Ribeiro wrote: > Lambdas used as non-type template arguments to concepts are wrapped > in TARGET_EXPR nodes. After r16-5115 changed convert_template_argument > to call instantiate_non_dependent_expr_internal on non-dependent > expressions,

Re: [PATCH] amdgcn: Auto-detect USM mode and set HSA_XNACK

On 14/11/2025 14:23, Tobias Burnus wrote: Hi Andrew, Andrew Stubbs wrote: On 11/11/2025 21:35, Tobias Burnus wrote: Can you also update: https://gcc.gnu.org/onlinedocs/libgomp/AMD- Radeon.html – search for HSA_XNACK. That's only for the USM case, but I think that's the only one that really

RE: [PATCH] Bump libgcobol SONAME

> -Original Message- > From: Richard Biener > Sent: Friday, November 28, 2025 08:53 > To: [email protected] > Cc: Jakub Jelinek ; [email protected]; [email protected] > Subject: [PATCH] Bump libgcobol SONAME > > This bumps the libgcobol SONAME for GCC 16 since compared to GCC 1

Re: [PATCH] Match: Optimize (a * b) == 0 to (a == 0) || (b == 0).

On 11/28/25 1:10 AM, Dongyan Chen wrote: 在 2025/11/28 12:41, Andrew Pinski 写道: On Thu, Nov 27, 2025 at 5:04 AM Dongyan Chen wrote: This patch implements an optimization to transform (a * b) == 0 to (a == 0) || (b == 0) for signed and unsigned integer. gcc/ChangeLog: * match.pd:

Re: [PATCH v2] rtl-optimization: Fix BB edge ordering [PR122675]

On 11/27/25 11:10 AM, Dimitar Dimitrov wrote: So the comment for the function says we want to order with the highest execution frequency first, this patch would seem to do the opposite. Similarly at the call site from within reorder_basic_blocks_simple, the expectation is the most desirable

Re: [PATCH] middle-end: Optimize reversed CRC table-based implementation

On 11/28/25 2:58 AM, Kito Cheng wrote: I know we're already in stage 3, so I'm basically asking for a review and am fine with deferring this to GCC 17. But if it's acceptable for GCC 16, that would be great too. :P --- The previous reversed CRC implementation used explicit bit reflection bef

Re: [PATCH] middle-end: Optimize reversed CRC table-based implementation

On Fri, Nov 28, 2025 at 11:30 AM Jeff Law wrote: > > > > On 11/28/25 12:16 PM, Andrew Pinski wrote: > > On Fri, Nov 28, 2025 at 2:00 AM Kito Cheng wrote: > >> > >> I know we're already in stage 3, so I'm basically asking for a review and > >> am > >> fine with deferring this to GCC 17. But if it

[PATCH] c++: Handle TARGET_EXPR in tsubst_expr [PR117034]

Lambdas used as non-type template arguments to concepts are wrapped in TARGET_EXPR nodes. After r16-5115 changed convert_template_argument to call instantiate_non_dependent_expr_internal on non-dependent expressions, these TARGET_EXPRs began hitting the default case in tsubst_expr, causing an ICE.

Re: [PATCH] Change the default C++ dialect to gnu++20

This breaks bootstrap for riscv: In file included from ../../gcc/rtl.h:4039, from ../../gcc/config/riscv/riscv.cc:33: ../../gcc/config/riscv/riscv.cc: In function 'rtx_def* riscv_unspec_address_offset(rtx, rtx, riscv_symbol_type)': ../../gcc/config/riscv/riscv.cc:2817:47: error:

Re: [PATCH] middle-end: Optimize reversed CRC table-based implementation

On Fri, Nov 28, 2025 at 2:00 AM Kito Cheng wrote: > > I know we're already in stage 3, so I'm basically asking for a review and am > fine with deferring this to GCC 17. But if it's acceptable for GCC 16, that > would be great too. :P > > --- > > The previous reversed CRC implementation used explic

[PATCH] OpenMP/Fortran: Allow explicit map followed by implicit deep mapping [PR120505]

Consider the following source code, assuming tiles is allocatable: ``` !$omp target enter data map(var%tiles(1)%den1, var%tiles(1)%den2) !(1) [...] !$omp target ! implicitly maps var, which triggers deep mapping of tiles (2) ``` Each omp directive causes a run-time error in libgomp: (1)

Re: [PATCH] RISC-V: Apply LMUL cost penalty to vector operations

On 11/27/25 6:35 AM, Robin Dapp wrote: For high-performance OoO uarchs, the number of ALUs is usually reflected directly in instruction throughput. So in theory we could derive the scalar vs vector scaling factor from the CPU scheduling model. I looked at the GCC RISC-V scheduling models (spa

Re: [PATCH] Match: Optimize (a * b) == 0 to (a == 0) || (b == 0).

On 11/28/25 1:10 AM, Dongyan Chen wrote: 在 2025/11/28 12:41, Andrew Pinski 写道: On Thu, Nov 27, 2025 at 5:04 AM Dongyan Chen wrote: This patch implements an optimization to transform (a * b) == 0 to (a == 0) || (b == 0) for signed and unsigned integer. gcc/ChangeLog: * match.pd:

Re: [PATCH] OpenMP/Fortran: Allow explicit map followed by implicit deep mapping [PR120505]

Paul-Antoine Arras wrote: Regarding (1), the OpenMP spec has the following restriction: "If multiple list items are explicitly mapped on the same construct and have the same containing array or have base pointers that share original storage, and if any of the list items do not have corresponding

Re: [PATCH] [Testsuite] Fix testcases after LICM of self-write

On 11/28/25 1:35 AM, Kugan Vivekanandarajah wrote: Hi, My recent patch to LICM requires some tests to be adjusted. gcc/testsuite/ChangeLog: 2025-11-26 Kugan Vivekanandarajah * gcc.dg/vect/tsvc/vect-tsvc-s293.c: Remove xfail. * gcc.target/aarch64/vect-ld1r-compile.c: Ad

Re: [PATCH] OpenMP/Fortran: Allow explicit map followed by implicit deep mapping [PR120505]

Thanks for the quick review! See the updated patch attached and inline comments below. On 28/11/2025 16:28, Tobias Burnus wrote: Paul-Antoine Arras wrote: Regarding (1), the OpenMP spec has the following restriction: "If multiple list items are explicitly mapped on the same construct and have

Re: [PATCH v4 1/2] asf: Update destination register after store_bit_field when needed

On 11/27/25 1:56 AM, Konstantinos Eleftheriou wrote: On Thu, Nov 27, 2025 at 2:15 AM Jeff Law > wrote: On 11/19/25 7:37 AM, Konstantinos Eleftheriou wrote: > Sometimes, `store_bit_field` copies the destination register into a new one, > whi

Re: [PATCH] middle-end: Optimize reversed CRC table-based implementation

On 11/28/25 12:16 PM, Andrew Pinski wrote: On Fri, Nov 28, 2025 at 2:00 AM Kito Cheng wrote: I know we're already in stage 3, so I'm basically asking for a review and am fine with deferring this to GCC 17. But if it's acceptable for GCC 16, that would be great too. :P --- The previous rev

Re: [PATCH] amdgcn: Auto-detect USM mode and set HSA_XNACK

Andrew Stubbs wrote: On 11/11/2025 21:35, Tobias Burnus wrote: Can you also update: https://gcc.gnu.org/onlinedocs/libgomp/AMD- Radeon.html – search for HSA_XNACK. That's only for the USM case, but I think that's the only one that really matters. (Even if xnack+ / on is also affected.) How is

Re: [PATCH v3] c++: fix crash with pack indexing in noexcept [PR121325]

On Fri, 28 Nov 2025, Jason Merrill wrote: > On 11/27/25 12:53 AM, Marek Polacek wrote: > > On Wed, Nov 26, 2025 at 01:29:35PM -0500, Patrick Palka wrote: > > > On Wed, 26 Nov 2025, Patrick Palka wrote: > > > > > > > On Wed, 26 Nov 2025, Marek Polacek wrote: > > > > > > > > > On Mon, Nov 24, 2025

[PATCH] [v2] rs6000: Fine tune {FLOOR, CEIL, TRUNC}_MOD scalar cost to auto-vectorize % in powerpc [PR121700]

From: Avinash Jayakar Hi, Here is a small patch to do better codegen in powerpc for %, [fl]% and [cl]% operators. Kindly review. Is this OK for trunk? Changes from v1: - Added test cases to check the vectorization Thanks and regards, Avinash Jayakar The modulo operator and its floor/ceil varia

Re: [PATCH] x86/aarch64: Fix compile time hog with ccmp [PR99782]

> On 24 Oct 2025, at 06:20, Andrew Pinski > wrote: > > With ccmp, right now with TER, we hit an O(n^2) explosion in > compile time. This can be stopped by returning NULL early in > ix86_gen_ccmp_next before we expand the operands which will expand seperately > at that point. > > A similar pat

Re: [PATCH] PR tree-optimization/122686 - Undefined bitmasks imply undefined ranges.

On 11/28/25 03:00, Richard Biener wrote: On Thu, Nov 27, 2025 at 7:39 PM Andrew MacLeod wrote: I do think this is the correct solution. I dont think there is any point in enhancing the bitmask class to have a representation of UNDEFINED as it would be such a transient thing, and serves little

Re: [PATCH] Bump libgcobol SONAME

On Fri, Nov 28, 2025 at 02:53:13PM +0100, Richard Biener wrote: > This bumps the libgcobol SONAME for GCC 16 since compared to GCC 15 > there are removed symbols and key data structures have changed. > > OK for trunk? > > Thanks, > Richard. > > PR cobol/122803 > * configure.ac (LIBGC

[gccrs COMMIT] Remove non-leaf error message in delimited tt

From: Pierre-Emmanuel Patry gcc/rust/ChangeLog: * parse/rust-parse-impl.h (Parser::parse_delim_token_tree): Remove error message. (Parser::parse_token_tree): Split error message. gcc/testsuite/ChangeLog: * rust/compile/macros/mbe/macro-issue3608.rs: Remove error

Re: [PATCH 1/9] c++: C++26 Reflection [PR120775]

On Fri, Nov 28, 2025 at 08:25:05AM +0530, Jason Merrill wrote: > On 11/15/25 6:04 AM, Marek Polacek wrote: > > This patch contains the middle-end, libcpp/, c-family/, and cp/ bits > > (besides reflect.cc and the gperf bits). > > > +/* In TREE_VALUE of an attribute this means the attribute argument

[PATCH] Bump libgcobol SONAME

This bumps the libgcobol SONAME for GCC 16 since compared to GCC 15 there are removed symbols and key data structures have changed. OK for trunk? Thanks, Richard. PR cobol/122803 * configure.ac (LIBGCOBOL_VERSION): Bump to 2:0:0. * configure: Re-generate. --- libgcobol/c

Re: [COMMITTED,PATCH] s390: Fix deprecated-enum-enum-conversion warnings

On 11/28/25 1:47 PM, Stefan Schulze Frielinghaus wrote: From: Stefan Schulze Frielinghaus With the recent switch in commit r16-5628 defaulting to C++20 some enumeration arithmetic errors are thrown during bootstrap, now. Fixed by casting those to type int. I'm using type int here merely becau

Re: [Patch, gcc+wwwdocs][RFC?] GCN: Add generic targets to default-built multilibs

On 28/11/2025 13:04, Tobias Burnus wrote: Andrew Stubbs wrote: On 27/11/2025 16:42, Tobias Burnus wrote: This patch addresses the first one by adding the generic architectures - with the plan to removed the specific ones in GCC 17 (except for gfx908/gfx90a which do not have a generic arch).

[PATCH RFA] libcpp: adjust _cpp_file accessors

Tested x86_64-pc-linux-gnu, OK for trunk? I also checked that a darwin cross-compiler builds. This is a cleanup for my #include -> import patch, since the new hook wants to query path/name/dir. -- 8< -- Back in r78875 mrs added cpp_get_path/dir accessors for _cpp_file in order to interface wi

[PATCH] Bump libgo SONAME

The following bumps the libgo SONAME to prevent PR119098 from re-appearing for GCC 15/16. OK for trunk? Thanks, Richard. PR libgo/122802 * configure.ac (libtool_VERSION): Dump to 25:0:0. * configure: Re-generate. --- libgo/configure| 2 +- libgo/configure.ac | 2 +-

Re: [Patch, gcc+wwwdocs][RFC?] GCN: Add generic targets to default-built multilibs

Andrew Stubbs wrote: On 27/11/2025 16:42, Tobias Burnus wrote: This patch addresses the first one by adding the generic architectures - with the plan to removed the specific ones in GCC 17 (except for gfx908/gfx90a which do not have a generic arch). I'm in two minds whether to just go ahead a

[PATCH] arc: check if the addend fits when referencing small data memory [PR115650]

From: Michiel Derhaeg This prevents linker errors when referencing small data using large offsets. In practice it is very unlikely to be a real problem but this was fixed because other compilers do this check and it ensures the following tests now succeed: - gcc.dg/torture/pr60115.c - gcc.dg/tort

[COMMITTED,PATCH] s390: Fix deprecated-enum-enum-conversion warnings

From: Stefan Schulze Frielinghaus With the recent switch in commit r16-5628 defaulting to C++20 some enumeration arithmetic errors are thrown during bootstrap, now. Fixed by casting those to type int. I'm using type int here merely because S390_ALL_BUILTIN_MAX is used in comparisons with other

[PING][PATCH v4] reassoc: Optimize CMP/XOR expressions [PR116860]

Ping for https://gcc.gnu.org/pipermail/gcc-patches/2025-June/687530.html . Thanks, Konstantinos

Re: [PATCH] libstdc++: Fix spinloop in atomic timed waiting function [PR122878]

On Fri, Nov 28, 2025 at 1:35 PM Jonathan Wakely wrote: > On Fri, 28 Nov 2025 at 11:38, Tomasz Kaminski wrote: > > > > > > > > On Fri, Nov 28, 2025 at 12:33 PM Jonathan Wakely > wrote: > >> > >> On Fri, 28 Nov 2025 at 08:53, Tomasz Kaminski > wrote: > >> > > >> > > >> > > >> > On Thu, Nov 27, 2

Re: [PATCH] libstdc++: Fix spinloop in atomic timed waiting function [PR122878]

On Fri, 28 Nov 2025 at 11:38, Tomasz Kaminski wrote: > > > > On Fri, Nov 28, 2025 at 12:33 PM Jonathan Wakely wrote: >> >> On Fri, 28 Nov 2025 at 08:53, Tomasz Kaminski wrote: >> > >> > >> > >> > On Thu, Nov 27, 2025 at 5:38 PM Jonathan Wakely wrote: >> >> >> >> On Thu, 27 Nov 2025 at 16:01, To

[PATCH] libgomp, amdgcn, nvptx: Improve omp_target_is_accessible [PR121813]

This patch extends omp_target_is_accessible to check the actual device status for the memory region, on amdgcn and nvptx devices (rather than just checking if shared memory is enabled). In both cases, we check the status of each 4k region within the given memory range (assuming 4k pages should be

Re: [PATCH] libstdc++: Fix spinloop in atomic timed waiting function [PR122878]

On Fri, Nov 28, 2025 at 12:33 PM Jonathan Wakely wrote: > On Fri, 28 Nov 2025 at 08:53, Tomasz Kaminski wrote: > > > > > > > > On Thu, Nov 27, 2025 at 5:38 PM Jonathan Wakely > wrote: > >> > >> On Thu, 27 Nov 2025 at 16:01, Tomasz Kaminski > wrote: > >> > > >> > > >> > > >> > On Thu, Nov 27, 2

Re: [PATCH v2] AArch64: Flip svbool_t equal conditionals in ternary operators.

On 24/11/2025 18:06, Richard Biener wrote: On Mon, Nov 24, 2025 at 4:51 PM Tejas Belagod wrote: This patch flips == conditions: p == q ? s1 : s2; to p != q ? s2 : s1; where p and q are svbool_t expression types. This is an optimization to avoid generating an extra bit inverse to chec

Re: [PATCH] libstdc++: Fix spinloop in atomic timed waiting function [PR122878]

On Fri, 28 Nov 2025 at 08:53, Tomasz Kaminski wrote: > > > > On Thu, Nov 27, 2025 at 5:38 PM Jonathan Wakely wrote: >> >> On Thu, 27 Nov 2025 at 16:01, Tomasz Kaminski wrote: >> > >> > >> > >> > On Thu, Nov 27, 2025 at 4:35 PM Jonathan Wakely wrote: >> >> >> >> The __spin_until_impl function wa

[gccrs COMMIT] Initialize uninit boolean

From: Pierre-Emmanuel Patry gcc/rust/ChangeLog: * backend/rust-constexpr.cc (eval_binary_expression): Set initial value equality value to false. Signed-off-by: Pierre-Emmanuel Patry --- This change was merged into the gccrs repository and is posted here for upstream visibility

[PATCH v3] AArch64: Flip svbool_t equal conditionals in ternary operators.

This patch flips == conditions: p == q ? s1 : s2; to p != q ? s2 : s1; where p and q are svbool_t expression types. This is an optimization to avoid generating an extra bit inverse to check for equality. gcc/ * config/aarch64/aarch64.cc (aarch64_instruction_selection): Flip

Re: [Patch, gcc+wwwdocs][RFC?] GCN: Add generic targets to default-built multilibs

On 27/11/2025 16:42, Tobias Burnus wrote: The current default configuration has the problem: several GPUs aren't supported by default and, additionally, that there are too many multilibs This patch addresses the first one by adding the generic architectures - with the plan to removed the spec

Re: [Patch, fortran] PR104650 - [PDT] ICE in gfc_resolve_finalizers, at fortran/resolve.cc:13749 since r8-3056-g5bab4c9631c478b7

Thanks, Jerry. Pushed as r16-5612. Paul On Tue, 25 Nov 2025 at 18:13, Jerry D wrote: > On 11/25/25 7:48 AM, Paul Richard Thomas wrote: > > Hi All, > > > > The attached patch implements PDT finalizers and, in doing so, fixes the > > PR. The testcase also tests the second PDT example in the F201

[PATCH] tree-optimization/122844 - bogus reduction chain detection

We may not strip sign-conversions around MIN/MAX operations. Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed. PR tree-optimization/122844 * tree-vect-slp.cc (vect_analyze_slp_reduc_chain): Only try stripping sign conversions around ops where this is valid.

[PATCH] middle-end: Optimize reversed CRC table-based implementation

I know we're already in stage 3, so I'm basically asking for a review and am fine with deferring this to GCC 17. But if it's acceptable for GCC 16, that would be great too. :P --- The previous reversed CRC implementation used explicit bit reflection before and after the CRC computation: reflec

Re: [PATCH] c++: Remove PMF special cases from cxx_get_alias_set [PR119969]

On 11/28/25 2:51 PM, Jakub Jelinek wrote: On Thu, Nov 27, 2025 at 11:18:52AM +0530, Jason Merrill wrote: I wouldn't expect that to be an issue, the POINTER_TYPE to METHOD_TYPE.is immediately wrapped in the PMF RECORD_TYPE. The comment suggests that the problem is that METHOD_TYPE isn't canonica

Re: [PATCH v3] c++: fix crash with pack indexing in noexcept [PR121325]

On 11/27/25 12:53 AM, Marek Polacek wrote: On Wed, Nov 26, 2025 at 01:29:35PM -0500, Patrick Palka wrote: On Wed, 26 Nov 2025, Patrick Palka wrote: On Wed, 26 Nov 2025, Marek Polacek wrote: On Mon, Nov 24, 2025 at 08:20:10PM -0500, Patrick Palka wrote: On Mon, 24 Nov 2025, Marek Polacek wro

Re: [PATCH] hard-reg-set: use ctz for iteration

On Fri, 28 Nov 2025, Alexandre Oliva wrote: > On Nov 28, 2025, Alexandre Oliva wrote: > > > Now, if we want to stick to those assumptions, the current iterator > > implementation can be modified to use ffs or ctz instead. Would you > > prefer that? > > Like this, maybe? Yes, this looks more o

Re: [PATCH] fold: Elide MASK_LEN_LOAD/STORE with zero length [PR122635].

On Fri, Nov 28, 2025 at 10:10 AM Robin Dapp wrote: > > > Ah, I see. How the code is factored makes this a bit iffy IMO. > > Can't we refactor things somehow to avoid this "special value"? > > Time for a store else value? :-x > > Attached is a v2, there is a bit of code duplication now but I think

[PATCH] i386: Generate 3-byte NOP for -mnop-mcount -m16

When generating 16-bit code via -m16, the NOP mcount code generation emits a 5-byte NOP. However, that is neither a valid i8086 instruction (long NOPs are PentiumPro+), nor would it get decoded as a 5-byte instruction. It's a 4-byte 'nopw 0(%si)' followed by a zero byte. The latter causes the follo

[PATCH] c++: Remove PMF special cases from cxx_get_alias_set [PR119969]

On Thu, Nov 27, 2025 at 11:18:52AM +0530, Jason Merrill wrote: > I wouldn't expect that to be an issue, the POINTER_TYPE to METHOD_TYPE.is > immediately wrapped in the PMF RECORD_TYPE. > > The comment suggests that the problem is that METHOD_TYPE isn't > canonicalized properly, but build_method_ty

Re: [PATCH] fold: Elide MASK_LEN_LOAD/STORE with zero length [PR122635].

> Ah, I see. How the code is factored makes this a bit iffy IMO. > Can't we refactor things somehow to avoid this "special value"? Time for a store else value? :-x Attached is a v2, there is a bit of code duplication now but I think not too bad. Sniff regtest on riscv64 and x86 was successful,

Re: [PATCH] RISC-V: Support --with-cpu

Thanks, I've pushed this to trunk. I'm surprised we forgot to add this configure option for so long :P On Thu, Nov 27, 2025 at 3:32 AM Charlie Jenkins wrote: > The --with-cpu will allow riscv compilers to have a default mcpu flag. > Setting -mcpu or -march at compile time will override the confi

Re: [PATCH] RISC-V: Add Andes 23 series pipeline description.

v2 pushed On Thu, Nov 27, 2025 at 9:16 AM KuanLin Chen wrote: > I'll fix it. Thanks for you remind. :-) > > Peter Bergner 於 2025年11月27日週四 上午4:52寫道： > > > > On 11/25/25 11:29 PM, Kuan-Lin Chen wrote: > > > diff --git a/gcc/config/riscv/riscv-opts.h > b/gcc/config/riscv/riscv-opts.h > > > index

Re: [PATCH] RISC-V: Run gen-riscv-ext-opt to regenerate riscv-ext.opt [NFC]

Thanks, pushed to trunk :) On Thu, Nov 27, 2025 at 9:27 PM wrote: > From: Mark Zhuang > > gcc/ChangeLog: > > * config/riscv/riscv-ext.opt: Generated file. > --- > gcc/config/riscv/riscv-ext.opt | 25 + > 1 file changed, 13 insertions(+), 12 deletions(-) > > diff

Re: [PATCH V2] RISC-V: Add Andes 45 series pipeline description.

pushed :) On Thu, Nov 27, 2025 at 9:33 AM Kuan-Lin Chen wrote: > The Andes 45 series is a 8-stage, in-order, and dual-issue execution > pipeline. > > Co-author: Allen Bing-Sung Lu ([email protected]) > > gcc/ChangeLog: > > * config/riscv/riscv-cores.def (RISCV_TUNE): Add andes-45-serei

Re: [PATCH] RISC-V: Add SpacemiT extension xsmtvdot

Thanks, pushed to trunk :) On Fri, Nov 28, 2025 at 11:11 AM Mark Zhuang < [email protected]> wrote: > From: Mark Zhuang > > gcc/ChangeLog: > > * config/riscv/riscv-cores.def (RISCV_CORE): Add xsmtvdot to > spacemit-x60 > * config/riscv/riscv-ext.def: Add x

Re: [r16-5625 Regression] FAIL: g++.dg/modules/xtreme-header-8.C -std=c++26 (test for excess errors) on Linux/x86_64

Thanks for the report. This should be fixed on trunk by r16-5666-g2c1e896ac97065. libstdc++: Fix exposure of TU-local lambda in __detail::__func_handle_t. The lambda is considered to be TU-local entity, use a named function instead. As drive-by, a functor stored inside __func_hand

Re: [PATCH] libstdc++: Fix spinloop in atomic timed waiting function [PR122878]

On Thu, Nov 27, 2025 at 5:38 PM Jonathan Wakely wrote: > On Thu, 27 Nov 2025 at 16:01, Tomasz Kaminski wrote: > > > > > > > > On Thu, Nov 27, 2025 at 4:35 PM Jonathan Wakely > wrote: > >> > >> The __spin_until_impl function was presumably intended to just spin for > >> a short time, then give u

[PATCH] [Testsuite] Fix testcases after LICM of self-write

Hi, My recent patch to LICM requires some tests to be adjusted. gcc/testsuite/ChangeLog: 2025-11-26 Kugan Vivekanandarajah * gcc.dg/vect/tsvc/vect-tsvc-s293.c: Remove xfail. * gcc.target/aarch64/vect-ld1r-compile.c: Add -fno-tree-loop-distribute-patterns to prevent me

[PATCH] [AutoFDO] Fix 'inlined' set in inline_functions_by_afdo

Hi, In i 'inline_functions_by_afdo' that attempts to inline functions guided by AutoFDO profiles unnecessarily sets'inlined' flag to true. This patch just removes this. This is actually causing ICE in some cases. gcc/ChangeLog: 2025-11-27 Kugan Vivekanandarajah * ipa-inline.cc (i

Re: [PATCH 0/5] Some gcov bugfixes and improvements

On 11/19/25 20:11, Jørgen Kvalsvik wrote: On 11/5/25 23:38, Jørgen Kvalsvik wrote: Hi, These patches are a mix of features, bugfixes, and quality of life improvements. * fixes a wrong line count when multiple blocks touch the same line * -fpath-coverage and -fcondition-coverage implies -ftest-

[to-be-committed] RISC-V: Remove unused placeholder_p parameter from add_function

The placeholder_p parameter of function_builder::add_function is always passed as false. This was inherited from the AArch64 implementation but is unnecessary for RISC-V. gcc/ChangeLog: * config/riscv/riscv-vector-builtins.cc (function_builder::add_function): Remove placeholder_p

Re: [PATCH] Match: Optimize (a * b) == 0 to (a == 0) || (b == 0).

在 2025/11/28 12:41, Andrew Pinski 写道: On Thu, Nov 27, 2025 at 5:04 AM Dongyan Chen wrote: This patch implements an optimization to transform (a * b) == 0 to (a == 0) || (b == 0) for signed and unsigned integer. gcc/ChangeLog: * match.pd: New patterns. gcc/testsuite/ChangeLog:

Re: [PATCH] PR tree-optimization/122686 - Undefined bitmasks imply undefined ranges.

On Thu, Nov 27, 2025 at 7:39 PM Andrew MacLeod wrote: > > > On 11/27/25 07:10, Richard Biener wrote: > > On Thu, Nov 27, 2025 at 2:05 AM Andrew MacLeod wrote: > >> > >> On 11/26/25 03:33, Richard Biener wrote: > >>> On Tue, Nov 25, 2025 at 8:54 PM Andrew MacLeod > >>> wrote: > When bitmask