[PATCH] Fix PR ada/33994

2025-11-23 Thread Eric Botcazou
Hi, This fixes an old issue whereby we generate wrong code in Ada for an indexed component in an array with a ludicrously large index type instead of raising Storage_Error. We would probably need the counterpart of int_const_binop for unop in the general case, but that's not worth the hassle s

[PATCH v1 2/3] LoongArch: Optimize [x]vshuf insn to [x]vbitsel insn in some shuffle cases.

2025-11-23 Thread Li Wei
Currently, the shuffle in which LoongArch selects two vectors at corresponding positions is implemented through the [x]vshuf instruction, but this will introduce additional index copies. In this case, the [x]vbitsel.v instruction can be used for optimization. gcc/ChangeLog: * config/loong

[PATCH v1 3/3] LoongArch: General xvbitsel insn combinations optimization for special type.

2025-11-23 Thread Li Wei
In LoongArch, when the permutation idx comes from different vectors and idx is not repeated, for V8SI/V8SF/V4DI/V4DF type vectors, we can use two xvperm.w + one xvbitsel.v instructions or two xvpermi.d + one xvbitsel.v instructions for shuffle optimization. gcc/ChangeLog: * config/loongar

[PATCH v1 1/3] LoongArch: Optimize two 256-bit vectors correspond highpart and lowpart splicing shuffle.

2025-11-23 Thread Li Wei
In LoongArch, we have xvshuf.{b/h/w/d} instructions which can dealt the situation that all low 128-bit elements of the target vector are shuffled by concatenating the low 128-bit elements of the two input vectors, and all high 128-bit elements of the target vector are similarly shuffled. Therefore,

[PATCH] Adjust testcase.

2025-11-23 Thread liuhongt
r16-3760-g9ff5cadac4579f generates more condition move for -march=cascadelake, and causes new failures as below FAIL: gcc.target/i386/pr116896.c scan-assembler-times \tjp\t 2 FAIL: g++.target/i386/pr116896-1.C -std=gnu++20 scan-assembler-times \tjp\t 1 FAIL: g++.target/i386/pr116896-1.C -std=gn

Re: [r16-5526 Regression] FAIL: gcc.dg/vect/bb-slp-41.c scan-tree-dump-not slp1 "vectorizing stmts using SLP" on Linux/x86_64

2025-11-23 Thread Kugan Vivekanandarajah
Hi, I can reproduce this on x86_64. The issue is that bb-slp-41.c expects BB vevtorization to not happen. Look like the original test case had other checks too that has since gone. I have added -fno-tree-loop-im and tested to keep the behaviour the same. Is this OK? Thanks, Kugan > On 23 No

[PATCH v2] libstdc++: Implement P2408R5 Ranges iterators as inputs to non-Ranges algorithms

2025-11-23 Thread Patrick Palka
changes v2: more tests, and the one-argument version of __iter_concept_or_category is now constexpr instead of consteval -- >8 -- >From the paper's abstract: Change the iterator requirements for non-Ranges algorithms. For forward iterators and above that are constant iterators, instead of

Re: [PATCH] RISC-V: Add BF VLS modes and document iterators.

2025-11-23 Thread Kito Cheng
> > It can be just put within BFmode should be fine, I mean > > load/store/move/insert/extract could just use normal vector > > instruction with SEW=16, > > Only tha casting from/to other data types need real BF16 instruction. > > ('real' might not be the right term to describe, but I guess you > >

[PATCH 4/4] testsuite: Fix test requirements

2025-11-23 Thread feedable
Add missing dg-require-effective-target --- gcc/testsuite/c-c++-common/Wdangling-pointer-9.c | 1 + gcc/testsuite/c-c++-common/analyzer/computed-goto-1.c | 1 + gcc/testsuite/c-c++-common/analyzer/infinite-recursion-5.c | 1 + gcc/testsuite/c-c++-common/analyzer/pr102695.c

[PATCH 3/4] testsuite: Fix invalid float test

2025-11-23 Thread feedable
Make floating point test compile on platforms without FE_UPWARD --- gcc/testsuite/gcc.dg/torture/fp-double-convert-float-1.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/gcc.dg/torture/fp-double-convert-float-1.c b/gcc/testsuite/gcc.dg/torture/fp-double-conv

[PATCH 1/4] testsuite: Clean up the weak declaration scanning

2025-11-23 Thread feedable
Add scan-weak function to testsuite, which would work like scan-hidden, and allow for format-specific regexes --- gcc/testsuite/gcc.dg/weak/weak-1.c | 16 +- gcc/testsuite/gcc.dg/weak/weak-10.c | 2 +- gcc/testsuite/gcc.dg/weak/weak-11.c | 2 +- gcc/testsuite/gcc.dg/weak/weak-12.c | 2

[PATCH 2/4] testsuite: Move float tests to ieee directory

2025-11-23 Thread feedable
Move tests for signaling floats to ieee directory --- .../ieee/bfloat16-builtin-issignaling-1.c | 11 ++ .../ieee/bfloat16-builtin-issignaling-1.x | 11 ++ .../execute/ieee}/builtin-issignaling-1.c | 6 -- .../execute/ieee/builtin-issignaling-1.x | 20

[PATCH 0/4] Fix test requirements

2025-11-23 Thread feedable
While hacking on GCC, I found some tests that don't properly set their requirements, or just plain don't compile on some systems. These patches are intended to address that, as well as do some cleanups. feedable (4): testsuite: Clean up the weak declaration scanning testsuite: Move float tests

[PATCH v1 2/2] RISC-V: Add test for vec_duplicate + vmsltu.vv combine with GR2VR cost 0, 1 and 15

2025-11-23 Thread pan2 . li
From: Pan Li Add asm dump check and run test for vec_duplicate + vmsltu.vv combine to vmsltu.vx, with the GR2VR cost is 0, 2 and 15. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Add asm check for vmsltu.vx. * gcc.target/riscv/rvv/autovec/vx_v

[PATCH v1 0/2] RISC-V: Combine vec_duplicate + vmsltu.vv to vmsltu.vx on GR2VR cost

2025-11-23 Thread pan2 . li
From: Pan Li This patch would like to introduce the combine of vec_dup + vmsltu.wv into vmsltu.wx on the cost value of GR2VR. The late-combine will take place if the cost of GR2VRlike 1, 2, 15 in test. From: | ... | vmv.v.x | L1: | vmsltu.vv | J L1 | ... To: | ... | L1: |

[PATCH v1 1/2] RISC-V: Combine vec_duplicate + vmsltu.vv to vmsltu.vx on GR2VR cost

2025-11-23 Thread pan2 . li
From: Pan Li This patch would like to combine the vec_duplicate + vmsltu.wv to the vmsltu.vx. From example as below code. The related pattern will depend on the cost of vec_duplicate from GR2VR. Then the late-combine will take action if the cost of GR2VR is zero, and reject the combination if

Re: [PATCH] LoongArch: Add new template muldi3_ui12 for mul(reg, ui12).

2025-11-23 Thread Lulu Cheng
在 2025/11/22 下午10:37, Xi Ruoyao 写道: On Sat, 2025-11-22 at 22:11 +0800, Xi Ruoyao wrote: On Mon, 2025-11-17 at 14:38 +0800, zhaozhou wrote: Add new template muldi3_ui12 for mul(reg, ui12), which mode is DImode and op2 is const_uns_arith_operand. And the template is matched when the mul operati

Re: [PATCH] LoongArch: Add new template muldi3_ui12 for mul(reg, ui12).

2025-11-23 Thread Zhou Zhao
在 2025/11/22 下午10:37, Xi Ruoyao 写道: On Sat, 2025-11-22 at 22:11 +0800, Xi Ruoyao wrote: On Mon, 2025-11-17 at 14:38 +0800, zhaozhou wrote: Add new template muldi3_ui12 for mul(reg, ui12), which mode is DImode and op2 is const_uns_arith_operand. And the template is matched when the mul operati

Re: [PATCH] gcc: Set native_system_header_dir on aarch64-mingw

2025-11-23 Thread Andrew Pinski
On Thu, Nov 20, 2025 at 9:12 AM FX Coudert wrote: > > Provide a sensible default value for native_system_header_dir, namely > /mingw/include, on aarch64-mingw. This is in line with the expectations > for mingw file locations, and is already set on both x86- and > x86_64-mingw. > > gcc/ChangeLog: >

Re: [PATCH][libgcc] use _dl_find_object based on runtime detection

2025-11-23 Thread H.J. Lu
On Sat, Nov 22, 2025 at 5:47 PM Richard Biener wrote: > > > > > Am 22.11.2025 um 00:29 schrieb H.J. Lu : > > > > On Sat, Nov 22, 2025 at 5:33 AM Florian Weimer wrote: > >> > >> * Richard Biener: > >> > >>> +/* When the glibc we build against does not have dl_find_object > >>> tentatively > >>>

[gccrs COMMIT 2/2] Add test for issue Rust-GCC#3608

2025-11-23 Thread gerris . rs
From: Lúcio Boari Fleury gcc/testsuite/ChangeLog: * rust/compile/macros/mbe/macro-issue3608.rs: New Test. The test skips an issue at line 11 Signed-off-by: Lúcio Boari Fleury --- This change was merged into the gccrs repository and is posted here for upstream visibility and potential

[gccrs COMMIT 1/2] stop an infinite loop at END_OF_FILE

2025-11-23 Thread gerris . rs
From: Lúcio Boari Fleury gcc/rust/ChangeLog: * parse/rust-parse-impl.h: Add early exit condition to parsing loop. Signed-off-by: Lúcio Boari Fleury --- This change was merged into the gccrs repository and is posted here for upstream visibility and potential drive-by review, as requeste

[PATCH] bitint: Fix up BITINT_TYPE alias handling [PR122624]

2025-11-23 Thread Jakub Jelinek
Hi! The testcase in the PR is miscompiled on aarch64 with --param=ggc-min-expand=0 --param=ggc-min-heapsize=0 -O2 (not including it in the testsuite because it is too much of a lottery). Anyway, the problem is that the testcase only uses unsigned _BitInt(66) and never uses _BitInt(66), get_alias_

[committed] hppa: Define GLIBC_DYNAMIC_LINKER in pa64-linux.h

2025-11-23 Thread John David Anglin
Small step toward getting 64-bit glibc working on hppa. Dave --- hppa: Define GLIBC_DYNAMIC_LINKER in pa64-linux.h 2025-11-23 John David Anglin gcc/ChangeLog: * config/pa/pa64-linux.h (GLIBC_DYNAMIC_LINKER): Define. diff --git a/gcc/config/pa/pa64-linux.h b/gcc/config/pa/pa64-linux

[committed] hppa: Enable LRA as default

2025-11-23 Thread John David Anglin
Committed to trunk. Dave --- hppa: Enable LRA as default 2025-11-23 John David Anglin gcc/ChangeLog: PR target/113932 PR target/113933 * config/pa/pa.opt (mlra): Default to LRA instead of reload. diff --git a/gcc/config/pa/pa.opt b/gcc/config/pa/pa.opt index fae4247

[committed] hppa: Fix scaled and unscaled index support on targets with non-equivalent space registers

2025-11-23 Thread John David Anglin
Tested on hppa64-hp-hpux11.11. Committed to trunk. Dave --- hppa: Fix scaled and unscaled index support on targets with non-equivalent space registers HP-UX targets have non-equivalent space registers. The base register in most loads and stores selects the space register used to calculate the

[PATCH] match: Move `(pointer_diff (pointer_plus @0 @2) (pointer_plus @1 @2))` pattern earlier

2025-11-23 Thread Andrew Pinski
This moves the `(pointer_diff (pointer_plus @0 @2) (pointer_plus @1 @2))` pattern to right below the `(pointer_diff (pointer_plus @0 @1) (pointer_plus @0 @2))` pattern to make easier to see both versions are supported. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * match

Re: [PATCH] match: Move two patterns to use fold_before_rtl_expansion_p instead of !canonicalize_math_p

2025-11-23 Thread Richard Biener
> Am 21.11.2025 um 19:44 schrieb Andrew Pinski : > > This moves 2 patterns, `1/x` and `m1 CMP m2) * d` patterns to > use `fold_before_rtl_expansion_p()` instead of `!canonicalize_math_p ()` > it was before. > > These 2 were checking !canonicalize_math_p() before because there was no > other p

[pushed] PR modula2/122801 soname bump for GCC 16

2025-11-23 Thread Gaius Mulley
This patch bumps the libgm2 soname to 21:0:0 ready for the release of GCC 16. libgm2/ChangeLog: PR modula2/122801 * configure: Regenerate. * configure.ac (libtool_VERSION): Assign to 21:0:0. Signed-off-by: Gaius Mulley --- libgm2/configure| 2 +- libgm2/configure.ac

[PATCH] c++/modules: Stream all REQUIRES_EXPR_PARMS [PR122789]

2025-11-23 Thread Nathaniel Shead
Bootstrapped and regtested on x86_64-pc-linux-gnu, OK for trunk/15? -- >8 -- We don't generally stream the TREE_CHAIN of a DECL, as this would cause us to unnecessarily walk into the next member in its scope chain any time it was referenced by an expression. Unfortunately, REQUIRES_EXPR_PARMS is

Re: [PATCH V6 00/50] Algol 68 GCC Front-End

2025-11-23 Thread Jose E. Marchesi
> On Sat, Nov 22, 2025 at 3:41 AM Jose E. Marchesi > wrote: >> >> [Changes from V5: >> - Rebased to today's master. >> - We have added a modules system to support separated compilation, >>based on the MR design, as well as many tests. Compilation units, >>or packets, are either partic

Re: [PATCH V6 00/50] Algol 68 GCC Front-End

2025-11-23 Thread Richard Biener
On Sat, Nov 22, 2025 at 3:41 AM Jose E. Marchesi wrote: > > [Changes from V5: > - Rebased to today's master. > - We have added a modules system to support separated compilation, >based on the MR design, as well as many tests. Compilation units, >or packets, are either particular program

Re: [PATCH v2 1/3] Match: Simplify (T1)(a bit_op (T2)b) to (T1)a bit_op (T1)b

2025-11-23 Thread Richard Biener
On Fri, Nov 21, 2025 at 2:41 PM Li, Pan2 wrote: > > Thanks Richard. > > > Please use (nop_convert (bitop... > > It complains predicate cannot be outermost expr with blow change, is there > something missing from my side? > I searched match.pd with ^\s(nop_con but failed to find anything I can ref

[r16-5526 Regression] FAIL: gcc.dg/vect/bb-slp-41.c scan-tree-dump-not slp1 "vectorizing stmts using SLP" on Linux/x86_64

2025-11-23 Thread Haochen Jiang
On Linux/x86_64, ed1911b9f1f1ab0c1b631f0b6427b798c7056200 is the first bad commit commit ed1911b9f1f1ab0c1b631f0b6427b798c7056200 Author: Kugan Vivekanandarajah Date: Sun Nov 23 15:27:10 2025 +1100 [tree-optimization] Allow LICM to hoist loads in "self write" patterns caused FAIL: gcc.dg