Hi Soumya,
Could you send me the entire patch series as one squashed commit?
It's at the moment a bit hard to review the first couple of one because
a lot of the C++ code becomes auto-generated.
Thanks,
Tamar
> -Original Message-
> From: Soumya AR
> Sent: 10 November 2025 07:49
> To: T
Hi Tamar,
Ping.
Thanks,
Soumya
> On 28 Oct 2025, at 2:55 PM, Soumya AR wrote:
>
>
>
>> On 14 Oct 2025, at 9:07 PM, Tamar Christina wrote:
>>
>> External email: Use caution opening links or attachments
>>
>>
>>> -Original Message-
>>> From: Soumya AR
>>> Sent: 13 October 2025 09:
As for GGC(GCC Garbage Collection), it's use gengtype tool to scan all
source files contain the GTY mark, and generate gt-*.h files. GGC
traversal these file to find gt_root node and marks these objects that
directly or indirectly reference this node as active, then clean up
unmarked object's memor
Hi,
The AMX intrinsics previously used string concatenation with the '#'
operator to construct register names, which prevented their use with
C++ template non-type parameters. This patch converts all AMX intrinsics
to use inline assembly constraints with the %c format specifier.
And Intel style r
The predicate checks if the operand is PLUS(symbol_ref, const_int), but
the match (match_operand 0/1) is not equal XEXP(op, 0/1). It should be
adjusted to use match_test and pass XEXP(op, 0/1) into the constraint
function.
gcc/ChangeLog:
* config/loongarch/predicates.md: Update ops.
---
On Mon, 10 Nov 2025, 06:26 Jakub Jelinek, wrote:
> Hi!
>
> The approved P3778R0 wording doesn't have type_order<_Tp, _Up>::type, so
> this patch removes it.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
>
OK, thanks
> 2025-11-10 Jakub Jelinek
>
> * libsup
Repalce xvpermi to xvbsrl when vector of V4DFmode high 64 bits copy to
low 64 bits, reduce 2 insn delays.
gcc/ChangeLog:
* config/loongarch/lasx.md (lasx_xvbsrl_d_f): New template.
* config/loongarch/loongarch.cc (emit_reduc_half): Replace insn.
gcc/testsuite/ChangeLog:
Hi!
Trivial relocation was voted out of C++26, the following patch
removes it (note, the libstdc++ part was still waiting for patch review
and so doesn't need to be removed).
This isn't a mere revert of r16-2206; I've kept -Wc++26-compat option,
from earlier patches the non-terminal stays to be c
Hi!
While working on CWG3053 I've noticed I forgot to enable diagnostics
on #define indeterminate or #undef indeterminate now that it is handled
as valid C++26 attribute.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2025-11-10 Jakub Jelinek
gcc/cp/
* lex.cc (c
Hi!
The following patch implements CWG3053 approved in Kona, where it is now
valid not just to #define likely(a) or #define unlikely(a, b, c) but also
to #undef likely or #undef unlikely.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2025-11-10 Jakub Jelinek
libcpp/
Hi!
The approved P3778R0 wording doesn't have type_order<_Tp, _Up>::type, so
this patch removes it.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2025-11-10 Jakub Jelinek
* libsupc++/compare: Implement final wording of C++26 P3778R0 - Fix
for type_order
On 30/10/25 11:17, Dhruv Chawla wrote:
External email: Use caution opening links or attachments
On 22/10/25 13:38, [email protected] wrote:
External email: Use caution opening links or attachments
From: Dhruv Chawla
This patch aims to implement summary support in auto-profile, similar to
L
From: Pan Li
Add asm dump check and run test for vec_duplicate + vmseq.vv
combine to vmseq.vx, with the GR2VR cost is 0, 2 and 15.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c: Add asm check
for vmseq.vx.
* gcc.target/riscv/rvv/autovec/vx_vf/v
From: Pan Li
Add asm dump check and run test for vec_duplicate + vmseq.vv
combine to vmseq.vx, with the GR2VR cost is 0, 2 and 15.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Add asm check
for vmseq.vx.
* gcc.target/riscv/rvv/autovec/vx_vf/v
From: Pan Li
There is no additional change for supporting the vmseq.vx combination on
GR2VR cost. thus add test cases to ensure it works well as expected.
The below test suites are passed for this patch series.
* The rv64gcv fully regression test.
Pan Li (2):
RISC-V: Add test for vec_duplica
On Thu, Oct 30, 2025 at 04:28:18PM +, Joseph Myers wrote:
> On Wed, 29 Oct 2025, Lewis Hyatt wrote:
>
> > Thanks very much for reviewing it. That's correct, it is currently
> > only used for PCH. I could add a comment to this effect if you think
> > it's helpful? Like this perhaps:
> >
> > di
From: Matthew Malcomson
This patch is a separate beneficial step of the work I'm doing towards
PR119588. In that bug I describe how some internal workloads are
hitting some performance problems w.r.t. the creation of many parallel
regions one after each other.
I'm attempting to reduce overhead
Thanks, Harald!
On Sun, 9 Nov 2025 22:57:29 +0100
Harald Anlauf wrote:
> Am 08.11.25 um 18:03 schrieb Jerry D:
> > On 11/7/25 8:30 PM, Christopher Albert wrote:
> >> Derived types with recursive allocatable components and FINAL
> >> procedures trigger an ICE in gimplify_call_expr because the
>
On Mon, Mar 17, 2025 at 2:07 PM liuhongt wrote:
>
> It looks like the testcase is fragile, it's supposed to check the
> compiler ability of generating code_6_gottpoff_reloc instruction, but
> failed since there's a seg_prefixed memory
> usage(r14-6242-gd564198f960a2f).
>
> mov r13, QWO
Since the x32 codegen is similar to lp64, drop x32 scan and use the same
scan for x32.
* gcc.target/i386/indirect-thunk-5.c: Drop x32 scan.
* gcc.target/i386/indirect-thunk-6.c: Likewise.
* gcc.target/i386/indirect-thunk-extern-5.c: Likewise.
* gcc.target/i386/indirect-thunk-extern-6.c: Likewise.
Since gcc.target/i386/cmov12.c also fails for x32, similar to ia32, limit
it to lp64.
* gcc.target/i386/cmov12.c: Limit to lp64.
I am checking it in.
--
H.J.
From 9f7c2a15b5fe0b865befdf68ded0e213a3eadf58 Mon Sep 17 00:00:00 2001
From: "H.J. Lu"
Date: Mon, 10 Nov 2025 06:26:59 +0800
Subject: [P
On Sun, Nov 9, 2025 at 10:54 PM Jakub Jelinek wrote:
>
> On Sun, Nov 09, 2025 at 04:48:16PM +0800, H.J. Lu wrote:
> > On Sun, Nov 9, 2025 at 6:09 AM H.J. Lu wrote:
> > >
> > > Since _GLIBCXX_HAVE_TLS isn't defined for x32, remove _ZSt11__once_call
> > > and _ZSt15__once_callable.
> > >
> > > * co
Am 08.11.25 um 18:03 schrieb Jerry D:
On 11/7/25 8:30 PM, Christopher Albert wrote:
Derived types with recursive allocatable components and FINAL procedures
trigger an ICE in gimplify_call_expr because the finalizer wrapper's
result
symbol references itself (final->result = final), creating a
Hi,
On Mon, Nov 03, 2025 at 06:16:05PM +0100, Mark Wielaard wrote:
> On Mon, Oct 27, 2025 at 01:54:28PM +0100, Mark Wielaard wrote:
> > On Mon, 2025-10-20 at 15:13 +, Marc wrote:
> > > On October 20, 2025 2:50:11 PM UTC, Mark Wielaard wrote:
> > > > On Mon, 2025-10-13 at 23:13 +0200, Mark Wie
Commit a1fe2cfa8965 ("fortran: [PR121628]") regenerated libgfortran
Makefile.an and aclocal.m4 files with automake 1.15 instead of 1.15.1.
Run autoreconf version 2.69 with automake 1.15.1 inside libgfortran.
libgfortran/ChangeLog:
* Makefile.in: Regenerate.
* aclocal.m4: Regenerat
On Sun, Nov 09, 2025 at 04:48:16PM +0800, H.J. Lu wrote:
> On Sun, Nov 9, 2025 at 6:09 AM H.J. Lu wrote:
> >
> > Since _GLIBCXX_HAVE_TLS isn't defined for x32, remove _ZSt11__once_call
> > and _ZSt15__once_callable.
> >
> > * config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt:
> > Remove _Z
Since gcc.target/i386/shrink_wrap_1.c also fails for x32, similar to ia32,
limit it to lp64.
* gcc.target/i386/shrink_wrap_1.c: Limit to lp64.
--
H.J.
From 0510499b8b93770527d9b053c4ea06193549caed Mon Sep 17 00:00:00 2001
From: "H.J. Lu"
Date: Sun, 9 Nov 2025 15:13:08 +0800
Subject: [PATCH] gc
On Sun, Nov 9, 2025 at 6:01 AM H.J. Lu wrote:
>
> Adjust gcc.dg/pr90838.c for x32 which has 32-bit long with x86-64 ISA.
>
> * gcc.dg/pr90838.c: Adjust for x32
>
> I am checking in this patch for x32.
>
> --
> H.J.
This is the patch I am checking in.
--
H.J.
From 006eab2ba4e6aa5b78918bb24090087
On Sun, Nov 9, 2025 at 6:09 AM H.J. Lu wrote:
>
> Since _GLIBCXX_HAVE_TLS isn't defined for x32, remove _ZSt11__once_call
> and _ZSt15__once_callable.
>
> * config/abi/post/x86_64-linux-gnu/x32/baseline_symbols.txt:
> Remove _ZSt11__once_call and _ZSt15__once_callable.
>
> I am checking in this pa
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