[PATCH] fortran: Fix ICE and self-assignment bugs with recursive allocatable finalizers [PR90519]

2025-11-07 Thread Christopher Albert
Derived types with recursive allocatable components and FINAL procedures trigger an ICE in gimplify_call_expr because the finalizer wrapper's result symbol references itself (final->result = final), creating a cycle. This patch creates a separate __result_ symbol to break the cycle. Self-assignmen

[PATCH] LoongArch: Don't mix lock-free and locking 16B atomics

2025-11-07 Thread Xi Ruoyao
As [1] says, we cannot mix up lock-free and locking atomics for one object. For example assume atom = (0, 0) initially, if we have a locking "atomic" xor running on T0 and a lock-free store running on T1 concurrently: T0| T1 -+-

[PATCH 3/3] Add support for 1,024 bit DMF registers to the PowerPC.

2025-11-07 Thread Michael Meissner
This patch is a prelimianry patch to add the full 1,024 bit dense math register (DMRs) for -mcpu=future. The MMA 512-bit accumulators map onto the top of the DMR register. This patch only adds the new 1,024 bit register support. It does not add support for any instructions that need 1,024 bit re

[PATCH 2/3] Add support for dense math registers to the PowerPC.

2025-11-07 Thread Michael Meissner
The MMA subsystem added the notion of accumulator registers as an optional feature of ISA 3.1 (power10). In ISA 3.1, these accumulators overlapped with the VSX registers 0..31, but logically the accumulator registers were separate from the FPR registers. In ISA 3.1, it was anticipated that in fut

[PATCH 1/3] Add %wD constraint to the PowerPC

2025-11-07 Thread Michael Meissner
This patch adds a new constraint ('wD') that matches the accumulator registers that overlap with VSX registers 0..31 on power10. Future patches will add the support for a separate accumulator register class that will be used when the support for dense math registes is added. 2025-11-07 Michael

[PATCH 0/3] Add Dense Math support as a possible PowerPC extension

2025-11-07 Thread Michael Meissner
I've had these patches floating around since 2023 that add support for a potential extension to the PowerPC called the dense math facility. The Dense Math Facility (dmf) is designed to be an extension to the ISA 3.1 (i.e. power10/power11) MMA facility. Now, since these are future patches, the Den

Re: [r16-5089 Regression] FAIL: gcc.target/i386/pr105951-2.c (test for excess errors) on Linux/x86_64

2025-11-07 Thread Andrew Pinski
I have a fix which I will be committing later tonight. On Fri, Nov 7, 2025, 7:27 PM Haochen Jiang wrote: > On Linux/x86_64, > > c66ebc3e22138dc505b18865f5337b05a61012ad is the first bad commit > commit c66ebc3e22138dc505b18865f5337b05a61012ad > Author: Andrew Pinski > Date: Mon Oct 27 22:22:0

[r16-5089 Regression] FAIL: gcc.target/i386/pr105951-2.c (test for excess errors) on Linux/x86_64

2025-11-07 Thread Haochen Jiang
On Linux/x86_64, c66ebc3e22138dc505b18865f5337b05a61012ad is the first bad commit commit c66ebc3e22138dc505b18865f5337b05a61012ad Author: Andrew Pinski Date: Mon Oct 27 22:22:08 2025 -0700 Move build_call_nary away from va_list caused FAIL: gcc.target/i386/pr105951-1.c (internal compiler

[COMMITTED] vect: Complete implementation for MULT_EXPR vector lowering [PR122065]

2025-11-07 Thread Avinash Jayakar
Hi, Thanks for the quick review of the v2 patch. I have pushed this patch to the trunk with review comments mentioned in v2 being incorporated. It should now improve vector code gen on power8/9 with altivec types. Regards, Avinash Jayakar Use sequences of shifts and add/sub if the hardware does

Re: [PATCH] Fortran: F2018 extensions to interoperability of procedures [PR113338]

2025-11-07 Thread Jerry D
On 11/7/25 1:37 PM, Harald Anlauf wrote: Dear All, the attached patch adjust the checks for interoperability of procedures, the conditions of which were relaxed in F2018. The testcase is based on the one provided by the reporter. The added examples of interoperable subroutines for the further

[PUSHED] sccp: Fix order of removal of phi (again) [PR122599]

2025-11-07 Thread Andrew Pinski
This time we are gimplifying the expression and call fold_stmt during the gimplification (which is fine) but since we removed the phi and the expression references ssa names in the phi indirectly, things just fall over inside the ranger. This moves the removal of the phi until gimplification happe

Re: [PATCH] fortran: Fix ICE and self-assignment bugs with recursive allocatable finalizers [PR90519]

2025-11-07 Thread Jerry D
On 11/7/25 12:28 PM, Christopher Albert wrote: Derived types with recursive allocatable components and FINAL procedures trigger an ICE in gimplify_call_expr because the finalizer wrapper's result symbol references itself (final->result = final), creating a cycle. This patch creates a separate __r

[PATCH v2] Add support for [[gnu::trivial_abi]] attribute

2025-11-07 Thread Yuxuan Chen
This is V2 of a patch that I have sent previously: https://www.mail-archive.com/[email protected]/msg384874.html The goal of this patch is to address a subtle way to break ABI when the [[clang::trivial_abi]] attribute is applied as documented in this feature request https://gcc.gnu.org/bugzi

Re: [PATCH] vrp: Infer ranges from constant aggregates with initializers (v3)

2025-11-07 Thread Andrew MacLeod
Ranger parts are fine with me. Andrew On 11/7/25 18:12, Martin Jambor wrote: Hi, this patch adds the ability to infer ranges from loads from global constant static aggregates which have static initializers. Even when the load has one or more ARRAY_REFs with an unknown index and thus we do not

[PATCH] vrp: Infer ranges from constant aggregates with initializers (v3)

2025-11-07 Thread Martin Jambor
Hi, this patch adds the ability to infer ranges from loads from global constant static aggregates which have static initializers. Even when the load has one or more ARRAY_REFs with an unknown index and thus we do not know the particular constant that is being loaded, we can traverse the correpond

Re: [PATCH v1 1/3] mingw: emit end of procedure directive as comment

2025-11-07 Thread Saurabh Jha
On 11/3/2025 3:18 PM, Evgeny Karpov wrote: Tue Oct 28 2025 Saurabh Jha wrote: For mingw targets, there is no way to identify the end of function using assembly directives right now. However, emitting an end of function marker now will let us modify check-function-bodies in scanasm.exp, wh

[RFC v2] libstdc++: Optimize handling of optional for views: take, drop, reverse and as_const.

2025-11-07 Thread Tomasz Kamiński
This implements changes from P3913R1. For opt of type optional is view (T is not const), the views::reverse(opt), views::take(opt, n), views::drop(opt, n) now returns optional. In case of views::as_const, the optional is converted into optional, we do not return optional in non-reference case, as

Re: [PATCH] aarch64: Add support for -mcpu=ampere1c

2025-11-07 Thread Andrew Pinski
On Fri, Nov 7, 2025 at 8:06 AM Philipp Tomsich wrote: > > This adds support for the Ampere1c core to the AArch64 backend. The > initial patch only adds the core feature set (ARMv9.2 + extensions) > and does not add any special tuning decisions, and those may come > later. > > Bootstrapped and test

Re: [PATCH v3 3/5] aarch64: Remove redundant checks

2025-11-07 Thread Andrew Pinski
On Thu, Nov 6, 2025 at 8:51 AM Karl Meakin via Sourceware Forge wrote: > > > From: Karl Meakin > > The checks for `code == UNEQ || code == LTGT` are unecessary, because > they are already excluded by `aarch64_comparison_operator` Ok. > > gcc/ChangeLog: > > * config/aarch64/aarch64.md (m

Re: [PATCH v3 4/5] aarch64: Add `aarch64_comparison_operator_cc`

2025-11-07 Thread Andrew Pinski
On Thu, Nov 6, 2025 at 8:43 AM Karl Meakin via Sourceware Forge wrote: > > > From: Karl Meakin > > Deduplicate the checks against `ccmode` by extracting to a new > predicate. Ok. > > gcc/ChangeLog: > > * config/aarch64/aarch64.md(movcc): Use new predicate. > (movcc): Likewise. >

[PATCH v2] c: Fix return type of _Countof [PR112591]

2025-11-07 Thread Alejandro Colomar
PR c/122591 gcc/c-family/ChangeLog: * c-common.cc (c_countof_type): Convert return value to size_t. gcc/testsuite/ChangeLog: * gcc.dg/countof-compile.c (type): Test return type of _Countof. Reported-by: Sam James Suggested-by: Andrew Pinski Signed-off-by: Alejandro Co

[PATCH] Fortran: F2018 extensions to interoperability of procedures [PR113338]

2025-11-07 Thread Harald Anlauf
Dear All, the attached patch adjust the checks for interoperability of procedures, the conditions of which were relaxed in F2018. The testcase is based on the one provided by the reporter. The added examples of interoperable subroutines for the further cases are not really needed, as they are a

[pushed: r16-5091] gdbhooks.py: add printers for analyzer types (supernode and exploded_node)

2025-11-07 Thread David Malcolm
Tested by hand; this leads to output like this: (gdb) p m_enode_for_diag $1 = (gdb) p m_enode_for_diag->get_supernode () $2 = Pushed to trunk as r16-5091-g90a7e657ba3f92. gcc/ChangeLog: * gdbhooks.py (class AnaSupernodePrinter): New. (class AnaExplodedNodePrinter): New.

[pushed: r16-5090] analyzer: fix stray trailing "allocated here" text in events

2025-11-07 Thread David Malcolm
Fix event text like this (seen in gcc.dg/analyzer/allocation-size-5.c): 31 | char arr[sizeof (int16_t)]; |^~~ || |(1) allocated 2 bytes hereallocated here Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as r16-5090-gfce

Re: [PATCH, V6] Add -mcpu=future suppor to the PowerPC

2025-11-07 Thread Michael Meissner
I have updated this patch with the V7 version. https://gcc.gnu.org/pipermail/gcc-patches/2025-November/699956.html In V6, I forgot to update the .machine directive to use "future". The V7 patch fixes that. -- Michael Meissner, IBM PO Box 98, Ayer, Massachusetts, USA, 01432 email: meiss...@linu

[PATCH, V7] Add -mcpu=future to the PowerPC

2025-11-07 Thread Michael Meissner
I originally made a more complicated patch (V5) on September 22nd, 2025 that tried to do infrastructure cleanup as well as adding -mcpu=future. This patch is a more limited patch in that it just adds the -mcpu=future patch, and it does not do the other infrastructure work. I submitted the V6 patc

[PATCH] fortran: Fix ICE and self-assignment bugs with recursive allocatable finalizers [PR90519]

2025-11-07 Thread Christopher Albert
Derived types with recursive allocatable components and FINAL procedures trigger an ICE in gimplify_call_expr because the finalizer wrapper's result symbol references itself (final->result = final), creating a cycle. This patch creates a separate __result_ symbol to break the cycle. Self-assignmen

Re: [PATCH v1 2/3] aarch64: mingw: Make long double 64 bit

2025-11-07 Thread Saurabh Jha
On 11/3/2025 3:42 PM, Evgeny Karpov wrote: Tue Oct 28 2025 Saurabh Jha wrote: +case $host in + aarch64-*-mingw* | aarch64-*-cygwin*) +LIBGOMP_CHECKED_REAL_KINDS="4 8" ;; + *) It looks like the first introduction of aarch64-*-cygwin in the GNU toolchain. The work on preparing the intr

Re: [PATCH v1 0/3] aarch64: mingw: Add more support for ABI

2025-11-07 Thread Saurabh Jha
On 11/3/2025 4:06 PM, Evgeny Karpov wrote: Tue Oct 28 2025 Saurabh Jha wrote: For master, it fails on step 4 because mingw-crt needs long double to be 8 bytes. So I couldn't run regression tests for aarch64-w64-mingw32 on master. After these commits are applied, the test summary looks like t

Re: [RFC] Move build_call_nary away from va_list

2025-11-07 Thread Andrew Pinski
On Fri, Nov 7, 2025 at 8:28 AM Jeff Law wrote: > > > > On 10/27/25 11:29 PM, Andrew Pinski wrote: > > Instead of a va_list here we can create a std::initializer_list that > > contains the > > arguments and pass that. > > This is just one quick version of what was mentioned during the Reviewing >

[PATCH] C: fix issues when supporting counted_by fields in anonymous structure/unions [PR122495, PR122496]

2025-11-07 Thread Qing Zhao
Currently, GCC does not fully support the cases when a FAM or pointer field and its corresponding counted_by field are in different anonymous structure/unions of a common named structure. For example: struct nested_mixed { struct { union { int b; float f; }; int n; };

[PATCH v2 3/3] aarch64: mingw: Implement support for variadic ABI

2025-11-07 Thread Saurabh Jha via Sourceware Forge
From: Saurabh Jha The aarch64-w64-mingw32 target is different from aarch64-**-linux-gnu targets with respect to how arguments for variadic functions are handled. Specifically: 1. Homogeneous Floating-Point Aggregate (HFA) and Homogeneous Vector Aggregate (HVA) are not handled in a special wa

[PATCH v2 2/3] aarch64: mingw: Make long double 64 bit

2025-11-07 Thread Saurabh Jha via Sourceware Forge
From: Saurabh Jha On windows targets, the size of long double is 64 bits. Therefore, unlike aarch64-**-linux-gnu, where the size of long double is 128 bits, the size of long double for aarch64-w64-mingw32 has to be 64 bits. This commit makes changes to gcc and libgfortran so that long double is

[PATCH v2 1/3] aarch64: mingw: emit seh_endproc as comment

2025-11-07 Thread Saurabh Jha via Sourceware Forge
From: Saurabh Jha For mingw targets, there is no way to identify the end of function using assembly directives right now. This patch adds such directive as a comment. This is not a real directive because some other things, like Structured Exception Handling (SEH), needs to be supported before w

[PATCH v2 0/3] aarch64: mingw: Add more support for ABI

2025-11-07 Thread Saurabh Jha via Sourceware Forge
Hi gcc-patches mailing list, Saurabh Jha has requested that the following forgejo pull request be published on the mailing list. Created on: 2025-10-28 12:52:52+00:00 Latest update: 2025-11-07 20:08:24+00:00 Changes: 16 changed files, 728 additions, 32 deletions Head revision: saurabh.jha/gcc-TE

[PUSHED] testsuite: Move complex-operations-run.c to vect-complex-operations-run.c [PR122602]

2025-11-07 Thread Andrew Pinski
The vect testsuite is special in that not everything named *.c will be run so this testcase needs to be named vect-* to be able to run. Pushed as obvious after making sure it at least now compiles for aarch64-linux-gnu. PR testsuite/122602 gcc/testsuite/ChangeLog: * gcc.dg/vect/

[Ada] Fix bogus error on inherited operation for extension of instantiated type

2025-11-07 Thread Eric Botcazou
It comes from a small discrepancy between class-wide subtypes and types: they both have unknown discriminants, but only the latter may have discriminants, which causes Subtypes_Statically_Match to incorrectly return False. Tested on x86-64/Linux, applied on the mainline. 2025-11-07 Eric Botca

Re: [RFC 7/9] Update constant creation for BB SLP with predicated tails

2025-11-07 Thread Christopher Bazley
On 07/11/2025 13:35, Richard Biener wrote: On Wed, 5 Nov 2025, Christopher Bazley wrote: On 28/10/2025 13:51, Richard Biener wrote: On Tue, 28 Oct 2025, Christopher Bazley wrote: vect_create_constant_vectors is updated to pad with zeros between the end of a group and the end of a vector of

Re: [PATCH 1/3] Improve range_on_edge for GENERIC expressions

2025-11-07 Thread Andrew MacLeod
On 11/7/25 13:28, Richard Biener wrote: Am 07.11.2025 um 15:46 schrieb Andrew MacLeod :  On 11/7/25 08:29, Richard Biener wrote: When feeding non-SSA names to range_on_edge we degrade to a non-contextual query even though range_on_exits handling suggests that we can do better. The followi

[PATCH] RISC-V: Add flag to adjust mem inlining threshold

2025-11-07 Thread Edwin Lu
Add param flags to adjust the memcpy/memove/memset inlining threshold. The threshold can be updated with --param=-size-threshold= Default is currently set for disabled. gcc/ChangeLog: * config/riscv/riscv-string.cc (riscv_expand_block_move_scalar): Add length check. (expa

Re: [PATCH] aarch64: Use eor3 for more double xor cases

2025-11-07 Thread Wilco Dijkstra
Hi Kyrill, This looks like an old version of the patch - so hold off on review... Cheers, Wilco

Re: [PATCH] aarch64: Use eor3 for more double xor cases

2025-11-07 Thread Kyrylo Tkachov
> On 7 Nov 2025, at 10:42, Kyrylo Tkachov wrote: > > > >> On 7 Nov 2025, at 10:23, Andre Vieira wrote: >> >> Expands the use of eor3 where we'd otherwise use two vector eor's. >> >> Bootstrapped and regression tested on aarch64-none-linux-gnu. >> >> OK for trunk? >> >> gcc/ChangeLog: >>

Re: [PATCH] aarch64: Use eor3 for more double xor cases

2025-11-07 Thread Kyrylo Tkachov
> On 7 Nov 2025, at 10:23, Andre Vieira wrote: > > Expands the use of eor3 where we'd otherwise use two vector eor's. > > Bootstrapped and regression tested on aarch64-none-linux-gnu. > > OK for trunk? > > gcc/ChangeLog: > > * config/aarch64/aarch64-simd.md (*eor3q4): New insn to be used by

Re: [PATCH v2 2/2] aarch64: Add new target options for 2024 Architecture Extension and Armv9.6-A

2025-11-07 Thread Alice Carlotti
On Mon, Nov 03, 2025 at 01:45:14PM +, Alfie Richards wrote: > This does not add support for these version (and the corresponding > __ARM_FEATURE_ macros aren't implemented for this reason) but > accepts the command line strings and allows these to be passed on to > the assembler. This is missi

[PATCH] vect: Give up if there is no offset_vectype.

2025-11-07 Thread Robin Dapp
Hi, vect_gather_scatter_fn_p currently ICEs if offset_vectype is NULL. This is an oversight in the patches that relax the gather/scatter detection. Catch this. Bootstrapped and regtested on x86 and power10. Regtested on aarch64 and riscv64. Regards Robin gcc/ChangeLog: * tree-vec

Re: [PATCH 1/3] Improve range_on_edge for GENERIC expressions

2025-11-07 Thread Richard Biener
> Am 07.11.2025 um 15:46 schrieb Andrew MacLeod : > >  >> On 11/7/25 08:29, Richard Biener wrote: >> When feeding non-SSA names to range_on_edge we degrade to a >> non-contextual query even though range_on_exits handling suggests >> that we can do better. The following does what it does in >>

Re: [RFC][PATCH] PR 102829 - Add non-zero attribute to atomic loads

2025-11-07 Thread Andrew MacLeod
On 11/7/25 11:15, Andrew MacLeod wrote: On 11/7/25 00:46, Andrew Pinski wrote: On Thu, Nov 6, 2025 at 6:22 PM Andrew MacLeod wrote: I can add a check in the inferred range manager for atomic loads to resolve this PR. The IL sequence tends to look like:   _1 = &this_2(D)->b;   __ato

[PATCH] aarch64: Use eor3 for more double xor cases

2025-11-07 Thread Andre Vieira
Expands the use of eor3 where we'd otherwise use two vector eor's. Bootstrapped and regression tested on aarch64-none-linux-gnu. OK for trunk? gcc/ChangeLog: * config/aarch64/aarch64-simd.md (*eor3q4): New insn to be used by combine after reload to optimize any grouping of eor'

[RFC] libstdc++: Optimize handling of optional for views: take, drop, reverse and as_const.

2025-11-07 Thread Tomasz Kamiński
This implements changes from P3913R1. For opt of type optional is view (T is not const), the views::reverse(opt), views::take(opt, n), views::drop(opt, n) now returns optional. In case of views::as_const, the optional is converted into optional, we do not return optional in non-reference case, as

[PATCH] libstdc++: Optimize handling of optional for views: take, drop, reverse and as_const.

2025-11-07 Thread Tomasz Kamiński
This implements changes from P3913R1. For opt of type optional is view (T is not const), the views::reverse(opt), views::take(opt, n), views::drop(opt, n) now returns optional. In case of views::as_const, the optional is converted into optional, we do not return optional in non-reference case, as

Re: [PATCH v2 1/2] libstdc++: optional for function and unbounded array should not be range [PR122396]

2025-11-07 Thread Tomasz Kaminski
On Fri, Nov 7, 2025 at 5:15 PM Tomasz Kamiński wrote: > This implements proposed resolution for LWG4308 [1]. > > For T denoting either function type or unbounded array, the optional no > longer exposes iterator, and viable begin/end members. The conditionally > provided iterator type, it is now d

Re: [PATCH] bpf: improve memmove inlining [PR122140]

2025-11-07 Thread Jose E. Marchesi
Hi Faust. OK. Thanks! > The BPF backend inline memmove expansion was broken for certain > constructs. This patch addresses the two underlying issues: > 1. Off-by-one in the "backwards" unrolled move loop offset. > 2. Poor use of temporary register for the generated move loop, which >could

[PATCH] vect: Do not set range for step != 1 [PR121985].

2025-11-07 Thread Robin Dapp
Hi, In PR120922 we first disabled setting a range on niters_vector for partial vectorization and later introduced a ceiling division instead. In PR121985 we ran into this again where a bogus range caused wrong code later. On top I saw several instances of this issue on a local branch that enable

Re: [PATCH] [riscv] avoid auipc overflow with large offsets [PR91420]

2025-11-07 Thread Andreas Schwab
On Nov 07 2025, Jeff Law wrote: > I'll assume that mame fits in the medlow model? I haven't built mame in > ages, but my recollection was that it was extremely large. The static > parts all have to fit in a 2G. See https://build.opensuse.org/package/show/openSUSE:Factory:RISCV/mame for the same

[PATCH] optabs: Do not pun modes smaller than QImode.

2025-11-07 Thread Robin Dapp
Hi, In can_vec_perm_const_p if we cannot directly permute a vector mode we try to pun it with a byte mode. qimode_for_vec_perm checks gets the mode size and uses that as number of elements for the new QImode vector. This doesn't work for RVV mask vectors, though: First, their precision might be

Re: [RFC] Move build_call_nary away from va_list

2025-11-07 Thread Jeff Law
On 10/27/25 11:29 PM, Andrew Pinski wrote: Instead of a va_list here we can create a std::initializer_list that contains the arguments and pass that. This is just one quick version of what was mentioned during the Reviewing refactoring goals and acceptable abstractions. The generated code sh

Re: [RFC][PATCH] PR 102829 - Add non-zero attribute to atomic loads

2025-11-07 Thread Andrew MacLeod
On 11/7/25 00:46, Andrew Pinski wrote: On Thu, Nov 6, 2025 at 6:22 PM Andrew MacLeod wrote: I can add a check in the inferred range manager for atomic loads to resolve this PR. The IL sequence tends to look like: _1 = &this_2(D)->b; __atomic_load_8 (_1, 0); Just want to make sur

[PATCH v2 1/2] libstdc++: optional for function and unbounded array should not be range [PR122396]

2025-11-07 Thread Tomasz Kamiński
This implements proposed resolution for LWG4308 [1]. For T denoting either function type or unbounded array, the optional no longer exposes iterator, and viable begin/end members. The conditionally provided iterator type, it is now defined in __optional_ref_base base class. Furthermore, range sup

[PATCH v5 2/2] aarch64: Add support for fmv priority syntax.

2025-11-07 Thread Alfie Richards
Adds support for the AArch64 fmv priority syntax. This allows users to override the default function ordering. For example: ```c int bar [[gnu::target_version("default")]] (int){ return 1; } int bar [[gnu::target_version("dotprod;priority=2")]] (int) { return 2; } int bar [[gnu::target_ver

[PATCH v5 1/2] targethooks: Change SAME_FUNCTION_VERSIONS hook to support checking mergeability

2025-11-07 Thread Alfie Richards
This changes the hook to support checking version mergeability for cases where the version strings do imply the same version, but are conflicting in some other way so cannot be merged. This is a change required for adding priority version support in aarch64. gcc/ChangeLog: * target.def (

[PATCH v5 0/2] fmv: aarch64: targethooks: Add priority syntax.

2025-11-07 Thread Alfie Richards
Hello, Thank you for the feedback! I discussed this patch offline with Richard E and in doing so realised I could simplify this signifficanly checking the priority values mergeability in diagnose_mismatched_decls instead of disjoint_version_decls. This makes more sense for a lot of reasons. Cha

[PATCH] aarch64: Add support for -mcpu=ampere1c

2025-11-07 Thread Philipp Tomsich
This adds support for the Ampere1c core to the AArch64 backend. The initial patch only adds the core feature set (ARMv9.2 + extensions) and does not add any special tuning decisions, and those may come later. Bootstrapped and tested on aarch64-none-linux-gnu. gcc/ChangeLog: * config/aarc

Re: [PATCH] openmp, nvptx: ompx_gnu_managed_mem_alloc

2025-11-07 Thread Andrew Stubbs
On 07/11/2025 12:08, Andrew Stubbs wrote: My v2 patch is attached, with the env.c, documentation, and changelog changes requested. I also spotted I had "is_device_addr", instead of "has_device_address". Is it OK now? After discussing some of the other issues offline, I think I now understand

Re: [PATCH v1 0/2] Fix return type of _Countof [PR112591]

2025-11-07 Thread Alejandro Colomar
Hi Joseph, On Fri, Nov 07, 2025 at 03:29:01PM +, Joseph Myers wrote: > On Fri, 7 Nov 2025, Alejandro Colomar wrote: > > > The first patch adds a test, and the second one makes the test succeed. > > My reproducer posted on the GCC bugzilla also succeeds after this patch, > > as a sanity check.

Re: [PATCH] [riscv] avoid auipc overflow with large offsets [PR91420]

2025-11-07 Thread Jeff Law
On 10/26/25 2:57 PM, Andreas Schwab wrote: On Okt 26 2025, Alexandre Oliva wrote: OTOH, the uses of the INT_MAX constant in testcases from the duped PRs 114168 and 117460, that get added to data symbols because of loop IV optimizations, don't seem artificial to me. It looks like reasonable

Re: [RFC][PATCH] PR 102829 - Add non-zero attribute to atomic loads

2025-11-07 Thread Jeff Law
On 11/6/25 7:22 PM, Andrew MacLeod wrote: I can add a check in the inferred range manager for atomic loads to resolve this PR. The IL sequence tends to look like:     _1 = &this_2(D)->b;     __atomic_load_8 (_1, 0); Just want to make sure I get this right since memory operations are not

Re: [RFC][PATCH] PR 102829 - Add non-zero attribute to atomic loads

2025-11-07 Thread Jeff Law
On 11/6/25 10:46 PM, Andrew Pinski wrote: On Thu, Nov 6, 2025 at 6:22 PM Andrew MacLeod wrote: Isn't the other route on fixing this is by adding the nonnull attribute to these builtins? I tried looking to see if anyone had mentioned why these builtins didn't have the nonnull attribute on

Re: [PATCH v1 0/2] Fix return type of _Countof [PR112591]

2025-11-07 Thread Joseph Myers
On Fri, 7 Nov 2025, Alejandro Colomar wrote: > The first patch adds a test, and the second one makes the test succeed. > My reproducer posted on the GCC bugzilla also succeeds after this patch, > as a sanity check. Please send patches in bisectable form, so not adding a failing test like this be

[PATCH v1 2/2] c: Fix return type of _Countof [PR112591]

2025-11-07 Thread Alejandro Colomar
PR c/122591 gcc/c-family/ChangeLog: * c-common.cc (c_countof_type): Convert return value to size_t. Reported-by: Sam James Suggested-by: Andrew Pinski Signed-off-by: Alejandro Colomar --- gcc/c-family/c-common.cc | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) d

[PATCH v1 1/2] testsuite: Test return type of _Countof [PR112591]

2025-11-07 Thread Alejandro Colomar
PR c/122591 gcc/testsuite/ChangeLog: * gcc.dg/countof-compile.c (type): Test return type of _Countof. Reported-by: Reported-by: Sam James Signed-off-by: Alejandro Colomar --- gcc/testsuite/gcc.dg/countof-compile.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/gcc/t

[PATCH v1 0/2] Fix return type of _Countof [PR112591]

2025-11-07 Thread Alejandro Colomar
Hi Joseph, This is a fix for _Countof(), to make it return a size_t. Previously, it was returning a 'sizetype', some GCC internal stuff incompatible with all standard integer types. The first patch adds a test, and the second one makes the test succeed. My reproducer posted on the GCC bugzilla a

Re: [PATCH v2 2/2] c: Refactor c_parser_unary_expression()

2025-11-07 Thread Alejandro Colomar
Hi Joseph, On Fri, Nov 07, 2025 at 02:56:52PM +, Joseph Myers wrote: > On Thu, 6 Nov 2025, Alejandro Colomar wrote: > > > Hi Joseph, > > > > A gentle ping, now that Sandra has merged patch 1/1. > > This patch does not apply any more. Hmmm, I'll have a look tonight. Thanks! Have a lovely

Re: [PATCH v2 2/2] c: Refactor c_parser_unary_expression()

2025-11-07 Thread Joseph Myers
On Thu, 6 Nov 2025, Alejandro Colomar wrote: > Hi Joseph, > > A gentle ping, now that Sandra has merged patch 1/1. This patch does not apply any more. -- Joseph S. Myers [email protected]

Re: [PATCH 1/3] Improve range_on_edge for GENERIC expressions

2025-11-07 Thread Andrew MacLeod
On 11/7/25 08:29, Richard Biener wrote: When feeding non-SSA names to range_on_edge we degrade to a non-contextual query even though range_on_exits handling suggests that we can do better. The following does what it does in range_on_edge directly, passing the edge source as 'bbend' argument to

Re: [RFC 3/9] Implement recording/getting of mask/length for BB SLP

2025-11-07 Thread Richard Biener
On Wed, 5 Nov 2025, Christopher Bazley wrote: > > On 28/10/2025 13:29, Richard Biener wrote: > > On Tue, 28 Oct 2025, Christopher Bazley wrote: > > > > +/* Materialize length number INDEX for a group of scalar stmts in SLP_NODE > > that > > + operate on NVECTORS vectors of type VECTYPE, where 0

Re: [RFC 3/9] Implement recording/getting of mask/length for BB SLP

2025-11-07 Thread Richard Biener
On Thu, 6 Nov 2025, Christopher Bazley wrote: > > On 05/11/2025 12:25, Richard Biener wrote: > > On Tue, 4 Nov 2025, Christopher Bazley wrote: > > > >> On 28/10/2025 13:29, Richard Biener wrote: > +/* Materialize mask number INDEX for a group of scalar stmts in SLP_NODE > that > +

Re: [PATCH v2] arm: always enable both simd and mve builtins

2025-11-07 Thread Christophe Lyon
ping? On Thu, 18 Sept 2025 at 22:37, Christophe Lyon wrote: > > On Mon, 18 Aug 2025 at 19:30, Christophe Lyon > wrote: > > > > We get lots of error messages when compiling arm_neon.h under > > e.g. -mcpu=cortex-m55, because Neon builtins are enabled only when > > !TARGET_HAVE_MVE. This has been

Re: [RFC 3/9] Implement recording/getting of mask/length for BB SLP

2025-11-07 Thread Richard Biener
On Wed, 5 Nov 2025, Christopher Bazley wrote: > > On 28/10/2025 13:29, Richard Biener wrote: > > On Tue, 28 Oct 2025, Christopher Bazley wrote: > > > >> +tree > >> +vect_slp_get_bb_mask (slp_tree slp_node, gimple_stmt_iterator *gsi, > >> +unsigned int nvectors, tree vectype, unsig

Re: [RFC 7/9] Update constant creation for BB SLP with predicated tails

2025-11-07 Thread Richard Biener
On Wed, 5 Nov 2025, Christopher Bazley wrote: > > On 28/10/2025 13:51, Richard Biener wrote: > > On Tue, 28 Oct 2025, Christopher Bazley wrote: > > > >> vect_create_constant_vectors is updated to pad with zeros > >> between the end of a group and the end of a vector of the type > >> chosen for th

[PATCH 2/3] Use ranger when simplifying conditions during niter analysis

2025-11-07 Thread Richard Biener
The following uses ranger to try to simplify boolean expressions in simplify_using_initial_conditions as used by niter analysis. We also try to simplify niter expressions themselves, but we cannot use ranger directly for this. * tree-ssa-loop-niter.cc (simplify_using_initial_conditions):

[PATCH 3/3] Enable ranger for the vectorizer

2025-11-07 Thread Richard Biener
The following enables ranger for the vectorizer, this lets niter analysis use the active ranger to simplify conditions. PR tree-optimization/122587 * tree-vectorizer.cc (pass_vectorize::execute): Enable ranger around analysis and code generation. --- gcc/tree-vectorizer.cc

[PATCH 1/3] Improve range_on_edge for GENERIC expressions

2025-11-07 Thread Richard Biener
When feeding non-SSA names to range_on_edge we degrade to a non-contextual query even though range_on_exits handling suggests that we can do better. The following does what it does in range_on_edge directly, passing the edge source as 'bbend' argument to get_tree_range if the edge source has a sin

[PATCH] arm: [MVE] Fix carry-in support for vadcq / vsbcq [PR122189]

2025-11-07 Thread Christophe Lyon
Hi, Is this combination of commits 027205879733933ec991c230795da6c01ac50029 and 697ccadd7217316ea91ddd978ddc944e6df09522 OK for gcc-15? Thanks, Christophe The vadcq and vsbcq patterns had two problems: - the adc / sbc part of the pattern did not mention the use of vfpcc - the carry calcultation

Re: [PATCHv2] arm: Add support for _BitInt(N)

2025-11-07 Thread Andre Vieira
I am still waiting for a review on this (I'll make the libgcc change before committing if the rest is deemed ok). Just FYI I have figured out what is making the last two test cases fail, was waiting to commit this and open a bugzilla as recommend by Jakub, but I'll write it up here before I fo

Re: [PATCH] openmp, nvptx: ompx_gnu_managed_mem_alloc

2025-11-07 Thread Andrew Stubbs
On 06/11/2025 23:10, Tobias Burnus wrote: Andrew Stubbs wrote: This adds support for using Cuda Managed Memory with omp_alloc.  AMD support will be added in a future patch. There is one new predefined allocator, "ompx_gnu_managed_mem_alloc", plus a corresponding memory space, which can be us

Re: [PATCH v2] vect: Complete implementation for MULT_EXPR vector lowering [PR122065]

2025-11-07 Thread Richard Biener
On Fri, 7 Nov 2025, Avinash Jayakar wrote: > Hi, > > Thanks for reviewing v1 of the patch. Incorporated the changes mentioned in > review comments. > Bootstrapped and regtested on powerpc64le-linux-gnu and x86_64-linux-gnu. > Kindly review. Is this ok for trunk? > > Changes from v1: > - Streamli

[PATCH v2] vect: Complete implementation for MULT_EXPR vector lowering [PR122065]

2025-11-07 Thread Avinash Jayakar
Hi, Thanks for reviewing v1 of the patch. Incorporated the changes mentioned in review comments. Bootstrapped and regtested on powerpc64le-linux-gnu and x86_64-linux-gnu. Kindly review. Is this ok for trunk? Changes from v1: - Streamline guard checks in mult lowering. - Check target support befor

RE: [PATCH v1] RISC-V: Combine vsext.vf2 and vsll.vi to vwsll.vi on ZVBB

2025-11-07 Thread Li, Pan2
Oh, I see, thanks Robin. Pan -Original Message- From: Robin Dapp Sent: Friday, November 7, 2025 6:02 PM To: Li, Pan2 ; Robin Dapp ; [email protected] Cc: [email protected]; [email protected]; [email protected]; Chen, Ken ; Liu, Hongtao ; Robin Dapp Subject: Re: [PATC

Re: [PATCH v1 0/1] arm: [MVE] Fix operands order in vbicq_f [PR122223]

2025-11-07 Thread Christophe Lyon
On Fri, 7 Nov 2025 at 11:53, Christophe Lyon via Sourceware Forge wrote: > > Hi gcc-patches mailing list, > Christophe Lyon has requested that the following forgejo > pull request > be published on the mailing list. > > Created on: 2025-10-21 15:10:12+00:00 > Latest update: 2025-11-07 10:49:36+0

[PATCH v1 0/1] arm: [MVE] Fix operands order in vbicq_f [PR122223]

2025-11-07 Thread Christophe Lyon via Sourceware Forge
Hi gcc-patches mailing list, Christophe Lyon has requested that the following forgejo pull request be published on the mailing list. Created on: 2025-10-21 15:10:12+00:00 Latest update: 2025-11-07 10:49:36+00:00 Changes: 2 changed files, 33 additions, 2 deletions Head revision: clyon/gcc-TEST re

[PATCH v1 1/1] arm: [MVE] Fix operands order in vbicq_f [PR122223]

2025-11-07 Thread Christophe Lyon via Sourceware Forge
From: Christophe Lyon The operands of the floating-point version of vbicq were swapped, this patch fixes this. For this backport the testcase needs an adjustment: the code is less optimized than with gcc-15, so we still generate the 0.0f constant and a vbic instruction. We actually check that

Re: [PATCH v1 0/1] arm: [MVE] Fix operands order in vbicq_f [PR122223]

2025-11-07 Thread Christophe Lyon
On Fri, 7 Nov 2025 at 11:44, Christophe Lyon via Sourceware Forge wrote: > > Hi gcc-patches mailing list, > Christophe Lyon has requested that the following forgejo > pull request > be published on the mailing list. > > Created on: 2025-10-21 15:05:50+00:00 > Latest update: 2025-11-07 10:42:54+0

[PATCH v1 1/1] arm: [MVE] Fix operands order in vbicq_f [PR122223]

2025-11-07 Thread Christophe Lyon via Sourceware Forge
From: Christophe Lyon The operands of the floating-point version of vbicq were swapped, this patch fixes this. For this backport the testcase needs an adjustment: the code is less optimized than with gcc-15, so we still generate the 0.0f constant and a vbic instruction. We actually check that

Re: [PATCH 1/8] builtin: Add builtin types and function declarations for integer atomic fetch min/max

2025-11-07 Thread Matthew Malcomson
On 11/4/25 12:43, Jakub Jelinek wrote: External email: Use caution opening links or attachments On Tue, Nov 04, 2025 at 11:33:05AM +, Matthew Malcomson wrote: We've been meaning to send this email for a while after the Cauldron. IIUC you discussed this with Ramana there -- my understand

[PATCH v1 0/1] arm: [MVE] Fix operands order in vbicq_f [PR122223]

2025-11-07 Thread Christophe Lyon via Sourceware Forge
Hi gcc-patches mailing list, Christophe Lyon has requested that the following forgejo pull request be published on the mailing list. Created on: 2025-10-21 15:05:50+00:00 Latest update: 2025-11-07 10:42:54+00:00 Changes: 2 changed files, 33 additions, 2 deletions Head revision: clyon/gcc-TEST re

Re: [COMMITTED] AArch64, ARM: Clean up documentation of -mbranch-protection.

2025-11-07 Thread Richard Earnshaw (lists)
Thank you Sandra, that looks much better. R. On 06/11/2025 22:41, Sandra Loosemore wrote: > While working on other things, I noticed that the documentation for > the -mbranch-protection= option was pretty garbled on both aarch64 and > arm targets, with incorrect markup, too much syntax crammed in

Re: [PATCH] vect: Do not convert offset type in strided gather.

2025-11-07 Thread Richard Biener
On Thu, Nov 6, 2025 at 4:37 PM Robin Dapp wrote: > > Hi, > > The gather/scatter relaxation patches introduced a bug with > vect_use_strided_gather_scatters_p. I didn't want to pass > supported_offset_vectype and supported scale all the way from > vect_truncate_gather_scatter_offset and > vect_use

Re: [PATCH v2] isel: Check bounds before converting VIEW_CONVERT to VEC_SET. [PR122126]

2025-11-07 Thread Richard Biener
On Fri, 7 Nov 2025, Avinash Jayakar wrote: > > > > > Please use { target avx2 } instead in both testcases. > > > > OK with those changes. > > Richard. > > Thank you! Should it be committed in 13/14/15 releases as well? If if ICEs also on branches sure, but please leave a week or so to iron ou

Re: [PATCH 1/3] RISC-V: Fix riscv_subword_address for big-endian targets.

2025-11-07 Thread Djordje Todorovic
Hi Jeff, Thanks a lot for the feedback. We are adding tests and will send patches again. Best, Djordje From: Jeff Law Sent: Friday, October 17, 2025 4:56 PM To: Aleksa Paunovic ; [email protected] Cc: Djordje Todorovic ; Chao-ying Fu Subject: Re

[PATCH] tree-optimization/122589 - imm use iterator checking fallout

2025-11-07 Thread Richard Biener
The following addresses the latent issue that gsi_replace_with_seq causes debug info to unnecessarily degrade and in this process break the new immediate use iterator sanity checking. In particular gsi_remove has side-effects on debug stmts even when operating in non-permanent operation. But as w

  1   2   >