[PATCH v2] RISC-V: Add augmented hypervisor series extensions.

The augmented hypervisor series extensions 'sha'[1] is a new profile-defined extension series that captures the full set of features that are mandated to be supported along with the 'H' extension. [1] https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc#rva23s64-profile Versi

[PATCH] x86: Enable separate shrink wrapping

From: Lili Cui Hi, This patch is to enale separate shrink wrapping for x86. Bootstrapped & regtested on x86-64-pc-linux-gnu. Ok for trunk? This commit implements the target macros (TARGET_SHRINK_WRAP_*) that enable separate shrink wrapping for function prologues/epilogues in x86. When perfo

Re:[ping] [PATCH v2] MIPS: Fix the issue with the '-fpatchable-function-entry=' feature.

Ping? 在 2025/5/9 上午10:14, Lulu Cheng 写道: From: ChengLulu PR target/99217 gcc/ChangeLog: * config/mips/mips.cc (mips_start_function_definition): Implements the functionality of '-fpatchable-function-entry='. (mips_print_patchable_function_entry): Define empty f

Re: [COMMITTED] Remove negative ranges using trailing zero masks.

As usual, thanks for doing all this. *blush* Aldy On Tue, May 13, 2025 at 2:15 AM Andrew MacLeod wrote: > When there are trailing 0's in the bitmask, I previously modified > set_range_from_bitmask () to remove the lower positive ranges which do > not match the value to help with some optimizat

Re: [PATCH] RISC-V: Add augmented hypervisor series extensions.

Hehe, you are late a little bit, let rewrite this with riscv-ext.def On Tue, May 13, 2025 at 11:56 AM Jiawei wrote: > > The augmented hypervisor series extensions 'sha'[1] is a new profile-defined > extension series that captures the full set of features that are mandated to > be supported along

Re: [PATCH v2 1/8] RISC-V: Introduce riscv-ext*.def to define extensions

pushed On Mon, May 12, 2025 at 10:18 PM Kito Cheng wrote: > > I guess this patch set is not interesting to most people, so I will commit > that once CI green :P > > On Mon, May 12, 2025 at 10:17 PM Kito Cheng wrote: >> >> Adding a new ISA extension to RISC-V GCC requires modifying several place

[PATCH] RISC-V: Add augmented hypervisor series extensions.

The augmented hypervisor series extensions 'sha'[1] is a new profile-defined extension series that captures the full set of features that are mandated to be supported along with the 'H' extension. [1] https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc#rva23s64-profile gcc/C

RE: [PATCH] libgcobol: Allow for lack of LOG_PERROR

If you have a patch that works for you, by all means, push it. As for the philosophy and reasons for logging...I have to defer to Jim to come up with a cogent response. I personally wouldn't have bothered with any logging code. There may be some delays in his responding. There recently was a de

Re: [PATCH 3/6] RISC-V: frm/mode-switch: remove dubious frm edge insertion before call_insn

On 5/12/25 17:26, Jeff Law wrote: >>test_float_point_frm_static: >>1: frrma5 <-- >> 2: fsrmi 2 >>3: fsrma5 <-- >> 4: callnormalize_vl >>5: frrma5 <-- >> 6: fsrmi 3

[PATCH v2 1/2] Extend vect_recog_cond_expr_convert_pattern to handle floating point type.

Updated in V2 > > Can you instead of mangling in float support use separate (match like > for the below cases? I tried, but reported duplicated defination since they share same pattern like (cond (simple_comparison@6 @0 @1) (convert@4 @2) (convert@5 @3)) No idea how to split that. > > > @@ -1130

[PATCH v2 2/2] Extend vect_recog_cond_expr_convert_pattern to handle REAL_CST

REAL_CST is handled if it can be represented in different floating point types without loss of precision or under fast math. gcc/ChangeLog: PR tree-optimization/103771 * match.pd (cond_expr_convert_p): Extend the match to handle REAL_CST. * tree-vect-patterns.cc

[PATCH] RISC-V: Fix uninit riscv_subset_list::m_allow_adding_dup issue

We forgot to initialize m_allow_adding_dup in the constructor of riscv_subset_list, then that will be a random value...that will lead to a random behavior of the -march may accpet duplicate extension. gcc/ChangeLog: * common/config/riscv/riscv-common.cc (riscv_subset_list::riscv_s

[pushed: r16-579] diagnostics: improvements to experimental-html output [PR116792]

Add barebones support for * diagnostic metadata rules * quoted source * generated patches * execution paths Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu. Pushed to trunk as r16-579-ge4ccad8faf5266. gcc/ChangeLog: PR other/116792 * diagnostic-format-html.cc: Includ

Re: [PATCH 3/6] RISC-V: frm/mode-switch: remove dubious frm edge insertion before call_insn

On 5/12/25 4:17 PM, Vineet Gupta wrote: On 5/12/25 14:55, Jeff Law wrote: test_float_point_frm_static: 1: frrma5 <-- 2: fsrmi 2 3: fsrma5 <-- 4: callnormalize_vl 5: frrma5 <-- 6: fsrmi 3

[COMMITTED] Remove negative ranges using trailing zero masks.

When there are trailing 0's in the bitmask, I previously modified set_range_from_bitmask () to remove the lower positive ranges which do not match the value to help with some optimizations.   It helps with lower range comparisons and generally seemed to be a good thing. This reworks it clean i

[PATCH] c++: unifying specializations of non-primary tmpls [PR120161]

Bootstrapped and regtested on x86-64-pc-linux-gnu, does this look OK for trunk/15/14? -- >8 -- Here unification of P=Wrap::type, A=Wrap::type wrongly succeeds ever since r14-4112 which made the RECORD_TYPE case of unify no longer recurse into template arguments for non-primary templates (since th

Re: Fix PR 118541, do not generate unordered fp cmoves for IEEE compares

On Mon, May 12, 2025 at 06:35:15PM -0400, Michael Meissner wrote: > On Mon, May 12, 2025 at 01:24:04PM +0530, Surya Kumari Jangala wrote: > > Hi Mike, > > Irrespective of whether -Ofast is used or not, should’nt we generate > > XSCMPUDP instruction for ‘isgreater()’ operation? This is because XSCM

Re: [PATCH] final: Fix get_attr_length for asm goto [PR118411]

On Sat, Jan 11, 2025 at 1:11 PM Jeff Law wrote: > > > > On 1/11/25 2:08 PM, Andrew Pinski (QUIC) wrote: > >> -Original Message- > >> From: Jeff Law > >> Sent: Saturday, January 11, 2025 8:12 AM > >> To: Andrew Pinski (QUIC) ; gcc- > >> patc...@gcc.gnu.org > >> Subject: Re: [PATCH] final:

[PATCH 3/3] cfgcleanup: small performance improvement in some cases

With some functions, there might be the case where every stack variable is a live at the end of a basic block. If that is the case then it is known that all stack variables will conflict with each other so there is no reason to go through figuring out what variables conflict with each other. Sin

Re: [PATCH] c++: Add std::to_underlying to the set of stdlib functions that are always folded

On Mon, 12 May 2025 at 23:57, Jonathan Wakely wrote: > > On Mon, 12 May 2025 at 21:35, Ville Voutilainen > wrote: > > > > This function is yet another stdlib function that is just a simple > > cast, so having > > it appear while debugging is arguably not useful. So add it to the > > existing hand

[PATCH 2/3] cfgexpand: Update cache during the original DFS walk

This is a small optimization which can improve how many times are need through the update loop. It can reduce the number of times in the update loop by maybe 1 times. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * cfgexpand.cc (vars_ssa_cache::operator()): Update the cach

[PATCH 1/3] cfgexpand: Reverse the order of going through the update_cache_list queue.

This is a small optimization, the reversed order of the walk of update_cache_list queue. The queue is pushed in Pre-order/NLR, reversing the order will reduce how many times we need to go through the loop as we update the nodes which might have a link back to another one first. Bootstrapped and

Re: Fix PR 118541, do not generate unordered fp cmoves for IEEE compares

On Mon, May 12, 2025 at 01:24:04PM +0530, Surya Kumari Jangala wrote: > Hi Mike, > Irrespective of whether -Ofast is used or not, should’nt we generate XSCMPUDP > instruction for ‘isgreater()’ operation? This is because XSCMPGTDP insn will > generate a trap if either operand is an SNaN or a QNaN.

Re: [PATCH] optabs: Remove cmov optab [PR120230]

On Mon, May 12, 2025 at 2:36 PM Richard Sandiford wrote: > > Andrew Pinski writes: > > cmov optab was added back in r0-24110-g1c0290eaac4094 > > (https://gcc.gnu.org/pipermail/gcc-patches/1999-September/018596.html) > > but it was never used. movcc is used instead and since > > r0-93453-gf90b7a5

Re: [PATCH v21 1/3] c: Add _Countof operator

Hi Jonathan, On Mon, May 12, 2025 at 06:11:18PM +0100, Jonathan Wakely wrote: > On 12/05/25 17:53 +0200, Alejandro Colomar wrote: > > Suggested-by: Xavier Del Campo Romero > > Co-authored-by: Martin Uecker > > Acked-by: "James K. Lowden" > > What does this Acked-by: indicate?

Re: [PATCH 3/6] RISC-V: frm/mode-switch: remove dubious frm edge insertion before call_insn

On 5/12/25 14:55, Jeff Law wrote: test_float_point_frm_static: 1: frrma5 <-- 2: fsrmi 2 3: fsrma5 <-- 4: callnormalize_vl 5: frrma5 <-- 6: fsrmi 3 7: fs

Re: [PATCH v1] contrib/: Add support for Link: tags

Hi Jonathan, On Mon, May 12, 2025 at 05:42:55PM +0100, Jonathan Wakely wrote: > On Mon, 12 May 2025 at 17:34, Jonathan Wakely wrote: > > > > On Mon, 12 May 2025 at 16:46, Alejandro Colomar wrote: > > > > > > contrib/ChangeLog: > > > > > > * gcc-changelog/git_commit.py (GitCommit): > > >

Re: [PATCH v21 2/3] c: Add

Hi Joseph, On Mon, May 12, 2025 at 04:43:45PM +, Joseph Myers wrote: > On Mon, 12 May 2025, Alejandro Colomar wrote: > > > + if (strcmp (xstr(countof), "_Alignas") != 0) > > countof should definitely not expand to _Alignas! D'oh! :-) > I don't recommend > posting untested patches. I s

Re: [PATCH 3/6] RISC-V: frm/mode-switch: remove dubious frm edge insertion before call_insn

On 5/10/25 9:55 PM, Vineet Gupta wrote: On 5/10/25 07:17, Jeff Law wrote: On 5/9/25 2:27 PM, Vineet Gupta wrote: This showed up when debugging the testcase for PR119164. RISC-V FRM mode-switching state machine has special handling for transitions to and from a call_insn as FRM needs to save

Re: [PATCH] aarch64: Remove cmov6 patterns

Andrew Pinski writes: > Since the cmov optab is not used and is being removed, > the `cmov6` patterns from the aarch64 backend can > also be removed. > > gcc/ChangeLog: > * config/aarch64/aarch64.md (cmov6): Remove. OK, thanks. Richard > > Signed-off-by: Andrew Pinski > --- > gcc/config

Re: [PATCH v2 2/3] aarch64: Optimize AND with certain vector of immediates as FMOV [PR100165]

Pengxuan Zheng writes: > diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc > index 15f08cebeb1..98ce85dfdae 100644 > --- a/gcc/config/aarch64/aarch64.cc > +++ b/gcc/config/aarch64/aarch64.cc > @@ -23621,6 +23621,36 @@ aarch64_simd_valid_and_imm (rtx op) >return aarch64

Re: [PATCH] optabs: Remove cmov optab [PR120230]

Andrew Pinski writes: > cmov optab was added back in r0-24110-g1c0290eaac4094 > (https://gcc.gnu.org/pipermail/gcc-patches/1999-September/018596.html) > but it was never used. movcc is used instead and since > r0-93453-gf90b7a5a7913cc (cond-optab), > movcc becomes what cmov_optab was going to be;

Re: [PATCH v2 3/3] aarch64: Add more vector permute tests for the FMOV optimization [PR100165]

Pengxuan Zheng writes: > diff --git a/gcc/testsuite/gcc.target/aarch64/fmov-3-le.c > b/gcc/testsuite/gcc.target/aarch64/fmov-3-le.c > new file mode 100644 > index 000..adbf87243f6 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/fmov-3-le.c > @@ -0,0 +1,130 @@ > +/* { dg-do compil

Re: [PATCH v2 1/3] aarch64: Recognize vector permute patterns which can be interpreted as AND [PR100165]

Pengxuan Zheng writes: > +/* Recognize patterns suitable for the AND instructions. */ > +static bool > +aarch64_evpc_and (struct expand_vec_perm_d *d) > +{ > + /* Either d->op0 or d->op1 should be a vector of all zeros. */ > + if (d->one_vector_p || (!d->zero_op0_p && !d->zero_op1_p)) > +r

[RFC] Enable automatic ChangeLog updates on devel/omp/gcc-15 branch

I have created the devel/omp/gcc-15 (aka "OG15") branch, but not yet populated it with patches carried over from devel/omp/gcc-14. These development branches are where we put bleeding-edge versions of OpenMP and OpenACC features. For previous branches we'd been using ChangeLog.omp files paral

[PATCH] c++: Allow -Wvirtual-move-assign to be more easily ignored

gcc/cp/ChangeLog: * method.cc (synthesized_method_walk): Check whether -Wvirtual-move-assign is enabled at the location of a base class's move assignment operator. gcc/testsuite/ChangeLog: * g++.dg/warn/ignore-virtual-move-assign.C: New test. Co-authored-

Re: [PATCH] libstdc++: Make debug iterator pointer sequence const [PR116369]

On 31/03/25 22:20 +0200, François Dumont wrote: Hi Following this previous patch https://gcc.gnu.org/pipermail/libstdc++/2024-August/059418.html I've completed it for the _Safe_unordered_container_base type and implemented the rest of the change to store the safe iterator sequence as a point

Re: [PATCH] optabs: Remove cmov optab [PR120230]

On Mon, May 12, 2025 at 8:54 AM Andrew Pinski wrote: > > cmov optab was added back in r0-24110-g1c0290eaac4094 > (https://gcc.gnu.org/pipermail/gcc-patches/1999-September/018596.html) > but it was never used. movcc is used instead and since > r0-93453-gf90b7a5a7913cc (cond-optab), > movcc becomes

Re: [PATCH] c++: Add std::to_underlying to the set of stdlib functions that are always folded

On Mon, 12 May 2025 at 21:35, Ville Voutilainen wrote: > > This function is yet another stdlib function that is just a simple > cast, so having > it appear while debugging is arguably not useful. So add it to the > existing handling > that always-folds some stdlib functions. > > Add std::to_underl

[PATCH] aarch64: Remove cmov6 patterns

Since the cmov optab is not used and is being removed, the `cmov6` patterns from the aarch64 backend can also be removed. gcc/ChangeLog: * config/aarch64/aarch64.md (cmov6): Remove. Signed-off-by: Andrew Pinski --- gcc/config/aarch64/aarch64.md | 32 1 f

[COMMITTED] PR tree-optimization/120231 - Add dispatch for casts between integer and float.

PR 120231 highlights that we’ve never implemented range operators for casting between integers and floating-point types — in either direction. This patch fills in the missing dispatch infrastructure so that casts between int and float types can eventually be handled cleanly via range_operator.

[PATCH v2] gimple-fold: Don't replace `tmp = FP0 CMP FP1; if (tmp != 0)` over and over again when comparison can throw

with -ftrapping-math -fnon-call-exceptions and: ``` tmp = FP0 CMP FP1; if (tmp != 0) ... ``` a call fold_stmt on the GIMPLE_COND will replace the above with a new tmp each time and we even lose the eh informatin on the previous comparison too. Changes since v1: * v2: Use INTEGRAL_TYPE_P instead o

Re: [PATCH 0/6] RISC-V: frm state-machine improvements

On 5/11/25 19:22, 钟居哲 wrote: > Hi, vineet. > > >> I have a feeling this has to do with following: > >> https://godbolt.org/z/Px9es7j1r > > I saw in there are 2 fsrm instruction inside the main loop in Clang generated > ASM which I think GCC is better. > > Correct me if I am wrong. Thanks. Yes you

RE: [PATCH 1/3] Recognize vector permute patterns which can be interpreted as AND [PR100165]

> Richard Biener writes: > > On Sat, Apr 26, 2025 at 2:42 AM Pengxuan Zheng > wrote: > >> > >> Certain permute that blends a vector with zero can be interpreted as > >> an AND of a mask. This idea was suggested by Richard Sandiford when > >> he was reviewing my patch which tries to optimizes cert

RE: [PATCH 2/3] aarch64: Optimize AND with certain vector of immediates as FMOV [PR100165]

> Pengxuan Zheng writes: > > We can optimize AND with certain vector of immediates as FMOV if the > > result of the AND is as if the upper lane of the input vector is set > > to zero and the lower lane remains unchanged. > > > > For example, at present: > > > > v4hi > > f_v4hi (v4hi x) > > { > >

[PATCH] c++: Add std::to_underlying to the set of stdlib functions that are always folded

This function is yet another stdlib function that is just a simple cast, so having it appear while debugging is arguably not useful. So add it to the existing handling that always-folds some stdlib functions. Add std::to_underlying to the set of stdlib functions that are always folded gcc/cp/Chan

Re: [PATCH RFC] libstdc++: run testsuite with -Wabi

On Mon, 12 May 2025 at 16:13, Jason Merrill wrote: > > On 5/9/25 1:31 PM, Jonathan Wakely wrote: > > On Fri, 9 May 2025 at 18:13, Jonathan Wakely wrote: > >> > >> On Fri, 9 May 2025 at 11:19, Jonathan Wakely wrote: > >>> > >>> On Thu, 8 May 2025 at 20:56, Jason Merrill wrote: > > Test

[PATCH v2 3/3] aarch64: Add more vector permute tests for the FMOV optimization [PR100165]

This patch adds more tests for vector permutes which can now be optimized as FMOV with the generic PERM change and the aarch64 AND patch. Changes since v1: * v2: Add -mlittle-endian to the little endian tests explicitly and rename the tests accordingly. PR target/100165 gcc/testsuite/Cha

[PATCH v2 2/3] aarch64: Optimize AND with certain vector of immediates as FMOV [PR100165]

We can optimize AND with certain vector of immediates as FMOV if the result of the AND is as if the upper lane of the input vector is set to zero and the lower lane remains unchanged. For example, at present: v4hi f_v4hi (v4hi x) { return x & (v4hi){ 0x, 0x, 0, 0 }; } generates: f_v4h

[PATCH v2 1/3] aarch64: Recognize vector permute patterns which can be interpreted as AND [PR100165]

Certain permute that blends a vector with zero can be interpreted as an AND of a mask. This idea was suggested by Richard Sandiford when he was reviewing my patch which tries to optimizes certain vector permute with the FMOV instruction for the aarch64 target. For example, for the aarch64 target,

[pushed] c+: -Wabi false positive [PR120012]

Tested x86_64-pc-linux-gnu, applying to trunk. -- 8< -- The warning compares the position of a field depending on whether or not the previous base/field is considered a POD for layout, but failed to consider whether the previous base/field is empty; layout of an empty base doesn't consider PODnes

Re: libgomp: Add a few more OpenMP/USM test cases

Thomas Schwinge wrote: On 2025-05-12T17:03:29+0200, I wrote: "Add effective-target 'offload_device_usm', 'libgomp.c-c++-common/target-usm-1.c'" On top, we could then add the attached "libgomp: Add a few more OpenMP/USM test cases"? These all PASS for GCN gfx90a with 'HSA_XNACK=1'. For the c

Re: [PATCH] gimple-fold: Canonicalize _Bool == 0 and _Bool != 1

On Mon, May 12, 2025 at 3:56 AM Richard Biener wrote: > > On Sat, May 10, 2025 at 3:13 AM Andrew Pinski > wrote: > > > > This move this canonicalization from forwprop > > (forward_propagate_into_gimple_cond) > > to gimple-fold. > > This is a step in removing forward_propagate_into_gimple_cond f

New Spanish PO file for 'cpplib' (version 15.1-b20250316)

Hello, gentle maintainer. This is a message from the Translation Project robot. A revised PO file for textual domain 'cpplib' has been submitted by the Spanish team of translators. The file is available at: https://translationproject.org/latest/cpplib/es.po (This file, 'cpplib-15.1-b202503

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[PING][PATCH][GCC15] Alpha: Fix base block alignment calculation regression

On Tue, 25 Feb 2025, Maciej W. Rozycki wrote: > Address this issue by recursing into COMPONENT_REF tree nodes until the > outermost one has been reached, which is supposed to be a MEM_REF one, > accumulating the offset as we go, fixing a commit e0dae4da4c45 ("Alpha: > Also use tree information

Re: [PATCH] gimple-fold: Don't replace `tmp = FP0 CMP FP1; if (tmp != 0)` over and over again when comparison can throw

On Mon, May 12, 2025 at 3:51 AM Richard Biener wrote: > > On Sat, May 10, 2025 at 3:19 AM Andrew Pinski > wrote: > > > > with -ftrapping-math -fnon-call-exceptions and: > > ``` > > tmp = FP0 CMP FP1; > > > > if (tmp != 0) ... > > ``` > > a call fold_stmt on the GIMPLE_COND will replace the above

Re: [PATCH v21 1/3] c: Add _Countof operator

On 12/05/25 17:53 +0200, Alejandro Colomar wrote: This operator is similar to sizeof but can only be applied to an array, and returns its number of elements. FUTURE DIRECTIONS: - We should make it work with array parameters to functions, and somehow magically return the number of elements of

Re: Add effective-target 'offload_device_usm', 'libgomp.c-c++-common/target-usm-1.c'

Hi, I concur that it would be useful to have information about USM suport something. I am less sure what we should test for. Q1: Does the default device support USM (and is not the host)? Q2: Is there a device that support 'requires unified_shared_memory'? At a glance, the answer for both is id

Re: [PATCH] libstdc++: Make debug iterator pointer sequence const [PR116369]

Hi As back to stage 1is it ok to commit this change ? François On 31/03/2025 22:20, François Dumont wrote: Hi Following this previous patch https://gcc.gnu.org/pipermail/libstdc++/2024-August/059418.html I've completed it for the _Safe_unordered_container_base type and implemented the res

Re: [PATCH] libiberty: Fix off-by-one when collecting range expression

Andreas Schwab writes: > * regex.c (regex_compile): Don't write beyond array bounds when > collecting range expression. This is OK. Thanks. Ian

Re: [PATCH v21 2/3] c: Add

On Mon, 12 May 2025, Alejandro Colomar wrote: > + if (strcmp (xstr(countof), "_Alignas") != 0) countof should definitely not expand to _Alignas! I don't recommend posting untested patches. -- Joseph S. Myers josmy...@redhat.com

Re: [PATCH v1] contrib/: Add support for Link: tags

On Mon, 12 May 2025 at 17:34, Jonathan Wakely wrote: > > On Mon, 12 May 2025 at 16:46, Alejandro Colomar wrote: > > > > contrib/ChangeLog: > > > > * gcc-changelog/git_commit.py (GitCommit): > > Add support for 'Link:' tags. > > > > Cc: Jason Merrill > > I don't think we want a Cc

Re: [PATCH v1] contrib/: Add support for Link: tags

On Mon, 12 May 2025 at 16:46, Alejandro Colomar wrote: > > contrib/ChangeLog: > > * gcc-changelog/git_commit.py (GitCommit): > Add support for 'Link:' tags. > > Cc: Jason Merrill I don't think we want a Cc: trailer in the actual commit message. do we? What is a Link: tag? I assu

[PING][PATCH][GCC15] Alpha: Fix base block alignment calculation regression

On Thu, 1 May 2025, Maciej W. Rozycki wrote: > > > OK. Clearly this one slipped through the cracks. > > > > Good timing, I've applied it now just as I'm about to head away for some > > holiday time. I'll take care of the other outstanding stuff in this area > > once GCC 16 has opened and wor

Re: [PATCH 2/2] Move vector lowering to before vectorization

Richard Biener writes: > The following moves vector lowering to before vectorization - in fact > to before DCE/forwprop and CSE. This gets us the chance to re-vectorize > the lowered form eventually. Note that when the vectorizer learns to > handle vector code vector lowering should be likely in

[PATCH v3] match.pd: Fold (x + y) >> 1 into IFN_AVG_FLOOR (x, y) for vectors

This patch folds vector expressions of the form (x + y) >> 1 into IFN_AVG_FLOOR (x, y), reducing instruction count on platforms that support averaging operations. For example, it can help improve the codegen on AArch64 from: add v0.4s, v0.4s, v31.4s ushrv0.4s, v0.4s, 1 to:

Re: [PATCH v5 05/10] libstdc++: Implement layout_left from mdspan.

Thank you for all the work that you have done by doing the two implementations and extensive test cases. I wanted to respond to a few points that I think we may want to consider to be bugs in specification, and report them as bugs in standard. (Would you be interested in doing so?) I do not unders

[PATCH v21 3/3] c: Add -Wpedantic diagnostic for _Countof

It has been standardized in C2y. gcc/c/ChangeLog: * c-parser.cc (c_parser_sizeof_or_countof_expression): Add -Wpedantic diagnostic for _Countof in <= C23 mode. gcc/testsuite/ChangeLog: * gcc.dg/countof-compat.c * gcc.dg/countof-no-compat.c * gcc.dg/counto

[PATCH v21 0/3] c: Add _Countof and

Hi! Here's the list of changes in v21: - Drop patch 1 (I've sent it separately, as Joseph requested). - Keep Link tags. This means the other patch is an implicit dependency of this patch set. - Fix test compiler flags. [Joseph] - Add tests for . [Joseph] - Add tests for pedantic diagno

[PATCH v21 2/3] c: Add

gcc/ChangeLog: * Makefile.in (USER_H): Add . * ginclude/stdcountof.h: Add countof macro. gcc/testsuite/ChangeLog: * gcc.dg/countof-stdcountof.c: Add tests for . Signed-off-by: Alejandro Colomar --- gcc/Makefile.in | 1 + gcc/ginclude/stdcount

[PATCH v21 1/3] c: Add _Countof operator

This operator is similar to sizeof but can only be applied to an array, and returns its number of elements. FUTURE DIRECTIONS: - We should make it work with array parameters to functions, and somehow magically return the number of elements of the array, regardless of it being really a poin

[PATCH] optabs: Remove cmov optab [PR120230]

cmov optab was added back in r0-24110-g1c0290eaac4094 (https://gcc.gnu.org/pipermail/gcc-patches/1999-September/018596.html) but it was never used. movcc is used instead and since r0-93453-gf90b7a5a7913cc (cond-optab), movcc becomes what cmov_optab was going to be; in having a combined compare and

RE: [PATCH] Cleanup internal vectorizer costing API

> -Original Message- > From: Richard Biener > Sent: Monday, May 12, 2025 1:46 PM > To: gcc-patches@gcc.gnu.org > Cc: Tamar Christina ; RISC-V CI c...@rivosinc.com> > Subject: [PATCH] Cleanup internal vectorizer costing API > > This tries to cleanup the API available to vectorizable_* to

[PATCH v1] contrib/: Add support for Link: tags

contrib/ChangeLog: * gcc-changelog/git_commit.py (GitCommit): Add support for 'Link:' tags. Cc: Jason Merrill Signed-off-by: Alejandro Colomar --- Hi, This patch is needed by my patches that add _Countof. Have a lovely day! Alex contrib/gcc-changelog/git_commit.py | 3 +++

Re: [PATCH v5 05/10] libstdc++: Implement layout_left from mdspan.

On 5/9/25 8:16 AM, Tomasz Kaminski wrote: The test I would perform would be : std::layout_left::mapping> l0; std::layout_right:mapping> r0; // stride bool all_unique() { return l0.is_unique(); return r0.is_unique(); } And we should have only one is_unique symbol. but with a lot more d

Re: [PATCH] c++/modules: Revert "Remove unnecessary lazy_load_pendings"

On 5/9/25 11:33 AM, Nathaniel Shead wrote: On Fri, May 09, 2025 at 08:18:58AM -0400, Jason Merrill wrote: On 4/21/25 6:22 AM, Nathaniel Shead wrote: This call is not necessary, as we don't access the bodies of any classes that we instantiate here. This turns out to break 20_util/function_obj

[PATCH] fortran: map atand(y, x) to atan2d(y, x) [PR113413]

Hi Tobias, Following up on your review comments, I have updated the patch. Specifically, I have: * Added the PR number to the subject line. * Used the -b and -p options when running git gcc-commit-mklog. * Updated the intrinsic documentation as requested. Could you please take another look when yo

Re: [PATCH RFC] libstdc++: run testsuite with -Wabi

On 5/9/25 1:31 PM, Jonathan Wakely wrote: On Fri, 9 May 2025 at 18:13, Jonathan Wakely wrote: On Fri, 9 May 2025 at 11:19, Jonathan Wakely wrote: On Thu, 8 May 2025 at 20:56, Jason Merrill wrote: Tested x86_64-pc-linux-gnu. Does this make sense for trunk? Yes, it looks useful. I'm goi

Re: [PATCH v20 2/4] c: Add _Countof operator

On Mon, May 12, 2025 at 10:54:34AM +, Joseph Myers wrote: > On Sun, 11 May 2025, Alejandro Colomar wrote: > > > +/* { dg-options "-Wno-declaration-after-statement -Wno-pedantic -Wno-vla" > > } */ > > > +/* { dg-options "-Wno-pedantic -Wvla-parameter" } */ > > > +/* { dg-options "-Wno-declar

PING (and v2) – [Patch] nvptx/nvptx.opt: Update -march-map= for newer sm_xxx

PING. There is actually a minor update as meanwhile CUDA 12.8 was released that added the 'f' suffix and sm_103 and sm_121. Still, the pattern remains the same; hence, a normal PING. On April 25, 2025, Tobias Burnus wrote: The idea of -march-map= is to simply and future proof select the best -

libgomp: Add a few more OpenMP/USM test cases (was: Add effective-target 'offload_device_usm', 'libgomp.c-c++-common/target-usm-1.c')

Hi! On 2025-05-12T17:03:29+0200, I wrote: > "Add effective-target 'offload_device_usm', > 'libgomp.c-c++-common/target-usm-1.c'" On top, we could then add the attached "libgomp: Add a few more OpenMP/USM test cases"? These all PASS for GCN gfx90a with 'HSA_XNACK=1'. Grüße Thomas >From 8c04

Add effective-target 'offload_device_usm', 'libgomp.c-c++-common/target-usm-1.c' (was: [committed] libgomp.fortran/map-alloc-comp-9{,-usm}.f90: Add unified_shared_memory variant)

Hi! On 2025-05-07T13:58:38+0200, Tobias Burnus wrote: > Committed asr16-445-g9565076f9b8105. This test supports mapping + accessing > the vtab > of the polymorphic variable on the host. Obviously, this only works if > the host pointer is device accessible ("unified-shared memory"). In > princ

Re: [AUTOFDO][AARCH64] Add support for profilebootstrap

Kugan Vivekanandarajah writes: > diff --git a/configure.ac b/configure.ac > index 730db3c1402..701284e38f2 100644 > --- a/configure.ac > +++ b/configure.ac > @@ -621,6 +621,14 @@ case "${target}" in > ;; > esac > > +autofdo_target="i386" > +case "${target}" in > + aarch64-*-*) > +auto

Re: [PATCH] [testsuite] [vxworks] netinet includes atomic, reqs c++11

On Thu, 2025-05-08 at 23:29 -0300, Alexandre Oliva wrote: > > On vxworks, the included netinet/in.h header indirectly includes > , that fails on C++ <11.  Skip the test. > > Tested with gcc-14 targeting ppc-vx7r2 and ppc64-vx7r2.  Also tested > with trunk on ppc64le-linux-gnu, and with gcc-14 tar

Re: [PATCH] [testsuite] [analyzer] [vxworks] define __STDC_WANT_LIB_EXT1__ to 1

On Thu, 2025-05-08 at 23:31 -0300, Alexandre Oliva wrote: > > vxworks' headers use #if instead of #ifdef to test for > __STDC_WANT_LIB_EXT1__, so the definition in the analyzer test > strotok-cppreference.c catches a bug there, but not something it's > meant to catch or that we could fix in GCC, s

Re: [PATCH v20 3/4] c: Add

On Mon, May 12, 2025 at 10:54:52AM +, Joseph Myers wrote: > On Sun, 11 May 2025, Alejandro Colomar wrote: > > > gcc/ChangeLog: > > > > * Makefile.in (USER_H): Add . > > * ginclude/stdcountof.h: Add countof macro. > > This is missing tests for the header. Hi Joseph, Yep, I hadn't fo

Re: [PATCH] c++: Add attribute handles_virtual_move_assign

On 5/11/25 7:11 PM, Owen Avery wrote: Yeah, that looks way simpler. Should I add you as co-author on the patch? Sounds good, thanks. On 4/28/25 22:13, Jason Merrill wrote: On 4/28/25 5:07 PM, Owen Avery wrote: As far as I can tell, that would need to be applied to every class which virtuall

RE: [EXTERNAL]RE: [PATCH ]RISCV :Added MIPS P8700 Subtarget

Sure @Palmer Dabbelt ,sent in a different thread email with updated patch. Thank you ~U -Original Message- From: Palmer Dabbelt Sent: 08 May 2025 23:38 To: Umesh Kalappa Cc: jeffreya...@gmail.com; gcc-patches@gcc.gnu.org; kito.ch...@sifive.com; jesse.hu...@sifive.com; Andrew Water

Re: [PATCH 8/9] AArch64: rules for CMPBR instructions

On 09/05/2025 13:49, Kyrylo Tkachov wrote: > >> On 8 May 2025, at 21:10, Karl Meakin wrote: >> >> Add rules for lowering `cbranch4` to CBB/CBH/CB when >> CMPBR extension is enabled. >> >> gcc/ChangeLog: >> >> * config/aarch64/aarch64.md (cbranch4): Mmit CMPBR >> instructions if possible. >> (

[PATCH v2 8/8] RISC-V: Drop riscv_ext_flag_table in favor of riscv_ext_info_t data

Refactor extension flag handling by removing the old riscv_ext_flag_table and sourcing all flag definitions directly from the flags field of the unified riscv_ext_info_t structures generated from riscv-ext.def. gcc/ChangeLog: * common/config/riscv/riscv-common.cc (riscv_extra_ext_flag_tab

[PATCH v2 6/8] RISC-V: Drop riscv_implied_info and riscv_combine_info in favor of riscv_ext_info_t data

Consolidate implied-extension logic by removing the old `riscv_implied_info` array and using the `implied_exts` field in the unified riscv_ext_info_t structures generated from `riscv-ext.def`. gcc/ChangeLog: * common/config/riscv/riscv-common.cc (riscv_implied_info::riscv_implied_

[PATCH v2 5/8] RISC-V: Introduce riscv_ext_info_t to hold extension metadata

Define a new riscv_ext_info_t struct to aggregate all ISA extension fields (name, version, flags, implied extensions, bitmask and extra flags) generated from riscv-ext.def. Also adjust riscv_ext_flag_table_t and riscv_implied_info_t to make it able to not hold extension name, this part will refact

[PATCH] libiberty: Fix off-by-one when collecting range expression

Fixes this error during build of fixincludes: In function ‘byte_regex_compile’, inlined from ‘xregcomp’ at ../libiberty/../../libiberty/regex.c:7973:11: ../libiberty/../../libiberty/regex.c:3477:29: warning: writing 1 byte into a region of size 0 [-Wstringop-overflow=] 3477 |

[PATCH v2 2/8] RISC-V: Use riscv-ext.def to generate target options and variables

Leverage the centralized riscv-ext.def definitions to auto-generate the target option parsing and associated internal flags, replacing manual listings in riscv.opt; `riscv_ext_flag_table` part will remove in later patch. gcc/ChangeLog: * config/riscv/gen-riscv-ext-opt.cc: New. * c

[PATCH v2 3/8] RISC-V: Generate extension table in documentation from riscv-ext.def

Automatically build the ISA extension reference table in invoke.texi from the unified riscv-ext.def metadata, ensuring documentation stays in sync with extension definitions and reducing manual maintenance. gcc/ChangeLog: * doc/invoke.texi: Replace hand‑written extension table with

[PATCH v2 4/8] RISC-V: Adjust riscv_can_inline_p

We don't hold any extenison flags in `target_flags`, so no need to gather the extenison flags in `target_flags`. gcc/ChangeLog: * common/config/riscv/riscv-common.cc (riscv_can_inline_p): Drop extension flags check from `target_flags`. * config/riscv/riscv-subset.h (riscv_

[PATCH v2 7/8] RISC-V: Drop riscv_ext_version_table in favor of riscv_ext_info_t data

This commit drops the riscv_ext_version_table and instead uses the riscv_ext_info_t data structure to provide the version information for RISC-V extensions. gcc/ChangeLog: * common/config/riscv/riscv-common.cc (riscv_ext_version_table): Remove. (standard_extensions_p): Use

[PATCH v2 1/8] RISC-V: Introduce riscv-ext*.def to define extensions

Adding a new ISA extension to RISC-V GCC requires modifying several places: 1. riscv_ext_version_table for the extension version. 2. riscv.opt for the target option and variable. 3. riscv_ext_flag_table to bind the extension to its target option. 4. riscv_combine_info if this extension is just a ma

[PATCH v2 3/3] libstdc++: Renamed bits/move_only_function.h to bits/funcwrap.h [PR119125]

The file now includes copyable_function in addition to move_only_function. PR libstdc++/119125 libstdc++-v3/ChangeLog: * include/bits/move_only_function.h: Move to... * include/bits/funcwrap.h: ...here. * doc/doxygen/stdheader.cc (init_map): Replaced move_only_func

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