[PATCH] tree-optimization/111003 - new testcase

Testcase for fixed PR. Pushed. PR tree-optimization/111003 gcc/testsuite/ * gcc.dg/tree-ssa/pr111003.c: New testcase. --- gcc/testsuite/gcc.dg/tree-ssa/pr111003.c | 34 1 file changed, 34 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr1

[PATCH]middle-end: fill in reduction PHI for all alt exits [PR113144]

Hi All, When we have a loop with more than 2 exits and a reduction I forgot to fill in the PHI value for all alternate exits. All alternate exits use the same PHI value so we should loop over the new PHI elements and copy the value across since we call the reduction calculation code only once for

Re: [PATCH] i386: Add "z" constraint for symbolic address/label reference [PR105576]

On Thu, Jan 11, 2024 at 4:44 AM Fangrui Song wrote: > > Printing the raw symbol is useful in inline asm (e.g. in C++ to get the > mangled name). Similar constraints are available in other targets (e.g. > "S" for aarch64/riscv, "Cs" for m68k). > > There isn't a good way for x86 yet, e.g. "i" doesn

[PATCH] libstdc++: Fix error handling for std::filesystem::equivalent [PR113250]

This patch made std::filesystem::equivalent correctly throw an exception when either path does not exist as per [fs.op.equivalent]/4. libstdc++-v3/ChangeLog: * src/c++17/fs_ops.cc (equivalent): Use || instead of &&. * testsuite/27_io/filesystem/operations/equivalent.cc: Handle

[PATCH] c++/modules: Support thread_local statics in header modules [PR113292]

Bootstrapped and regtested on x86_64-pc-linux-gnu. OK for trunk? -- >8 -- Currently, thread_locals in header modules cause ICEs. This patch makes the required changes for them to work successfully. Functions exported by a module need DECL_CONTEXT to be set, so we inherit it from the variable we'

Re: [PATCH] RISC-V: VLA preempts VLS on unknown NITERS loop

The idea makes sense to me, LGTM :) On Thu, Jan 11, 2024 at 10:43 AM Juzhe-Zhong wrote: > > This patch fixes the known issues on SLP cases: > > ble a2,zero,.L11 > addiw t1,a2,-1 > li a5,15 > bleut1,a5,.L9 > srliw a7,t1,4 > sllia

Re: [PATCH][wwwdoc] gcc-14: Add arm cortex-m52 cpu support

On 2024/01/10 22:52 UTC+8, Gerald Pfeifer wrote: On Wed, 10 Jan 2024, Kyrylo Tkachov wrote: Hi Gerald, The Arm Cortex-M52 CPU has been added to the upstream: https://gcc.gnu.org/pipermail/gcc-patches/2024-January/642230.html I would like to document this on the gcc-14 changes.html page. I c

[PATCH] match: Delay folding of 1/x into `(x+1u)<2u?x:0` until late [PR113301]

Since currently ranger does not work with the complexity of COND_EXPR in some cases so delaying the simplification of `1/x` for signed types help code generation. tree-ssa/divide-8.c is a new testcase where this can help. Bootstrapped and tested on x86_64-linux-gnu with no regressions. PR

[committed] libstdc++: Optimize std::is_compound compilation performance

This patch optimizes the compilation performance of std::is_compound. libstdc++-v3/ChangeLog: * include/std/type_traits (is_compound): Do not use __not_. (is_compound_v): Use is_fundamental_v instead. Signed-off-by: Ken Matsui --- libstdc++-v3/include/std/type_traits | 4 ++--

[PATCH] i386: Add "z" constraint for symbolic address/label reference [PR105576]

Printing the raw symbol is useful in inline asm (e.g. in C++ to get the mangled name). Similar constraints are available in other targets (e.g. "S" for aarch64/riscv, "Cs" for m68k). There isn't a good way for x86 yet, e.g. "i" doesn't work for PIC/-mcmodel=large. This patch adds "z". gcc/Chang

Re: [PATCH] i386: [APX] Document inline asm behavior and new switch for APX

On Thu, Jan 11, 2024 at 7:06 AM Andi Kleen wrote: > > Hongtao Liu writes: > >> > >> +@opindex mapx-inline-asm-use-gpr32 > >> +@item -mapx-inline-asm-use-gpr32 > >> +When APX_F enabled, EGPR usage was by default disabled to prevent > >> +unexpected EGPR generation in instructions that does not sup

Re: [PATCH v2] libgfortran: Bugfix if not define HAVE_ATOMIC_FETCH_ADD

On 1/10/2024 7:52 PM, Richard Earnshaw wrote: On 05/01/2024 01:43, Lipeng Zhu wrote: This patch try to fix the bug when HAVE_ATOMIC_FETCH_ADD is not defined in dec_waiting_unlocked function. As io.h does not include async.h, the WRLOCK and RWUNLOCK macros are undefined. libgfortran/ChangeLog

Re: Re: [PATCH 08/14] libstdc++: Optimize std::is_compound compilation performance

On 01-10 (21:21), Jonathan Wakely wrote: > On Wed, 10 Jan 2024 at 19:41, Ken Matsui wrote: > > > > This patch optimizes the compilation performance of std::is_compound > > by dispatching to the new __is_arithmetic built-in trait. > > OK for trunk (no need to wait for anything else to be approved)

Re: [PATCH v5] RISC-V: Fix register overlap issue for some xtheadvector instructions

Ok from myside. CCing Robin to see whether he has any more concerns. Thanks. juzhe.zh...@rivai.ai From: Jun Sha (Joshua) Date: 2024-01-11 10:39 To: gcc-patches CC: jim.wilson.gcc; palmer; andrew; philipp.tomsich; jeffreyalaw; christoph.muellner; juzhe.zhong; Jun Sha (Joshua); Jin Ma; Xianmi

[PATCH] RISC-V: VLA preempts VLS on unknown NITERS loop

This patch fixes the known issues on SLP cases: ble a2,zero,.L11 addiw t1,a2,-1 li a5,15 bleut1,a5,.L9 srliw a7,t1,4 sllia7,a7,7 lui t3,%hi(.LANCHOR0) lui a6,%hi(.LANCHOR0+128) addit3,t3,%lo(.L

Re：Re: [PATCH v5] RISC-V: Fix register overlap issue for some xtheadvector instructions

Hi Robin, Thank you for your suggestions! The patch has been updated by adding a new attribute to disable alternative for xtheadvector or RVV1.0 instead of overlaoding group_overlap. Joshua -- 发件人：钟居哲 发送时间：2024年1月10日(星期三) 21:4

[PATCH v5] RISC-V: Fix register overlap issue for some xtheadvector instructions

For th.vmadc/th.vmsbc as well as narrowing arithmetic instructions and floating-point compare instructions, an illegal instruction exception will be raised if the destination vector register overlaps a source vector register group. To handle this issue, we add an attribute "spec_restriction" to di

Re: [PATCH] LoongArch: Split loongarch_option_override_internal into smaller procedures

Sorry, this is the wrong patch. The good one is posted as v2, which was bootstrapped and tested on loongarch64-linux-gnu. Yujie

[PATCH v2] LoongArch: Split loongarch_option_override_internal into smaller procedures

gcc/ChangeLog: * config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]recip as aliases to -mrecip={all,none}. * config/loongarch/loongarch.opt: Same. * config/loongarch/loongarch-def.h: Modify ABI condition macros for convenience. * config/loongarc

[PATCH] LoongArch: Split loongarch_option_override_internal into smaller procedures

gcc/ChangeLog: * config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]recip as aliases to -mrecip={all,none}. * config/loongarch/loongarch.opt: Same. * config/loongarch/loongarch-def.h: Modify ABI condition macros for convenience. * config/loongarc

Re: [PATCH v2] LoongArch: Implement option save/restore

v1 -> v2: Do not save la_target directly to struct cl_target_options in TARGET_OPTION_SAVE, update to *opts first instead, since it is getting saved later.

[PATCH v2] LoongArch: Implement option save/restore

LTO option streaming and target attributes both require per-function target configuration, which is achieved via option save/restore. We implement TARGET_OPTION_{SAVE,RESTORE} to switch the la_target context in addition to other automatically maintained option states (via the "Save" option propert

[PATCH v4] LOOP-UNROLL: Leverage HAS_SIGNED_ZERO for var expansion

From: Pan Li The insert_var_expansion_initialization depends on the HONOR_SIGNED_ZEROS to initialize the unrolling variables to +0.0f when -0.0f and no-signed-option. Unfortunately, we should always keep the -0.0f here because: * The -0.0f is always the correct initial value. * We need to suppo

Re: [pushed][PATCH 1/3] LoongArch: Optimized some of the symbolic expansion instructions generated during bitwise operations.

Pushed to r14-7125. 在 2024/1/6 下午4:54, Lulu Cheng 写道: There are two mode iterators defined in the loongarch.md: (define_mode_iterator GPR [SI (DI "TARGET_64BIT")]) and (define_mode_iterator X [(SI "!TARGET_64BIT") (DI "TARGET_64BIT")]) Replace the mode in the bit arithmetic fr

RE: [PATCH] i386: Add AVX10.1 related macros

> -Original Message- > From: Richard Biener > Sent: Wednesday, January 10, 2024 5:44 PM > To: Liu, Hongtao > Cc: Jiang, Haochen ; gcc-patches@gcc.gnu.org; > ubiz...@gmail.com; bur...@net-b.de; san...@codesourcery.com > Subject: Re: [PATCH] i386: Add AVX10.1 related macros > > On Wed, J

[PATCH] libstdc++/ranges: Use C++23 deducing this for _Pipe and _Partial

Tested on x86_64-pc-linux-gnu, does this look OK for trunk? -- >8 -- This simplifies the operator() of the _Pipe and _Partial range adaptor closure objects using C++23 deducing this, allowing us to condense multiple operator() overloads into one. The new __like_t alias template is similar to the

Re: [PATCH] Add support for function attributes and variable attributes

Hi David. Thanks for the review! > > +.. function:: void\ > > + gcc_jit_lvalue_add_string_attribute (gcc_jit_lvalue > > *variable, > > +enum > > gcc_jit_fn_attribute attribute, >

Re: [PATCH] libgccjit: Add support for machine-dependent builtins

Here it is: https://gcc.gnu.org/pipermail/jit/2023q4/001725.html On Wed, 2024-01-10 at 18:44 -0500, David Malcolm wrote: > On Wed, 2024-01-10 at 18:29 -0500, Antoni Boucher wrote: > > David: Ping in case you missed this patch. > > For some reason it's not showing up in patchwork (or, at least, I

Re: [PATCH] libgccjit: Add support for machine-dependent builtins

On Wed, 2024-01-10 at 18:29 -0500, Antoni Boucher wrote: > David: Ping in case you missed this patch. For some reason it's not showing up in patchwork (or, at least, I can't find it there). Do you have a URL for it there? Sorry about this Dave > > On Sat, 2023-02-11 at 17:37 -0800, Andrew Pins

PING: [PATCH] Do not count unused scalar use when marking STMT_VINFO_LIVE_P [PR113091]

Hi, Richard, Would you please talk a look at this patch? Thanks, Feng From: Feng Xue OS Sent: Friday, December 29, 2023 6:28 PM To: gcc-patches@gcc.gnu.org Subject: [PATCH] Do not count unused scalar use when marking STMT_VINFO_LIVE_P [PR113091] This

Re: [PATCH] libgccjit: Implement sizeof operator

On Wed, 2024-01-10 at 17:38 -0500, Antoni Boucher wrote: > On Tue, 2024-01-09 at 11:33 -0500, David Malcolm wrote: > > On Fri, 2023-12-22 at 10:25 -0500, Antoni Boucher wrote: > > > Hi. > > > This patch adds the support of the sizeof operator. > > > I was wondering if this new API entrypoint should

Re: [PATCH] libgccjit: Add missing builtins needed by optimizations

On Wed, 2024-01-10 at 17:02 -0500, Antoni Boucher wrote: > Just to make sure since we are in stage 4. Are we? I haven't seen an announcement, and it looked from https://gcc.gnu.org/pipermail/gcc/2024-January/243117.html that we might be pushing back the date for it. > Does that mean I can merge

Re: [PATCH] libstdc++: std/ranges - Remove a duplicate define directive

On Wed, 10 Jan 2024 at 21:28, Michael Levine (BLOOMBERG/ 120 PARK) wrote: > > From a67cfd07ce27a62f764b381268502acb68b6bad9 Mon Sep 17 00:00:00 2001 > From: Michael Levine > Date: Wed, 10 Jan 2024 15:48:46 -0500 > Subject: [PATCH 1/2] Removed a duplicate define directive for > __glibcxx_want_rang

Re: [PATCH] libgccjit: Add support for machine-dependent builtins

David: Ping in case you missed this patch. On Sat, 2023-02-11 at 17:37 -0800, Andrew Pinski wrote: > On Sat, Feb 11, 2023 at 4:31 PM Antoni Boucher via Gcc-patches > wrote: > > > > Hi. > > This patch adds support for machine-dependent builtins in libgccjit > > (bug 108762). > > > > There are tw

Re: [PATCH] libstdc++: Use _GLIBCXX_USE_BUILTIN_TRAIT for _Nth_type

On Wed, 10 Jan 2024 at 22:08, Patrick Palka wrote: > > Tested on x86_64-pc-linux-gnu, does this look OK for trunk? OK (thanks, this was on my TODO list). > -- >8 -- > > Since _Nth_type has a fallback native implementation, use > _GLIBCXX_USE_BUILTIN_TRAIT when deciding whether __type_pack_eleme

Re: [PATCH] libgccjit: Fix infinite recursion in gt_ggc_mx_lang_tree_node

It seems I cannot reproduce the issue. Should we drop this patch, then? Or do you think there's value in keeping it? On Mon, 2022-06-06 at 19:01 -0400, David Malcolm wrote: > On Thu, 2022-06-02 at 21:23 -0400, Antoni Boucher via Gcc-patches > wrote: > > Sorry, forgot to attach the patch. > > > >

Re: [PATCH] libgccjit: Add ability to get CPU features

David: Ping in case you missed it. On Wed, 2023-12-13 at 14:56 -0500, Antoni Boucher wrote: > David: Ping. > I guess if we want to have this merged for this release, it should be > sooner rather than later (if it's still an option). > > On Thu, 2023-11-09 at 18:04 -0500, David Malcolm wrote: > >

Re: [PATCH] i386: [APX] Document inline asm behavior and new switch for APX

Hongtao Liu writes: >> >> +@opindex mapx-inline-asm-use-gpr32 >> +@item -mapx-inline-asm-use-gpr32 >> +When APX_F enabled, EGPR usage was by default disabled to prevent >> +unexpected EGPR generation in instructions that does not support it. >> +To invoke EGPR usage in inline asm, use this switch

Re: [PATCH V2 2/4][RFC] RISC-V: Add vector related reservations

Since all the pipelines should be tuned to their cost model, they would be different anyway. If it would be simpler for now, I could separate the files out. I think I'm getting a bit confused. Is there a reason why we would want to exchange scheduler descriptions like the example you provided?

Re: [PATCH] libgccjit: Implement sizeof operator

On Tue, 2024-01-09 at 11:33 -0500, David Malcolm wrote: > On Fri, 2023-12-22 at 10:25 -0500, Antoni Boucher wrote: > > Hi. > > This patch adds the support of the sizeof operator. > > I was wondering if this new API entrypoint should take a location > > as > > a > > parameter. What do you think? >

[PATCH] Fortran: annotations for DO CONCURRENT loops [PR113305]

Dear all, we are accepting loop annotations IVDEP, UNROLL n, VECTOR, and NOVECTOR for ordinary do loops, but ICE when such an annotation is specified before a DO CONCURRENT loop. Since at least the Intel compilers recognize some of the annotations also for DO CONCURRENT, it seems natural to exten

Re: [PATCH] libgccjit: Fix GGC segfault when using -flto

On Wed, 2024-01-10 at 10:27 -0500, Antoni Boucher wrote: > On Wed, 2024-01-10 at 10:19 -0500, David Malcolm wrote: > > On Mon, 2023-12-11 at 19:20 -0500, Antoni Boucher wrote: > > > I'm not sure how to do this. I tried the following commands, but > > > this > > > fails even on master: > > > > > >

[PATCH] libstdc++: Use _GLIBCXX_USE_BUILTIN_TRAIT for _Nth_type

Tested on x86_64-pc-linux-gnu, does this look OK for trunk? -- >8 -- Since _Nth_type has a fallback native implementation, use _GLIBCXX_USE_BUILTIN_TRAIT when deciding whether __type_pack_element is available so that we can easily toggle which implementation to use. libstdc++-v3/ChangeLog:

Re: [PATCH] libgccjit: Add missing builtins needed by optimizations

Just to make sure since we are in stage 4. Does that mean I can merge it? In general, how would I know if it's OK to merge? If the patch is in the state Accepted on patchwork, does that mean it's always OK to merge no matter the stage we're in? On Tue, 2024-01-09 at 11:35 -0500, David Malcolm wro

[PATCH] libstdc++/ranges: Use perfect forwarding in _Pipe and _Partial ctors

Tested on x86_64-pc-linux-gnu, does this look OK for trunk? -- >8 -- This avoids redundant moves when composing and partially applying range adaptor objects. Note that the new constraints on _Partial's constructor templates are needed so that it's not inadvertently chosen over the copy construct

Ping Re: [PATCH] htdocs: correct spelling and use https in examples

Ping Thanks, Jonny On 06/12/2023 22:33, Jonny Grant wrote: > Revised version of this patch after review. > > ChangeLog: > > htdocs: correct spelling and use https in examples. > > > >>From 52d413bce86827f2add424e78321b509661f6f59 Mon Sep 17 00:00:00 2001 > From: Jonathan Grant > Date

Re: [PATCH 2/8] OpenMP: lvalue parsing for map/to/from clauses (C)

Julian Brown wrote: This patch adds support for parsing general lvalues ("locator list item types") for OpenMP "map", "to" and "from" clauses to the C front-end, similar to the previously-posted patch for C++. Such syntax is permitted for OpenMP 5.0 and above. It was previously posted for mainl

[PATCH v2]: gcc/doc/extend.texi: Update builtin example for __builtin_FILE, __builtin_LINE __builtin_FUNCTION

2024-01-10 Jonathan Grant gcc/ChangeLog: * doc/extend.texi: Update builtin example for __builtin_FILE __builtin_LINE __builtin_FUNCTION. >From 66290eb477dd1a99310ad9972c45391c2a87c1c7 Mon Sep 17 00:00:00 2001 From: Jonathan Grant Date: Wed, 29 Nov 2023 11:02:06 + Subject: [PAT

Re: [PATCH] gcc/doc: spelling mistakes and example

On 03/12/2023 17:55, David Malcolm wrote: > On Sun, 2023-12-03 at 11:59 +, Jonny Grant wrote: >> >> >> On 03/12/2023 04:03, Xi Ruoyao wrote: >>> On Sun, 2023-12-03 at 00:17 +, Jonny Grant wrote: @@ -733,7 +733,7 @@ To configure GCC:  @smallexample  % mkdir @var{objdir} >>>

[PATCH v2] gcc/doc: spelling mistakes and example

2024-01-10 Jonathan Grant gcc/doc * install.texi: show ../ back from the objdir in the example invoking configure correct spelling support, arithmetics This page is what is generated from install.texi https://gcc.gnu.org/install/configure.html >From c9fec3796600cc44c083

Re: [PATCH 14/14] libstdc++: Optimize std::is_scalar compilation performance

On Wed, 10 Jan 2024 at 19:47, Ken Matsui wrote: > > This patch optimizes the compilation performance of std::is_scalar > by dispatching to the new __is_scalar built-in trait. OK for trunk (if the new built-in is approved). > > libstdc++-v3/ChangeLog: > > * include/std/type_traits (is_sc

[PATCH] libstdc++: std/ranges - Remove a duplicate define directive

From a67cfd07ce27a62f764b381268502acb68b6bad9 Mon Sep 17 00:00:00 2001 From: Michael Levine Date: Wed, 10 Jan 2024 15:48:46 -0500 Subject: [PATCH 1/2] Removed a duplicate define directive for __glibcxx_want_ranges_iota Signed-off-by: Michael Levine --- libstdc++-v3/include/std/ranges | 1 - 1

Re: [PATCH 12/14] libstdc++: Optimize std::is_signed compilation performance

On Wed, 10 Jan 2024 at 19:47, Ken Matsui wrote: > > This patch optimizes the compilation performance of std::is_signed > by dispatching to the new __is_signed built-in trait. OK for trunk (if the new built-in is approved). > > libstdc++-v3/ChangeLog: > > * include/std/type_traits (is_si

Re: [PATCH 10/14] libstdc++: Optimize std::is_unsigned compilation performance

On Wed, 10 Jan 2024 at 19:41, Ken Matsui wrote: > > This patch optimizes the compilation performance of std::is_unsigned > by dispatching to the new __is_unsigned built-in trait. OK for trunk (if the new built-in is approved). > > libstdc++-v3/ChangeLog: > > * include/std/type_traits (i

Re: [PATCH 08/14] libstdc++: Optimize std::is_compound compilation performance

On Wed, 10 Jan 2024 at 19:41, Ken Matsui wrote: > > This patch optimizes the compilation performance of std::is_compound > by dispatching to the new __is_arithmetic built-in trait. OK for trunk (no need to wait for anything else to be approved). > > libstdc++-v3/ChangeLog: > > * include/

Re: [PATCH 06/14] libstdc++: Optimize std::is_arithmetic compilation performance

On Wed, 10 Jan 2024 at 19:47, Ken Matsui wrote: > > This patch optimizes the compilation performance of std::is_arithmetic > by dispatching to the new __is_arithmetic built-in trait. OK for trunk (if the new built-in is approved). > > libstdc++-v3/ChangeLog: > > * include/std/type_trait

Re: [PATCH 04/14] libstdc++: Optimize std::is_floating_point compilation performance

On Wed, 10 Jan 2024 at 19:43, Ken Matsui wrote: > > This patch optimizes the compilation performance of > std::is_floating_point by dispatching to the new > __is_floating_point built-in trait. OK for trunk (if the new built-in is approved). > > libstdc++-v3/ChangeLog: > > * include/std/

Re: [PATCH 02/14] libstdc++: Optimize std::is_integral compilation performance

On Wed, 10 Jan 2024 at 19:48, Ken Matsui wrote: > > This patch optimizes the compilation performance of std::is_integral > by dispatching to the new __is_integral built-in trait. OK for trunk (if the new built-in gets approved). > > libstdc++-v3/ChangeLog: > > * include/std/type_traits

[PATCH v3] aarch64: Fix dwarf2cfi ICEs due to recent CFI note changes [PR113077]

This is a v3 which addresses shortcomings of the v2 patch. v2 was posted here: https://gcc.gnu.org/pipermail/gcc-patches/2024-January/642448.html The main issue in v2 is that we were using the final (transformed) patterns in combine_reg_notes instead of the initial patterns (thanks Richard S for

Re: [RFC] aarch64: Add support for __BitInt

On Wed, Jan 10, 2024 at 11:06 AM Andre Vieira (lists) wrote: > > Hi, > > This patch is still work in progress, but posting to show failure with > bitint-7 test where handle_stmt called from lower_mergeable_stmt ICE's > because the idx (3) is out of range for the __BitInt(135) with a > limb_prec of

Re: [PATCH 13/14] c++: Implement __is_scalar built-in trait

On 01-10 (01:23), Ken Matsui wrote: > This patch implements built-in trait for std::is_scalar. > > gcc/cp/ChangeLog: > > * cp-trait.def: Define __is_scalar. > * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_SCALAR. > * semantics.cc (trait_expr_value): Likewise. > (fi

Re: [committed 2/2] libstdc++: Implement P2918R0 "Runtime format strings II" for C++26

On Wed, 10 Jan 2024 at 18:33, Daniel Krügler wrote: > > Am Mo., 8. Jan. 2024 um 03:25 Uhr schrieb Jonathan Wakely > : > > > > Tested x86_64-linux and aarch64-linux. Pushed to trunk. > > > > -- >8 -- > > > > This adds std::runtime_format for C++26. These new overloaded functions > > enhance the st

[PATCH 00/14] Optimize integral-related type traits

This patch series implements __is_integral, __is_floating_point, __is_arithmetic, __is_unsigned, __is_signed, and __is_scalar built-in traits and optimizes std::is_integral, std::is_floating_point, std::is_arithmetic, std::is_unsigned, std::is_signed, std::is_scalar, std::is_fundamental, and std::i

[PATCH 05/14] c++: Implement __is_arithmetic built-in trait

This patch implements built-in trait for std::is_arithmetic. gcc/cp/ChangeLog: * cp-trait.def: Define __is_arithmetic. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_ARITHMETIC. * semantics.cc (trait_expr_value): Likewise. (finish_trait_expr): Likewi

[PATCH 12/14] libstdc++: Optimize std::is_signed compilation performance

This patch optimizes the compilation performance of std::is_signed by dispatching to the new __is_signed built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_signed): Use __is_signed built-in trait. (is_signed_v): Likewise. Signed-off-by: Ken Matsui ---

[PATCH 03/14] c++: Implement __is_floating_point built-in trait

This patch implements built-in trait for std::is_floating_point. gcc/cp/ChangeLog: * cp-trait.def: Define __is_floating_point. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_FLOATING_POINT. * semantics.cc (trait_expr_value): Likewise. (finish_trait_e

[PATCH 01/14] c++: Implement __is_integral built-in trait

This patch implements built-in trait for std::is_integral. gcc/cp/ChangeLog: * cp-trait.def: Define __is_integral. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_INTEGRAL. * semantics.cc (trait_expr_value): Likewise. (finish_trait_expr): Likewise.

[PATCH 02/14] libstdc++: Optimize std::is_integral compilation performance

This patch optimizes the compilation performance of std::is_integral by dispatching to the new __is_integral built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_integral): Use __is_integral built-in trait. (is_integral_v): Likewise. Signed-off-by: Ken Ma

[PATCH 07/14] libstdc++: Optimize std::is_fundamental compilation performance

This patch optimizes the compilation performance of std::is_fundamental by dispatching to the new __is_arithmetic built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_fundamental_v): Use __is_arithmetic built-in trait. (is_fundamental): Likewise. Optimize

[PATCH 08/14] libstdc++: Optimize std::is_compound compilation performance

This patch optimizes the compilation performance of std::is_compound by dispatching to the new __is_arithmetic built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_compound): Do not use __not_. (is_compound_v): Use is_fundamental_v instead. Signed-off-by: Ken Mat

[PATCH 11/14] c++: Implement __is_signed built-in trait

This patch implements built-in trait for std::is_signed. gcc/cp/ChangeLog: * cp-trait.def: Define __is_signed. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_SIGNED. * semantics.cc (trait_expr_value): Likewise. (finish_trait_expr): Likewise. gcc/testsuite/C

[PATCH 14/14] libstdc++: Optimize std::is_scalar compilation performance

This patch optimizes the compilation performance of std::is_scalar by dispatching to the new __is_scalar built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_scalar): Use __is_scalar built-in trait. (is_scalar_v): Likewise. Signed-off-by: Ken Matsui ---

[PATCH 09/14] c++: Implement __is_unsigned built-in trait

This patch implements built-in trait for std::is_unsigned. gcc/cp/ChangeLog: * cp-trait.def: Define __is_unsigned. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_UNSIGNED. * semantics.cc (trait_expr_value): Likewise. (finish_trait_expr): Likewise. gcc/tests

[PATCH 13/14] c++: Implement __is_scalar built-in trait

This patch implements built-in trait for std::is_scalar. gcc/cp/ChangeLog: * cp-trait.def: Define __is_scalar. * constraint.cc (diagnose_trait_expr): Handle CPTK_IS_SCALAR. * semantics.cc (trait_expr_value): Likewise. (finish_trait_expr): Likewise. gcc/testsuite/C

[PATCH 06/14] libstdc++: Optimize std::is_arithmetic compilation performance

This patch optimizes the compilation performance of std::is_arithmetic by dispatching to the new __is_arithmetic built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_arithmetic): Use __is_arithmetic built-in trait. (is_arithmetic_v): Likewise. Signed-off-

[PATCH 04/14] libstdc++: Optimize std::is_floating_point compilation performance

This patch optimizes the compilation performance of std::is_floating_point by dispatching to the new __is_floating_point built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_floating_point): Use __is_floating_point built-in trait. (is_floating_point_v): Li

[PATCH 10/14] libstdc++: Optimize std::is_unsigned compilation performance

This patch optimizes the compilation performance of std::is_unsigned by dispatching to the new __is_unsigned built-in trait. libstdc++-v3/ChangeLog: * include/std/type_traits (is_unsigned): Use __is_unsigned built-in trait. (is_unsigned_v): Likewise. Signed-off-by: Ken Ma

Re: [PATCH V2 2/4][RFC] RISC-V: Add vector related reservations

> Since all the pipelines should be tuned to their cost model, they > would be different anyway. If it would be simpler for now, I could > separate the files out. > I think I'm getting a bit confused. Is there a reason why we would > want to exchange scheduler descriptions like the example you > pr

[RFC] aarch64: Add support for __BitInt

Hi, This patch is still work in progress, but posting to show failure with bitint-7 test where handle_stmt called from lower_mergeable_stmt ICE's because the idx (3) is out of range for the __BitInt(135) with a limb_prec of 64. I hacked gcc locally to work around this issue and still have on

Re: [PATCH][testsuite]: Make bitint early vect test more accurate

On Wed, Jan 10, 2024 at 06:07:16PM +, Tamar Christina wrote: > This changes the tests I committed for PR113287 to also > run on targets that don't support bitint. > > Regtested on aarch64-none-linux-gnu, x86_64-pc-linux-gnu and no issues and > tests run on both. > > Ok for master? Yes, thank

Re: [committed 2/2] libstdc++: Implement P2918R0 "Runtime format strings II" for C++26

Am Mo., 8. Jan. 2024 um 03:25 Uhr schrieb Jonathan Wakely : > > Tested x86_64-linux and aarch64-linux. Pushed to trunk. > > -- >8 -- > > This adds std::runtime_format for C++26. These new overloaded functions > enhance the std::format API so that it isn't necessary to use the less > ergonomic std::

Re: [Bug libstdc++/112477] [13/14 Regression] Assignment of value-initialized iterators differs from value-initialization

libstdc++: [_GLIBCXX_DEBUG] Fix assignment of value-initialized iterator [PR112477] Now that _M_Detach do not reset iterator _M_version value we need to reset it when the iterator is attached to a new sequence. Even if this sequencer is null like when assigning a value-initialized iterator. In

Re: [PATCH V2 2/4][RFC] RISC-V: Add vector related reservations

Hi Robin, On 1/10/2024 8:00 AM, Robin Dapp wrote: Hi Edwin, This patch copies the vector reservations from generic-ooo.md and inserts them into generic.md and sifive.md. Creates new vector crypto related insn reservations. In principle, the changes look good to me but I wonder if we could spl

Re: [PATCH v4] AArch64: Cleanup memset expansion

Wilco Dijkstra writes: > Hi Richard, > >>> +#define MAX_SET_SIZE(speed) (speed ? 256 : 96) >> >> Since this isn't (AFAIK) a standard macro, there doesn't seem to be >> any need to put it in the header file. It could just go at the head >> of aarch64.cc instead. > > Sure, I've moved it in v4. > >>

RE: [PATCH][testsuite]: Make bitint early vect test more accurate

> But I'm afraid I have no idea how is this supposed to work on > non-bitint targets or where __BITINT_MAXWIDTH__ is smaller than 9020. > There is no loop at all there, so what should be vectorized? > Yeah It was giving an unresolved and I didn't notice in diff. > I'd say introduce > # Return 1

Re: [PATCH] AArch64: Reassociate CONST in address expressions [PR112573]

Wilco Dijkstra writes: > GCC tends to optimistically create CONST of globals with an immediate offset. > However it is almost always better to CSE addresses of globals and add > immediate > offsets separately (the offset could be merged later in single-use cases). > Splitting CONST expressions wi

Re: [PATCH v2] RISC-V: T-HEAD: Add support for the XTheadInt ISA extension

On Tue, Jan 9, 2024 at 6:59 PM Jeff Law wrote: > > > > On 11/17/23 00:33, Jin Ma wrote: > > The XTheadInt ISA extension provides acceleration interruption > > instructions as defined in T-Head-specific: > > * th.ipush > > * th.ipop > > > > Ref: > > https://github.com/T-head-Semi/thead-extension-sp

Re: [PATCH v8 1/4] c++: P0847R7 (deducing this) - prerequisite changes. [PR102609]

Congratulations on landing this impressive work in GCC 14! On Sun, 7 Jan 2024, waffl3x wrote: > Bootstrapped and tested on x86_64-linux with no regressions. > > I'm considering this finished, I have CWG2586 working but I have not > included it in this version of the patch. I was not happy with t

Re: [PATCH][testsuite]: Make bitint early vect test more accurate

On Wed, Jan 10, 2024 at 04:55:00PM +, Tamar Christina wrote: > PR tree-optimization/113287 > * gcc.dg/vect/vect-early-break_100-pr113287.c: Support non-bitint. This part is ok. > --- a/gcc/testsuite/gcc.dg/vect/vect-early-break_99-pr113287.c > +++ b/gcc/testsuite/gcc.dg/vect/vect-

[PATCH][testsuite]: Make bitint early vect test more accurate

Hi All, This changes the tests I committed for PR113287 to also run on targets that don't support bitint. Regtested on aarch64-none-linux-gnu, x86_64-pc-linux-gnu and no issues and tests run on both. Ok for master? Thanks, Tamar gcc/testsuite/ChangeLog: PR tree-optimization/113287

Re: [PATCH] config: delete unused CYG_AC_PATH_LIBERTY macro

On 1/9/24 19:04, Mike Frysinger wrote: Nothing uses this, so delete it to avoid confusion. config/ChangeLog: * acinclude.m4 (CYG_AC_PATH_LIBERTY): Delete. OK jeff

[committed] RISC-V/testsuite: Fix comment termination in pr105314.c

Add terminating `/' character missing from one of the test harness command clauses in pr105314.c. This causes no issue with compilation owing to another comment immediately following, but would cause a: pr105314.c:3:1: warning: "/*" within comment [-Wcomment] message if warnings were enabled.

Re: [PATCH] Add a late-combine pass [PR106594]

On 1/10/24 06:01, Richard Sandiford wrote: So to get an idea for expectations: would it be a requirement that a GCC 15 submission is enabled unconditionally and all known issues in the ports fixed? I don't think we need to fix those latent port issues as a hard requirement. I try to balance

Re: [PATCH] RISC-V: Also handle sign extension in branch costing

On Tue, 9 Jan 2024, Jeff Law wrote: > > Depending on how you look at it you may qualify this as a bug fix (for > > the commit referred; it's surely rare enough a case I missed in original > > testing) or a missed optimisation. Either way it's a narrow-scoped very > > small change, almost an obv

Re: [PATCH] Add a late-combine pass [PR106594]

On 1/10/24 06:35, Richard Biener wrote: I think x86 maintainers could opt to disable the pass - so it would be opt-out. It's reasonable to expect them to fix the backend given there's nothing really wrong with the new pass, it just does something that wasn't done before at that point? That's

[committed] testsuite: Add testcase for already fixed PR [PR112734]

Hi! This test was already fixed by r14-6051 aka PR112770 fix. Tested on x86_64-linux, committed to trunk as obvious. 2024-01-10 Jakub Jelinek PR tree-optimization/112734 * gcc.dg/bitint-64.c: New test. --- gcc/testsuite/gcc.dg/bitint-64.c.jj 2024-01-10 17:17:08.438466886 +01

Re: [PATCH] Update documents for fcf-protection=

On Tue, Jan 9, 2024 at 6:02 PM liuhongt wrote: > > After r14-2692-g1c6231c05bdcca, the option is defined as EnumSet and > -fcf-protection=branch won't unset any others bits since they're in > different groups. So to override -fcf-protection, an explicit > -fcf-protection=none needs to be added and

Re: [PATCH V2 2/4][RFC] RISC-V: Add vector related reservations

Hi Edwin, > This patch copies the vector reservations from generic-ooo.md and > inserts them into generic.md and sifive.md. Creates new vector crypto related > insn reservations. In principle, the changes look good to me but I wonder if we could split off the vector parts from generic-ooo into th

[PATCH] AArch64: Reassociate CONST in address expressions [PR112573]

GCC tends to optimistically create CONST of globals with an immediate offset. However it is almost always better to CSE addresses of globals and add immediate offsets separately (the offset could be merged later in single-use cases). Splitting CONST expressions with an index in aarch64_legitimize_

Re: [PATCH V2] RISC-V: Switch RVV cost model.

LGTM. Regards Robin

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