Co-Authored-By: xujiahao
gcc/ChangeLog:
* config/loongarch/loongarch-def.c: Initial number of parallel prefetch.
* config/loongarch/loongarch-tune.h (struct loongarch_cache):
Define number of parallel prefetch.
* config/loongarch/loongarch.cc (loongarch_option_ove
在 2022/11/12 下午3:08, Xi Ruoyao 写道:
On Wed, 2022-11-09 at 21:53 +0800, Xi Ruoyao wrote:
These patches allow to expand the following builtins to floating point
instructions for LoongArch:
- __builtin_rint{,f}
- __builtin_{l,ll}rint{,f}
- __builtin_{l,ll}floor{,f}
- __builtin_{l,ll}ceil{,f}
- __
On Fri, 11 Nov 2022 18:17:46 -0500
Andrew MacLeod wrote:
> On 11/11/22 16:56, Bernhard Reutner-Fischer wrote:
> > So of course it doesn't really matter what that stmt was, a non_debug
> > is as good as a debug one AFAIU, it's just a marker, as good as any SSA
> > version or id, i suppose. So gsi_
On Wed, 2022-11-09 at 21:53 +0800, Xi Ruoyao wrote:
> These patches allow to expand the following builtins to floating point
> instructions for LoongArch:
>
> - __builtin_rint{,f}
> - __builtin_{l,ll}rint{,f}
> - __builtin_{l,ll}floor{,f}
> - __builtin_{l,ll}ceil{,f}
> - __builtin_scalb{n,ln}{,f}
在 2022/11/12 下午12:40, Xi Ruoyao 写道:
On Sat, 2022-11-12 at 11:54 +0800, Lulu Cheng wrote:
在 2022/11/9 下午9:53, Xi Ruoyao 写道:
This allows optimizing __builtin_ldexp{,f} and __builtin_scalbn{,f}
with
-fno-math-errno.
IMODE is added because we can't hard code SI for operand 2:
fscaleb.d
instructi
LGTM!
Thanks.
在 2022/11/9 下午9:53, Xi Ruoyao 写道:
On LoongArch, flogb instructions extract the exponent of a non-negative
floating point value, but produces NaN for negative values. So we need
to add a fabs instruction when we expand logb.
gcc/ChangeLog:
* config/loongarch/loongarch.md
This patch adds support for new instructions that may be added to the PowerPC
architecture in the future to enhance the load and store vector with length
instructions.
The current instructions (lxvl, lxvll, stxvl, and stxvll) are inconvient to use
since the count for the number of bytes must be in
This patch adds support for a saturating subtract built-in function that may be
added to a future PowerPC processor. Note, if it is added, the name of the
built-in function may change before GCC 13 is released. If the name changes,
we will submit a patch changing the name.
I also added support f
[Global / middle-end reviewers, note there is a dfp.cc change here
that needs review.]
Implement C2x constexpr (a feature based on the C++ one but much more
minimal, with only constexpr variables, not functions).
I believe this implementation is fully functional for use of this
feature. However,
On Sat, 2022-11-12 at 11:54 +0800, Lulu Cheng wrote:
>
> 在 2022/11/9 下午9:53, Xi Ruoyao 写道:
> > This allows optimizing __builtin_ldexp{,f} and __builtin_scalbn{,f}
> > with
> > -fno-math-errno.
> >
> > IMODE is added because we can't hard code SI for operand 2:
> > fscaleb.d
> > instruction always
在 2022/11/9 下午9:53, Xi Ruoyao 写道:
This allows optimizing __builtin_ldexp{,f} and __builtin_scalbn{,f} with
-fno-math-errno.
IMODE is added because we can't hard code SI for operand 2: fscaleb.d
instruction always take the high half of both source registers into
account. See my_ldexp_long in t
On Fri, 2022-11-11 at 22:23 -0500, David Malcolm wrote:
> Changes since v1: ported the doc changes from texinfo to sphinx
>
> Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
>
> Are the C frontend parts OK for trunk? (I can self-approve the
> analyzer parts)
...and FWIW, the foll
Changed in v2: ported doc changes from texinfo to sphinx
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
I can self-approve this patch, but it depends on the named constants
patch here:
* [PATCH v2] c, analyzer: support named constants in analyzer [PR106302]
* https://gcc.gnu
Changes since v1: ported the doc changes from texinfo to sphinx
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Are the C frontend parts OK for trunk? (I can self-approve the
analyzer parts)
Thanks
Dave
The analyzer's file-descriptor state machine tracks the access mode of
open
On Fri, 11 Nov 2022 at 21:00, Stephan Bergmann wrote:
>
> On 11/11/22 06:30, Jonathan Wakely via Gcc-patches wrote:
> > As discussed in the PR, this makes it three times faster to construct
> > iostreams objects.
> >
> > Tested x86_64-linux. Pushed to trunk.
>
> I haven't yet tried to track down w
I have no more questions.
Thanks.
在 2022/11/11 下午1:29, Xi Ruoyao 写道:
Lulu:
So I think the code is correct:
+ (
+|| flag_fp_int_builtin_inexact
+|| !flag_trapping_math)"
is 1 for lrint, 0 for lceil and lfloor. As N3054
says:
The lrint and llrint functions provide floating-to-
Hi,
the previous patch established a way to propagate information about
parameters from callers to callees (even though then the actual
splitting is done in the opposite direction), this patch adds to that
information about size of the parameters that is known to be safe to
dereference in the call
Hi,
while modifying the code, I realized that we do look into statements
even when there are no replacements. This patch adds the necessary
early bail-outs to avoid that.
ipa_param_body_adjustments::modify_call_stmt cannot have the same at
the very beginning because calls can still contain other
Hi,
I have noticed that scan_expr_access passes all the expressions it
gets to get_ref_base_and_extent even when we are really only
interested in memory accesses. So bail out when the expression is
something clearly uninteresting.
Bootstrapped and tested on x86_64-linux. OK for master?
Thanks,
Hi,
this patch does not do any functional changes, it merely moves
top-down propagation in the IPA-SRA WPA phase before bottom-up one.
This also meant moving some preliminary checks from the latter to the
former - where they need to be in their own loop over each SCC because
the subsequent one loo
Hi,
C++ and especially Fortran pass data by references which are not
pointers potentially pointing anywhere and so can be assumed to be
safely dereferencable. This patch teaches IPA-SRA to treat them as
such and avoid the dance we do to prove that we can move loads from
them to the caller.
When
Hi,
Fortran descriptors are structures which are often constructed just
for a particular argument of a particular call where it is passed by
reference. When the called function is under compiler's control, it
can be beneficial to split up the descriptor and pass it in individual
parameters. Unfo
Hi,
this should have been part of r12-578-g717d278af93a4a. Call edge
summaries provide information required for IPA-SRA transformations in
the callees but are generated when analyzing callers and thus also
callers which are not IPA-SRA candidates themselves. Therefore we
analyze them but don't d
Hi,
looking at some benchmarks I have noticed many cases when IPA-CP
cloned a function for all contexts just because it knew that some
parameters were not used at all. Then IPA-SRA looked at the function
and cloned it again to split another parameter or two. The latter
pass is better equipped to
Hi,
this is basically a better fix for PR 103227. The one currently in
use, rushed in late at stage3, which means that IPA-CP transformation
simply does a replacement of default-definition of IPA-SRA-created
scalar parameters with a constant, meant that IPA-SRA actually often
led to creation of a
Hi,
IPA-CP transformation summary streaming code currently won't stream
out transformations necessary for clones which are only necessary for
materialization of other clones (such as an IPA-CP clone which is then
cloned again by IPA-SRA). However, a follow-up patch for bettor
reconciling IPA-SRA
Hi,
When building vectors of known aggregate values, there is no point in
including those for parameters which are not used in any way
whatsoever.
Bootstrapped and tested on x86_64-linux. OK for master?
Thanks,
Martin
gcc/ChangeLog:
2022-11-11 Martin Jambor
* ipa-cp.cc (push_agg
I posted this at the start of the year while we were in stage 3.
Tested x86_64-linux. Pushed to trunk.
-- >8 --
This rewrites the stamp-debug and build-debug targets in src/Makefile so
that each generated Makefile in the debug/$(SUBDIRS) directories is a
make target, instead of being created by
Hi,
I have noticed that the flag m_split_modifications_p of
ipa_param_body_adjustments is not really necessary as it has to
correspond to whether m_replacements is non-empty so this patch
removes it. This also simplifies a bit some patches I work on.
Bootstrapped and tested on x86_64-linux. OK
This fixes a build failure on powerpc64le when using ieeelongdouble as
the default.
Tested x86_64-linux. Pushed to trunk.
-- >8 --
compatibility-ldbl-alt128.cc re-includes locale-inst-numeric.h and
locale-inst-monetary.h but wasn't defining the macros added in
r13-3888-gb3ac43a3c05744.
Put thos
Thanks for that. I'll keep your comments in mind for the future.
On Fri, Nov 11, 2022 at 05:59:33PM +, Jonathan Wakely wrote:
> On Fri, 11 Nov 2022 at 17:55, Patrick Palka wrote:
> >
> > On Fri, 11 Nov 2022, Jonathan Wakely via Libstdc++ wrote:
> >
> > > On Fri, 11 Nov 2022 at 11:23, Nathanie
On Fri, 11 Nov 2022, Tobias Burnus wrote:
> For /onlinedocs/, I concur that we want to have the old doc there as there are
> many
> deep links. Still, we should consider adding a disclaimer box to all former
> mainline
> documentation stating that this data is no longer updated + point to the new
On Linux/x86_64,
81de4037454275f8ed6d858fbc129e832c6147ef is the first bad commit
commit 81de4037454275f8ed6d858fbc129e832c6147ef
Author: Richard Biener
Date: Fri Nov 11 14:28:52 2022 +0100
tree-optimization/107554 - fix ICE in stlen optimization
caused
FAIL: gcc.dg/pr107554.c (test for
On 11/11/22 16:56, Bernhard Reutner-Fischer wrote:
On Fri, 11 Nov 2022 11:17:17 -0500
Andrew MacLeod via Gcc-patches wrote:
diff --git a/gcc/tree-vrp.cc b/gcc/tree-vrp.cc
index 3393c73a7db..a474d9d11e5 100644
--- a/gcc/tree-vrp.cc
+++ b/gcc/tree-vrp.cc
@@ -4485,6 +4486,7 @@ public:
for
On Mon, 2022-10-17 at 15:28 +0200, Martin Liška wrote:
> Hello.
>
> Based on the very positive feedback I was given at the Cauldron
> Sphinx Documentation BoF,
> I'm planning migrating the documentation on 9th November. There are
> still some minor comments
> from Sandra when it comes to the PDF o
Richard Biener writes:
>> +M2_MAINTAINER = no
>> +
>> +CPP_GM2=-fpermissive -DIN_GCC -g
>
> Do we really need -fpermissive here?
no not needed (and now removed) - thanks for spotting it.
>> +GM2_1 = ./gm2 -B./stage1/m2 -g -fm2-g
>> +
>> +GM2_FOR_TARGET = $(STAGE_CC_WRAPPER) ./gm2 -B./ -B$(build
On Fri, 11 Nov 2022 at 17:44, Jonathan Wakely via Libstdc++
wrote:
>
> Tested x86_64-linux and x86_64-w64-ming32 (via Wine).
Sigh, I did test on Wine, but then what I pushed didn't include the
fix that was found thanks to that testing.
This is needed to prevent runtime errors on Windows when con
On Fri, 11 Nov 2022 11:17:17 -0500
Andrew MacLeod via Gcc-patches wrote:
> diff --git a/gcc/tree-vrp.cc b/gcc/tree-vrp.cc
> index 3393c73a7db..a474d9d11e5 100644
> --- a/gcc/tree-vrp.cc
> +++ b/gcc/tree-vrp.cc
> @@ -4485,6 +4486,7 @@ public:
> for (gphi_iterator gsi = gsi_start_phis (bb); !
gcc/analyzer/ChangeLog:
* sm-fd.dot: Fix typo in comment.
* sm-file.dot: New file.
* varargs.cc: Fix typo in comment.
* varargs.dot: New file.
Signed-off-by: David Malcolm
---
gcc/analyzer/sm-fd.dot | 2 +-
gcc/analyzer/sm-file.dot | 67
On Thu, Nov 10, 2022 at 7:46 PM Ramana Radhakrishnan
wrote:
>
> On Thu, Nov 10, 2022 at 6:03 PM Richard Earnshaw
> wrote:
> >
> >
> >
> > On 10/11/2022 17:21, Richard Earnshaw via Gcc-patches wrote:
> > >
> > >
> > > On 08/11/2022 18:20, Ramana Radhakrishnan via Gcc-patches wrote:
> > >> PR92999
> On 8 Nov 2022, at 07:14, Sam James wrote:
>
> 1. This should speed up decompression for folks, as parallel xz
> creates a different archive which can be decompressed in parallel.
>
> Note that this different method is enabled by default in a new
> xz release coming shortly anyway (>= 5
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu.
Pushed to trunk as r13-3913-g65752c1f7c41c5.
gcc/analyzer/ChangeLog:
* checker-path.h: Split out checker_event and its subclasses to...
* checker-event.h: ...this new header.
Signed-off-by: David Malcolm
---
gcc/anal
This patch adds a new -Wanalyzer-infinite-recursion warning to
-fanalyzer, which complains about certain cases of infinite recursion.
Specifically, when it detects recursion during its symbolic execution
of the user's code, it compares the state of memory to that at the
previous level of recursion
On 11/11/22 13:52, Gerald Pfeifer wrote:
On Tue, 8 Nov 2022, Martin Liška wrote:
After the migration, people should be able to build (and install) GCC
even if they miss Sphinx (similar happens now if you miss makeinfo).
My nightly *install* (not build) on amd64-unknown-freebsd12.2 broke
(from
On 11/9/22 8:44 PM, Michael Meissner via Gcc-patches wrote:
> + /* For now, make -mtune=future the same as -mtune=power10. */
> + if (rs6000_tune == PROCESSOR_FUTURE)
> +rs6000_tune = PROCESSOR_POWER10;
This comment matches the code...
> + /* Some future processor. For now, just use powe
On 11/11/22 06:30, Jonathan Wakely via Gcc-patches wrote:
As discussed in the PR, this makes it three times faster to construct
iostreams objects.
Tested x86_64-linux. Pushed to trunk.
I haven't yet tried to track down what's going on, but with various
versions of Clang (e.g. clang-15.0.4-1.f
On Tue, 8 Nov 2022, Martin Liška wrote:
> After the migration, people should be able to build (and install) GCC
> even if they miss Sphinx (similar happens now if you miss makeinfo).
My nightly *install* (not build) on amd64-unknown-freebsd12.2 broke
(from what I can tell due to this - it's bee
On Fri, 11 Nov 2022 11:56:08 PST (-0800), gcc-patches@gcc.gnu.org wrote:
On Fri, Nov 11, 2022 at 5:03 AM Oria Chen via Gcc-patches
wrote:
gcc/testsuite ChangeLog:
2022-11-11 Oria Chen
* gcc/testsuite/gcc.dg/pr25521.c: Add compile option
"-msmall-data-limit=0" to avoid using .srod
Non-const lvalue references can't bind to a temporary, so the
warning should not be emitted if we're initializing something of that
type. I'm not disabling the warning when the function itself returns
a non-const lvalue reference, that would regress at least
const int &r = std::any_cast(std::an
On Fri, Nov 11, 2022 at 2:26 AM Kyrylo Tkachov via Gcc-patches
wrote:
>
> Hi all,
>
> This patch adds codegen for FEAT_CSSC from the 2022 Architecture extensions.
> It fits various existing optabs in GCC quite well.
> There are instructions for scalar signed/unsigned min/max, abs, ctz, popcount.
>
On Fri, Nov 11, 2022 at 5:03 AM Oria Chen via Gcc-patches
wrote:
>
> gcc/testsuite ChangeLog:
>
> 2022-11-11 Oria Chen
>
> * gcc/testsuite/gcc.dg/pr25521.c: Add compile option
> "-msmall-data-limit=0" to avoid using .srodata section.
I noticed g++.dg/cpp0x/constexpr-rom.C has some sli
This adjusts gimple-ranger::update_stmt (which inform the range engine
that a statement has changed under the covers. I was calculating the
statement using a fur_depend class instead of a fur_stmt. (FUR is Fold
Using Range)
The difference between the 2 is that a fur_depend will reigster any
gcc/
PR target/107645
* config/m68k/predicates.md (symbolic_operand): Return false
when UNSPEC is under the CONST node.
---
Regtested with --enable-checking=all for target=m68k-linux-uclibc, no
new regressions compared to the compiler built without checking.
Ok for master?
Richard Biener writes:
> On Mon, Oct 10, 2022 at 5:36 PM Gaius Mulley via Gcc-patches
> wrote:
>>
>>
>>
>> This patch set contains the non machine generated changes found in /
>> for example the language die and documentation changes. It also
>> contains the changes to the top level build Makef
Passes tests for all languages. Passes lapack tests.
So ready to be installed unless you have any issues. Oh... I should
write some tests..
Aldy
On Fri, Nov 11, 2022, 19:11 Aldy Hernandez wrote:
> Currently we represent < and > with a closed interval. So < 3.0 is
> represented as [-INF, +
This requirement is enforced by a gcc_checking_assert in
record_estimate.
gcc/ChangeLog:
* tree-ssa-loop.h (tree_niter_desc): Update comment.
--
diff --git a/gcc/tree-ssa-loop.h b/gcc/tree-ssa-loop.h
index
6c70f795d171f22b3ed75873fec4920fea75255b..c24215be8822c31a05eaedcf4d3a26db0fea
This recognises the patterns of the form:
while (n & 1) { n >>= 1 }
Unfortunately there are currently two issues relating to this patch.
Firstly, simplify_using_initial_conditions does not recognise that
(n != 0) and ((n & 1) == 0) implies that ((n >> 1) != 0).
This preconditions arise
On Fri, Nov 11, 2022 at 10:48 AM Patrick Palka via Gcc-patches
wrote:
>
> The commit r13-3706-gd0a492faa6478c for correcting the result of
> __has_attribute(init_priority) causes a bootstrap failure on hppa64-hpux
> because it assumes SUPPORTS_INIT_PRIORITY expands to a simple constant,
> but on t
gcc/ChangeLog:
*
doc/gccint/testsuites/directives-used-within-dejagnu-tests/keywords-describing-target-attributes.rst:
Add missing target attributes.
--
diff --git
a/gcc/doc/gccint/testsuites/directives-used-within-dejagnu-tests/keywords-describing-target-attributes.rst
b/g
On Wed, Nov 9, 2022 at 1:49 AM Xi Ruoyao wrote:
>
> On Mon, 2022-11-07 at 20:36 -0800, Kevin Lee wrote:
> I "shamelessly copied" your idea in
> https://gcc.gnu.org/pipermail/gcc-patches/2022-November/605456.html.
> During the review we found an issue.
>
> -fno-fp-int-builtin-inexact does not allo
This recognises patterns of the form:
while (n) { n >>= 1 }
This patch results in improved (but still suboptimal) codegen:
foo (unsigned int b) {
int c = 0;
while (b) {
b >>= 1;
c++;
}
return c;
}
foo:
.LFB11:
.cfi_startproc
cbz w0, .L3
The commit r13-3706-gd0a492faa6478c for correcting the result of
__has_attribute(init_priority) causes a bootstrap failure on hppa64-hpux
because it assumes SUPPORTS_INIT_PRIORITY expands to a simple constant,
but on this target SUPPORTS_INIT_PRIORITY is defined as
#define SUPPORTS_INIT_PRIORITY
The upcoming c[lt]z idiom recognition patch eliminates the need for a
brute force computation of the iteration count of these loops. The test
is intended to verify that ivcanon can determine the loop count when the
condition is given by a chain of constant computations.
We replace the constant ope
On Fri, 11 Nov 2022 at 17:16, Jonathan Wakely wrote:
>
> On Mon, 7 Nov 2022 at 13:51, Jonathan Wakely wrote:
> >
> > On Mon, 7 Nov 2022 at 13:33, LIU Hao wrote:
> > >
> > > 在 2022-11-07 20:57, Jonathan Wakely 写道:
> > > > It would be a lot nicer if playback::context met the C++ Lockable
> > > > requ
Currently we represent < and > with a closed interval. So < 3.0 is
represented as [-INF, +3.0]. This means 3.0 is included in the range,
and though not ideal, is conservatively correct. Jakub has found a
couple cases where properly representing < and > would help
optimizations and tests, and thi
On Fri, 11 Nov 2022 at 17:55, Patrick Palka wrote:
>
> On Fri, 11 Nov 2022, Jonathan Wakely via Libstdc++ wrote:
>
> > On Fri, 11 Nov 2022 at 11:23, Nathaniel Shead via Libstdc++
> > wrote:
> > >
> > > Hi,
> > >
> > > Below is a patch to fix std::string in constexpr contexts on Clang. This
> > >
On Fri, 11 Nov 2022, Jonathan Wakely via Libstdc++ wrote:
> On Fri, 11 Nov 2022 at 11:23, Nathaniel Shead via Libstdc++
> wrote:
> >
> > Hi,
> >
> > Below is a patch to fix std::string in constexpr contexts on Clang. This
> > was originally fixed in the commits attached to PR103295, but a later
>
Tested x86_64-linux and x86_64-w64-ming32 (via Wine).
Pushed to trunk. This needs to be backported too.
-- >8 --
In commit r9-7381-g91756c4abc1757 I changed filesystem::path to use
std::codecvt for conversions from all wide
strings to UTF-8, instead of using std::codecvt_utf8. This was
done beca
Hi all,
This is the 2/2 patch that contains the functional changes needed
for MVE Tail Predicated Low Overhead Loops. See my previous email
for a general introduction of MVE LOLs.
This support is added through the already existing loop-doloop
mechanisms that are used for non-MVE dls/le looping.
We didn't previously use SVE's RDVL instruction, since the CNT*
forms are preferred and provide most of the range. However,
there are some cases that RDVL can handle and CNT* can't,
and using RDVL-like instructions becomes important for SME.
Tested on aarch64-linux-gnu. I plan to apply this soon
Arm's SME has an array called ZA that for inline asm purposes
is effectively a form of special-purpose memory. It doesn't
have an associated storage type and so can't be passed and
returned in normal C/C++ objects.
We'd therefore like "za" in a clobber list to mean that an inline
asm can read fro
> Similarly to other manuals, we should include the page
> in HTML builder.
>
> What Ada folks think about it?
The latest changes have broken our build of the Ada doc at AdaCore so until
further notice, please do not make any additional changes to the Ada doc while
we review in details all t
On Mon, 7 Nov 2022 at 13:51, Jonathan Wakely wrote:
>
> On Mon, 7 Nov 2022 at 13:33, LIU Hao wrote:
> >
> > 在 2022-11-07 20:57, Jonathan Wakely 写道:
> > > It would be a lot nicer if playback::context met the C++ Lockable
> > > requirements, and playback::context::compile () could just take a
> > > s
On Fri, 11 Nov 2022 at 11:23, Nathaniel Shead via Libstdc++
wrote:
>
> Hi,
>
> Below is a patch to fix std::string in constexpr contexts on Clang. This
> was originally fixed in the commits attached to PR103295, but a later
> commit 98a0d72a seems to have mistakenly undone this.
>
> Tested on x86_
Hi!
The following patch on top of Marek's P2448 PR106649 patch
(mainly because that patch implements the previous __cpp_constexpr
feature test macro bump so this can't go in earlier; OT,
P2280R4 doesn't have any feature test macro?) implements this
simple paper.
Ok for trunk if it passes bootstra
We have the following two hooks into the call expansion code:
- TARGET_CALL_ARGS is called for each argument before arguments
are moved into hard registers.
- TARGET_END_CALL_ARGS is called after the end of the call
sequence (specifically, after any return value has been
moved to a pseudo).
Epilogues for sibling calls are generated using the
sibcall_epilogue pattern. One disadvantage of this approach
is that the target doesn't know which call the epilogue is for,
even though the code that generates the pattern has the call
to hand.
Although call instructions are currently rtxes, and
Arm's SME adds a new processor mode called streaming mode.
This mode enables some new (matrix-oriented) instructions and
disables several existing groups of instructions, such as most
Advanced SIMD vector instructions and a much smaller set of SVE
instructions. It can also change the current vecto
The prologue/epilogue pass allows the prologue sequence
to contain jumps. The sequence is then partitioned into
basic blocks using find_many_sub_basic_blocks.
This patch treats epilogues in the same way. It's needed for
a follow-on aarch64 patch that adds conditional code to both
the prologue an
I was processing the transitive inferred ranges in fold_stmt when it was
the final statement in the block. the substitute_and_fold engine
actually does a bit of work before calling fold_stmt. this patch moves
the check to pre_fold_stmt instead so it gets done before the final
statement in the
On Fri, Nov 11, 2022 at 4:34 AM Martin Liška wrote:
>
> Noticed that the documentation build can stuck on a machine with
> many cores (160) and I identified a real sphinx problem:
> https://github.com/sphinx-doc/sphinx/issues/10969
>
> Note the parallel can help just for some manuals and it is not
This patch adds TR11 to the history of OpenMP releases – and it does an
update of the implementation status.
OK?
Tobias
PS: The implementation-status changes were lying around in that file for
a while. I think both the GCC 13 release notes and this file needs some
update for more recent chan
Hi,
This patch adds support for Cortex-X3 CPU.
Bootstrapped on aarch64-none-linux-gnu and found no regressions.
Ok for GCC master?
Regards,
Srinath.
gcc/ChangeLog:
2022-11-09 Srinath Parvathaneni
* config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-X3 CPU.
* c
Hi,
> -Original Message-
> From: Kyrylo Tkachov
> Sent: Friday, November 11, 2022 2:24 PM
> To: Srinath Parvathaneni ; gcc-
> patc...@gcc.gnu.org
> Cc: Richard Sandiford
> Subject: RE: [PATCH][GCC] aarch64: Add support for Cortex-A715 CPU.
>
> Hi Srinath,
>
> > -Original Message---
On 11/11/22 09:22, Aldy Hernandez wrote:
A return of false means the operation is not handled, similar to what
the default operators defined at the top of range-op*.cc do. The
caller (gori?) is free to disregard the range altogether. In practice
this means VARYING, so you're getting the
Add a new option -mdirect-extern-access similar to other targets. This removes
GOT indirections on external symbols with -fPIE, resulting in significantly
better code quality. With -fPIC it only affects protected symbols, allowing
for more efficient shared libraries which can be linked with stand
Hi All,
The current i386 implementation of the TARGET_CAN_CHANGE_MODE_CLASS is currently
not useful before re-alloc.
In particular before regalloc optimization passes query the hook using ALL_REGS,
but because of the
if (MAYBE_FLOAT_CLASS_P (regclass))
return false;
The hook returns fal
Hi All,
While writing a patch series I started getting incorrect codegen out from
VEC_PERM on partial struct types.
It turns out that this was happening because the TARGET_CAN_CHANGE_MODE_CLASS
implementation has a slight bug in it. The hook only checked for SIMD to
Partial but never Partial to
Hi,
> > --- a/gcc/config/aarch64/aarch64-simd.md
> > +++ b/gcc/config/aarch64/aarch64-simd.md
> > @@ -4259,7 +4259,7 @@ (define_insn
> "*aarch64_get_lane_zero_extend"
> > ;; Extracting lane zero is split into a simple move when it is
> > between SIMD ;; registers or a store.
> > (define_insn_an
Hi,
> This name might cause confusion with the SVE iterators, where FULL means
> "every bit of the register is used". How about something like VMOVE
> instead?
>
> With this change, I guess VALL_F16 represents "The set of all modes for
> which the vld1 intrinsics are provided" and VMOVE or what
The following fixes a wrongly typed variable causing an ICE.
Bootstrapped and tested on x86_64-unknown-linux-gnu, pushed.
PR tree-optimization/107554
* tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes):
Use unsigned HOST_WIDE_INT type for the strlen.
* gcc.dg/
Hi,
>
> ...can we use expand_vec_perm_const here? It will try the constant
> expansion first, which is the preferred order. It also has a few variations
> up
> its sleeve.
>
We can, however it this function seems to be incorrectly assuming it can always
Convert the input mode to a QI vector
On 11/11/22 11:01, Jakub Jelinek wrote:
On Fri, Nov 11, 2022 at 09:52:53AM +0100, Jakub Jelinek via Gcc-patches wrote:
Ok, here is the patch rewritten in the foperator_div style, with special
cases handled first and then the ordinary cases without problematic cases.
I guess if/once we have a
Hi Srinath,
> -Original Message-
> From: Srinath Parvathaneni
> Sent: Friday, November 11, 2022 11:58 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Richard Sandiford ; Kyrylo Tkachov
>
> Subject: [PATCH][GCC] aarch64: Add support for Cortex-A715 CPU.
>
> Hi,
>
> This patch adds support for Co
On 11/11/22 12:50, Jakub Jelinek wrote:
On Wed, Nov 09, 2022 at 04:43:56PM +0100, Aldy Hernandez wrote:
On Wed, Nov 9, 2022 at 3:58 PM Jakub Jelinek wrote:
On Wed, Nov 09, 2022 at 10:02:46AM +0100, Aldy Hernandez wrote:
We can implement the op[12]_range entries for plus and minus in terms
Add support for AArch64 LSE and LSE2 to libatomic. Disable outline atomics,
and use LSE ifuncs for 1-8 byte atomics and LSE2 ifuncs for 16-byte atomics.
On Neoverse V1, 16-byte atomics are ~4x faster due to avoiding locks.
Note this is safe since we swap all 16-byte atomics using the same ifunc,
On Tue, Jul 26, 2022 at 1:18 PM Richard Biener via Gcc-patches
wrote:
>
> The following improves on the fix for PR105142 which restricted the
> expression lookup used for maybe_fold_comparisons_from_match_pd to
> avoid picking up flow-sensitive info for use in places where guarding
> conditions do
On Mon, Oct 10, 2022 at 5:32 PM Gaius Mulley via Gcc-patches
wrote:
>
>
> Here are the latest modula-2 front end patches for review.
> The status of the patches and their contents are also contained at:
>
>https://splendidisolation.ddns.net/public/modula2/patchsummary.html
>
> where they are a
This includes various changes to improve clarity, and to enable the code
to be more similar to the clz and ctz idiom recognition added in
subsequent patches.
We create new number_of_iterations_bitcount function, which will be used
to call the other bit-counting recognition functions added in subse
On Mon, Oct 10, 2022 at 5:34 PM Gaius Mulley via Gcc-patches
wrote:
>
>
>
> The makefile fragment for modula2 which builds the gm2 driver and cc1gm2.
>
>
> --8<--8<--8<--8<--8<--8<
> diff -ruw /dev/null gcc-git-devel-modula2/gcc/m2/Make-lang.in
> ---
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