[COMMITTED][GCC9] Backport RISC-V: Fix bad insn splits with paradoxical subregs.

This patch fix PR target/91635, fixing wrong code gen for RISC-V. From 52e32e2f82b4fe09c253e230c4fe321a0341aae7 Mon Sep 17 00:00:00 2001 From: kito Date: Thu, 19 Sep 2019 06:38:23 + Subject: [PATCH] RISC-V: Fix bad insn splits with paradoxical subregs. Shifting by more than the size of a SUBR

[PATCH] Remove operand swapping from reduction vectorization (SLP)

Here's the SLP part. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied. Richard. 2019-09-19 Richard Biener * tree-parloops.c (parloops_is_slp_reduction): Do not set LOOP_VINFO_OPERANDS_SWAPPED. (parloops_is_simple_reduction): Likewise. * tree-vect

Re: [PATCH][ARM] Enable code hoisting with -Os (PR80155)

On Wed, 18 Sep 2019 at 22:17, Prathamesh Kulkarni wrote: > > On Wed, 18 Sep 2019 at 01:46, Richard Biener > wrote: > > > > On Tue, Sep 17, 2019 at 7:18 PM Wilco Dijkstra > > wrote: > > > > > > Hi Richard, > > > > > > > The issue with the bugzilla is that it lacked appropriate testcase(s) > >

[PATCH] RISC-V: Fix more splitters accidentally calling gen_reg_rtx.

Similar to a previous patch, adding a in_splitter arg to every function that can be called from a define_split, so we can prevent calls to gen_reg_rtx during combine, which can cause crashes. Tested with riscv32-elf and riscv64-linux builds and checks with no regressions. Commmitted. Jim

RE: [C++ PATCH 2/4] Fix conversions for built-in operator overloading candidates.

Hi Jason, This commit caused boot-strap failure on aarch64. Is it a bug? Can this be fixed ASAP? ../../gcc/gcc/expmed.c:5602:19: error: ���int_mode��� may be used uninitialized in this function [-Werror=maybe-uninitialized] 5602 | scalar_int_mode int_mode; | ^~~~

[PATCH] V4, patch #8: Enable -mpcrel on Linux 64-bit, but not on other targets

This is the last patch in the compiler series for now. On Linux 64-bit systems it will enable -mpcrel (and -mprefixed-addr) by default. On other systems, it will not enable these switches until the tm.h for the OS enables it. I have the 3 patches for the test suite that will be following this if

[PATCH] V4, patch #7: Use PADDI to add 34-bit constants

This patch now allows GCC to generate PADDI to add 34-bit constants. I have done a bootstrap build with all of the patches applied, and there were no regressions in the test suite. After posting these patches, I will start a job to build each set of patches in turn just to make sure there are no

[PATCH] V4, patch #6: Use PLI (PADDI) to load up 32-bit SImode constants

This patch is similar to the previous patch, except it loads up 32-bit SImode constants instead of DImode constants. I have done a bootstrap build with all of the patches applied, and there were no regressions in the test suite. After posting these patches, I will start a job to build each set of

[PATCH] V4, patch #5: Use PLI (PADDI) to load up 34-bit DImode

This is a simple patch to enable loading up 34-bit DImode integer constants via the PLI (PADDI) instruction. At your suggestion, I moved it from the previous patch. Due to the ordering of the alternatives, it does force all of the alternatives to move down by one. I have done a bootstrap build w

[PATCH], V4, patch #4: Enable prefixed/pc-rel addressing

This patch is the patch that goes through and enables prefixed and pc-relative addressing on all modes, except for SDmode. SDmode is special in that for its main use, you need to only use X-form addressing. While you can do D-form addressing to load/store SDmode in GPR registers, I found you real

libgo patch committed: Fixes for arm64 GoLLVM build

This libgo patch by Xiangdong JI is for the GoLLVM build on arm64 GNU/Linux. It incorporates a type definition of 'uint128' to 'runtime' and 'syscall' packages. This fixes https://golang.org/issue/33711. Bootstrapped and ran Go testsuite on x86_64-pc-linux-gnu. Committed to mainline. Ian Index

[PATCH], V4, patch #3: Fix up mov_64bit_dm

In doing the patches, I noticed that mov_64bit_dm had two alternatives combined together. This patch fixes the problem, before the next patch that will need to modify mov_64bit_dm for prefixed addressing. I have done a bootstrap build with all of the patches applied, and there were no regressions

[PATCH], V4, patch #2: Add prefixed insn attribute

This patch adds the "prefixed" insn attribute that says whether or not the insn generates a prefixed instruction or not. The attributes "prefixed_length" and "non_prefixed_length" give then length in bytes (12 and 4 by default) of the insn if it is prefixed or not. The "length" attribute is set b

[PATCH] V4, patch #1: Rework prefixed/pc-relative lookup

This patch reworks the prefixed and pc-relative memory matching functions. As I said in the intro message, I do not re-use the address mask bits in reg_addr, but instead, I have a separate function that takes an address and decodes it into the various different flavors (single register address, D-

PowerPC future machine patches, version 4

This is a reworking of the patches that I posted as V3 at the end of August. Unlike the last set of patches, I do not use the address mask bits in reg_addr, but instead, I have a separate function that takes an address and decodes it into the various different flavors (single register address, D-f

Re: [PATCH] RISC-V: Fix bad insn splits with paradoxical subregs.

On Wed, Sep 18, 2019 at 3:27 AM Kito Cheng wrote: > On Wed, Sep 18, 2019 at 6:25 PM Richard Biener wrote: > > Since it is target specific and for non-primary/secondary targets > > it's the RISC-V maintainers call whether to allow backporting this. > > Generally wrong-code issues can be backported

Re: [PATCH][ARM] Add logical DImode expanders

Hi Kyrill, > We should be able to "compress" the above 3 patterns into one using code > iterators. Good point, that makes sense. I've committed this: ChangeLog: 2019-09-18 Wilco Dijkstra PR target/91738 * config/arm/arm.md (di3): Expand explicitly. (one_cmpldi2): Lik

Re: [PATCH] i386: Restore Skylake SImode hard register store cost

On Wed, Sep 18, 2019 at 8:06 PM H.J. Lu wrote: > > On Skylake, we should move integer register to SSE register without > going through memory. This patch restores Skylake SImode hard register > store cost to 6. > > gcc/ > > PR target/90878 > * config/i386/x86-tune-costs.h (skylake_cost): Restore

Re: [PATCH] i386: Increase Skylake SImode pseudo register store cost

On Wed, Sep 18, 2019 at 8:04 PM H.J. Lu wrote: > > On Skylake, SImode store cost isn't less than half cost of 128-bit vector > store. This patch increases Skylake SImode pseudo register store cost to > make it the same as QImode and HImode. > > gcc/ > > PR target/91446 > * config/i386/x86-tune-co

Merge from GCC trunk to gccgo branch

I merged trunk revision 275890 to the gccgo branch. Ian

Re: [PATCH][ARM] Cleanup multiply patterns

Hi Kyrill, >>  + (mult:SI (match_operand:SI 3 "s_register_operand" "r") >>  +  (match_operand:SI 2 "s_register_operand" "r"] > > Looks like we'll want to mark operand 2 here with '%' as well? That doesn't make any difference since both operands are identical. It only h

Re: [patch, testsuite, arm] Fix ICE in gcc.dg/gimplefe-28.c

On Sep 13, 2019, at 12:06 PM, Sandra Loosemore wrote: > > For the default multilib on arm-none-eabi, gcc.dg/gimplefe-28 has been > getting an ICE because, while the target-supports infrastructure is probing > to see if it can add the command-line options to enable the sqrt insn > ("-mfpu=vfp -

[PATCH] Remove vectorizer reduction operand swapping

It shouldn't be neccessary. Bootstrapped and tested on x86_64-unknown-linux-gnu, applied to trunk. (SLP part testing separately) Richard. 2019-09-18 Richard Biener * tree-vect-loop.c (vect_is_simple_reduction): Remove operand swapping. (vectorize_fold_left_reduction

[PATCH] i386: Restore Skylake SImode hard register store cost

On Skylake, we should move integer register to SSE register without going through memory. This patch restores Skylake SImode hard register store cost to 6. gcc/ PR target/90878 * config/i386/x86-tune-costs.h (skylake_cost): Restore SImode hard register store cost to 6. gcc/testsuite/ PR target

[PATCH] i386: Increase Skylake SImode pseudo register store cost

On Skylake, SImode store cost isn't less than half cost of 128-bit vector store. This patch increases Skylake SImode pseudo register store cost to make it the same as QImode and HImode. gcc/ PR target/91446 * config/i386/x86-tune-costs.h (skylake_cost): Increase SImode pseudo register store cost

Re: [PATCH][ARM] Enable code hoisting with -Os (PR80155)

On Wed, 18 Sep 2019 at 01:46, Richard Biener wrote: > > On Tue, Sep 17, 2019 at 7:18 PM Wilco Dijkstra wrote: > > > > Hi Richard, > > > > > The issue with the bugzilla is that it lacked appropriate testcase(s) and > > > thus > > > it is now a mess. There are clear testcases (maybe not in the be

Re: [PATCH][ARM] Remove support for MULS

Hi Wilco, On 9/9/19 6:07 PM, Wilco Dijkstra wrote: ping Remove various MULS/MLAS patterns which are enabled when optimizing for  size.  However the codesize gain from these patterns is so minimal that  there is no point in keeping them. I disagree. If they still trigger and generate better co

Re: [PATCH][ARM] Cleanup highpart multiply patterns

Hi Wilco, On 9/9/19 6:07 PM, Wilco Dijkstra wrote: ping Cleanup the various highpart multiply patterns using iterators.  As a result the signed and unsigned variants and the pre-Armv6  multiply operand constraints are all handled in a single pattern  and simple expander.  Bootstrap OK on armh

Re: [PATCH][ARM] Cleanup 64-bit multiplies

Hi Wilco, On 9/9/19 6:08 PM, Wilco Dijkstra wrote: ping Cleanup 64-bit multiplies.  Combine the expanders using iterators.  Merge the signed/unsigned multiplies as well as the pre-Armv6 and Armv6  variants.  Split DImode operands early into parallel sets inside the  MULL/MLAL instructions - th

Re: [PATCH][ARM] Cleanup multiply patterns

Hi Wilco, On 9/9/19 6:07 PM, Wilco Dijkstra wrote: ping Cleanup the 32-bit multiply patterns.  Merge the pre-Armv6 with the Armv6  patterns, remove useless alternatives and order the accumulator operands  to prefer MLA Ra, Rb, Rc, Ra whenever feasible.  Bootstrap OK on armhf, regress passes.

Re: [PATCH][ARM] Add logical DImode expanders

Hi Wilco, On 9/9/19 6:06 PM, Wilco Dijkstra wrote: ping We currently use default mid-end expanders for logical DImode operations.  These split operations without first splitting off complex immediates or  memory operands.  The resulting expansions are non-optimal and allow for  fewer LDRD/STRD

[Patch, GCC]Backporting r269039 to gcc8

Hi, I am trying to backport r269039 to gcc8 wich solved this bug report: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86487 . I have tested it on arm-none-linux-gnueabi,aarch64-none-linux-gnu and x86_64-pc-linux-gnu and there was no regression. The patch applied cleanly. I don't have commit ri

[PATCH] Tweak clang-format configuration.

Hi. I'm going to install a patch to clang-format that tweaks configuration. I'm planning to use it on daily basis and I'm planning to send an analysis later on. Martin contrib/ChangeLog: 2019-09-18 Martin Liska * clang-format: Tweak configuration based on new options offered

Re: [PATCH, AArch64 v4 0/6] LSE atomics out-of-line

Hi Richard, On 9/18/19 2:58 AM, Richard Henderson wrote: Version 3 was back in November: https://gcc.gnu.org/ml/gcc-patches/2018-11/msg00062.html Changes since v3: * Do not swap_commutative_operands_p in aarch64_gen_compare_reg. This is the probable cause of the bootstrap problem that K

Re: [PATCH, AArch64 v4 4/6] aarch64: Add out-of-line functions for LSE atomics

On 9/18/19 2:58 AM, Richard Henderson wrote: This is the libgcc part of the interface -- providing the functions. Rationale is provided at the top of libgcc/config/aarch64/lse.S. * config/aarch64/lse-init.c: New file. * config/aarch64/lse.S: New file. * config/aarch64/t-l

Re: [PATCH, AArch64 v4 5/6] aarch64: Implement -moutline-atomics

On 9/18/19 2:58 AM, Richard Henderson wrote: * config/aarch64/aarch64.opt (-moutline-atomics): New. * config/aarch64/aarch64.c (aarch64_atomic_ool_func): New. (aarch64_ool_cas_names, aarch64_ool_swp_names): New. (aarch64_ool_ldadd_names, aarch64_ool_ldset_names):

[PATCH] Remove dead code

This removes dead code from the vectorizer and makes a function static. Bootstrapped / tested on x86_64-unknown-linux-gnu, applied. Richard. 2019-09-18 Richard Biener * tree-vectorizer.h (get_initial_def_for_reduction): Remove. * tree-vect-loop.c (get_initial_def_for_reduct

[PATCH V4] Generalized predicate/condition for parameter reference in IPA (PR ipa/91088)

>> + if (unmodified_parm_or_parm_agg_item (fbi, stmt, expr, index_p, &size, >> + aggpos)) >> + { >> + tree type = TREE_TYPE (expr); >> + >> + /* Stop if found bit-field whose size does not equal any natural >> + integral type.

[Patch,committed][OG9] Fix dg-warning line numbers in libgomp

This fixes the line numbers of dg-warnings (cf. 2019-07-31 commit fcea4b6e384e30231ab6d88b1f9feb1007b3e96b). Committed to the openacc-gcc-9-branch. Tobias commit 0f2a4240229e97fdbcd3c8299642ed4b85f5b347 Author: Tobias Burnus Date: Wed Sep 18 13:45:34 2019 +0200 libgomp - fix dg-warning

[PATCH] Disentangle autopar and vect reduction detection

I'm planning on major refactoring work on the vectorizer reduction handling and as usual parloops use of the machinery stands in the way. The following deals with this pre refactoring by simply duplicating all the code into tree-parloops.c. I guess a lot of the code could be stripped or simplif

Fix conversions for built-in operator overloading candidates.

Hi, Jason, With this patch, gcc-aarch64 build will encounter an error as the following. Not sure it is a bug, would you please check this? ../../gcc/expmed.c:5602:19: error: ‘int_mode’ may be used uninitialized in this function [-Werror=maybe-uninitialized] 5602 | scalar_int_mode int_mode

Re: [PATCH 1/2][vect]PR 88915: Vectorize epilogues when versioning loops

Hi Richard, As I mentioned in the IRC channel, this is my current work in progress patch. It currently ICE's when vectorizing gcc/testsuite/gcc.c-torture/execute/nestfunc-2.c with '-O3' and '--param vect-epilogues-nomask=1'. It ICE's because the epilogue loop (after if conversion) and main l

Re: [PATCH] RISC-V: Fix bad insn splits with paradoxical subregs.

Hi Richard: Got it, thanks :) On Wed, Sep 18, 2019 at 6:25 PM Richard Biener wrote: > > On Wed, 18 Sep 2019, Kito Cheng wrote: > > > Hi Jakub, Richard: > > > > This commit is fixing wrong code gen for RISC-V, does it OK to > > backport to GCC 9 branch? > > Since it is target specific and for non

Re: [PATCH] RISC-V: Fix bad insn splits with paradoxical subregs.

On Wed, 18 Sep 2019, Kito Cheng wrote: > Hi Jakub, Richard: > > This commit is fixing wrong code gen for RISC-V, does it OK to > backport to GCC 9 branch? Since it is target specific and for non-primary/secondary targets it's the RISC-V maintainers call whether to allow backporting this. General

Re: [PATCH] RISC-V: Fix bad insn splits with paradoxical subregs.

Hi Jakub, Richard: This commit is fixing wrong code gen for RISC-V, does it OK to backport to GCC 9 branch? On Fri, Sep 6, 2019 at 4:34 AM Jim Wilson wrote: > > Shifting by more than the size of a SUBREG_REG doesn't work, so we either > need to disable splits if an input is paradoxical, or else

Re: [PATCH] Prevent LTO section collision for a symbol name starting with '*'.

On 9/11/19 1:38 PM, Martin Liška wrote: > The inline_clone manipulation happens in cgraph_node::find_replacement where > we manipulate the clone_of. I fixed that but there's a similar situation which goes other way around: cgraph_node * cgraph_node::get_create (tree decl) { cgraph_node *first_c

Re: Make assemble_real generate canonical CONST_INTs

On Wed, Sep 18, 2019 at 11:41 AM Richard Sandiford wrote: > > Richard Biener writes: > > On Tue, Sep 17, 2019 at 4:33 PM Richard Sandiford > > wrote: > >> > >> assemble_real used GEN_INT to create integers directly from the > >> longs returned by real_to_target. assemble_integer then went on >

Re: [PATCH] RISC-V: Allow more load/stores to be compressed

Hi Craig: Some general review comment: - Split new pass into new file. - Add new option to enable/disable this pass. - Could you extend this patch to support lw/sw/ld/sd/flw/fsw/fld/fsd? I think there is lots of common logic for supporting other types compressed load/store instruction, but I'd

Re: Make assemble_real generate canonical CONST_INTs

Richard Biener writes: > On Tue, Sep 17, 2019 at 4:33 PM Richard Sandiford > wrote: >> >> assemble_real used GEN_INT to create integers directly from the >> longs returned by real_to_target. assemble_integer then went on >> to interpret the const_ints as though they had the mode corresponding >>

Re: Add ARRAY_REF based access patch disambiguation

On Thu, 15 Aug 2019, Jan Hubicka wrote: > Hi, > here is updated version. > > > + /* We generally assume that both access paths starts by same sequence > > > + of refs. However if number of array refs is not in sync, try > > > + to recover and pop elts until number match. This helps t

Re: [PATCH] Come up with debug counter for store-merging.

On Wed, Sep 18, 2019 at 9:22 AM Martin Liška wrote: > > Hi. > > After I spent quite some time with PR91758, I would like > to see a debug counter in store merging for the next time. > > Ready to be installed? OK. Richard. > Thanks, > Martin > > gcc/ChangeLog: > > 2019-09-18 Martin Liska > >

Re: Make get_value_for_expr check for INTEGER_CSTs

On Wed, Sep 18, 2019 at 8:54 AM Richard Sandiford wrote: > > CONSTANT lattice values are symbolic constants rather than > compile-time constants, so among other things can be POLY_INT_CSTs. > This patch fixes a case in which we assumed all CONSTANTs were either > ADDR_EXPRs or INTEGER_CSTs. > > Th

Re: Don't treat variable-length vectors as VLAs during gimplification

On Wed, Sep 18, 2019 at 8:53 AM Richard Sandiford wrote: > > Source-level SVE vectors should be gimplified in the same way > as normal fixed-length vectors rather than as VLAs. > > This is tested by later SVE patches. > > Tested on aarch64-linux-gnu with SVE (with and without follow-on > patches)

Re: Two more POLY_INT cases for dwarf2out.c

On Wed, Sep 18, 2019 at 8:49 AM Richard Sandiford wrote: > > loc_list_for_tree_1 and add_const_value_attribute currently ICE > on POLY_INTs. loc_list_for_tree_1 can do something sensible but > add_const_value_attribute has to punt, since the constant there > needs to be a link-time rather than lo

Re: Handle variable-length vectors in compute_record_mode

On Wed, Sep 18, 2019 at 8:52 AM Richard Sandiford wrote: > > This patch makes compute_record_mode handle SVE vectors in the > same way as it would handle fixed-length vectors. There should > be no change in behaviour for other targets. > > This is needed for the SVE equivalent of arm_neon.h types

[Ada] Code cleanup of alignment representation clauses in dispatch tables

This patch does not modify the functionality of the compiler; it avoids generating non-required alignment representation clauses for dispatch tables. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-18 Javier Miranda gcc/ada/ * exp_disp.adb (Make_DT, Make_Secondary_DT): Remo

Re: [PATCH][ARM] Enable code hoisting with -Os (PR80155)

On Tue, Sep 17, 2019 at 7:18 PM Wilco Dijkstra wrote: > > Hi Richard, > > > The issue with the bugzilla is that it lacked appropriate testcase(s) and > > thus > > it is now a mess. There are clear testcases (maybe not in the benchmarks > > you > > Agreed - it's not clear whether any of the prop

Re: Make assemble_real generate canonical CONST_INTs

On Tue, Sep 17, 2019 at 4:33 PM Richard Sandiford wrote: > > assemble_real used GEN_INT to create integers directly from the > longs returned by real_to_target. assemble_integer then went on > to interpret the const_ints as though they had the mode corresponding > to the accompanying size paramet

[Ada] Raise exception on call to Expect for a dead process

Call to Expect for a dead process results in SIGBUS signal on Linux systems. Process_Died exception is raised in this case now. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-18 Vadim Godunko gcc/ada/ * libgnat/g-expect.adb (Expect_Internal): Don't include invalid

[Ada] Spurious ineffective use_clause warning

This patch fixes an issue whereby expansion of post conditions may lead to spurious ineffective use_clause warnings when a use type clause is present in a package specification and a use package clause exists in the package body on the package containing said type. Tested on x86_64-pc-linux-gnu, c

[Ada] Avoid gnatbind regression caused by Copy_Bitfield

The recent Copy_Bitfield change caused gnatbind to change elaboration order, causing different error messages. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-18 Bob Duff gcc/ada/ * exp_ch5.adb (Expand_Assign_Array_Loop_Or_Bitfield): Move call to RTE_Available later

[Ada] Skip entity name qualification in GNATprove mode

GNATprove was using the qualification of names for entities with local homonyms in the same scope, requiring the use of a suffix to differentiate them. This caused problems for correctly identifying primitive equality operators. This case is now handled like the rest of entities in GNATprove, by in

[Ada] Use static discriminant value for discriminated task record

This patch allows the construction of a static subtype for the generated constrained Secondary_Stack component of a task for which a stack size is specified, when compiling for a restricted run-time that forbids dynamic allocation. Needed for LLVM. Tested on x86_64-pc-linux-gnu, committed on trunk

[Ada] Crash on aggregate with dscriminant in if-expression as default

This patch fixes a crash on a an aggregate for a discriminated type, when a component of the aggregate is also a discriminated type constrained by a discriminant of the enclosing object, and the default value for the component is a conditional expression that includes references to that outer discr

[Ada] Fix sharing of expression in array aggregate with others choice

This change fixes a long-standing issue in the compiler that is generally silent but may lead to wrong code generation in specific circumstances. When an others choice in an array aggregate spans multiple ranges, the compiler may generate multiple (groups of) assignments for the ranges. The probl

[Ada] Implement AI12-0086's rules for discriminants in aggregates

In Ada2012, a discriminant value that governs an active variant part in an aggregate had to be static. AI12-0086 relaxes this restriction - if the subtype of the discriminant value is a static subtype all of whose values select the same variant, then that is good enough. Tested on x86_64-pc-linux-

[Ada] Fix portability issues in access to subprograms

This patch improves the portability of the code generated by the compiler for access to subprograms. Written by Richard Kenner. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-18 Javier Miranda gcc/ada/ * exp_ch4.adb (Expand_N_Op_Eq): The frontend assumes that we can

[Ada] Fix spurious alignment warning on simple address clause

This eliminates a spurious alignment warning given by the compiler on an address clause when the No_Exception_Propagation restriction is in effect and the -gnatw.x switch is used. In this configuration the address clauses whose expression is itself of the form X'Address would not be sufficiently an

[Ada] Refine type of Get_Homonym_Number result

Routine Get_Homonym_Number always returns a positive number. This is explained in its comment and is evident from its body. No test attached, because semantics is unaffected. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-18 Piotr Trojanek gcc/ada/ * exp_dbug.ads, exp_dbug

[Ada] Improve efficiency of copying bit-packed slices

This patch substantially improves the efficiency of copying large slices of bit-packed arrays, by copying 32 bits at a time instead of 1 at a time. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-18 Bob Duff gcc/ada/ * exp_ch5.adb (Expand_Assign_Array_Loop_Or_Bitfield): The

[Ada] Crash on universal case expression in fixed-point division

This patch fixes a compiler abort on a case expression whose alternatives are universal_real constants, when the case expression is an operand in a multiplication or division whose other operand is of a fixed-point type. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-18 Ed Schonberg

[Ada] No Storage_Error for an oversized disabled ghost array object

In some cases where the size computation for an object declaration will unconditionally overflow, the FE generates code to raise Storage_Error at the point of the object declaration (and may generate an associated warning). Don't do this if the object declaration is an ignored (i.e., disabled) ghos

[Ada] Ensure that Scan_Real result does not depend on trailing zeros

Previous change in that procedure to handle overflow issues during scanning removed the special handling for trailing zeros in the decimal part. Beside the absence of overflow during scanning the special handling of these zeros is still necessary. Tested on x86_64-pc-linux-gnu, committed on trunk

[Ada] Spurious run time error on anonymous access formals

This patch fixes an issue whereby subprograms with anonymous access formals may trigger spurious runtime accessibility errors when such formals are used as actuals in calls to nested subprograms. Running these commands: gnatmake -q pass.adb gnatmake -q fail.adb gnatmake -q test_main.adb g

[Ada] Factor out code for deciding statically known Constrained attributes

Create a separate routine in Exp_Util for deciding the value of the Constrained attribute when it is statically known. This routine is used in Exp_Attr and will be reused in the backend of GNATprove. There is no impact on compilation and hence no test. Tested on x86_64-pc-linux-gnu, committed on

[Ada] Missing accessibility check on discrim assignment

This patch fixes an issue whereby assignments from anonymous access descriminants which are part of stand alone objects of anonymous access did not have runtime checks generated based on the accessibility level of the object according to ARM 3.10.2 (12.5/3). Tested on x86_64-pc-linux-gnu, committe

[Ada] Don't fail a front-end assertion if errors have already been detected

In sem_eval.adb, we have an assertion that the type of a "null" literal is an access type. It turns out that this assertion can fail when processing an illegal program, e.g. one that contains something like "Integer'(null)". This leads to differences in the compiler's generated output for such tes

[Ada] Fix style issues in functional maps

Rename global constants from I to J. No functional changes. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-18 Claire Dross gcc/ada/ * libgnat/a-cofuma.adb (Remove, Elements_Equal_Except, Keys_Included, Keys_Included_Except): Rename loop indexes and global c

[Ada] Avoid uninitialized variable in bounded containers

In function Copy in Ada.Containers.Bounded_Ordered_Sets and other bounded containers packages, remove a possible use of an uninitialized variable. This was not a bug, because the uninitialized variable could be used only if checks are suppressed, and the checks would have failed, leading to erroneo

[Ada] Fix errno for rename for the VxWorks 6 target

This fixes the wrong errno for rename when the file is not existing on a dosFs. In the end it makes Ada.Directories.Rename raising the right exception in the case we are trying to move a file in a non existing directory. Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-18 Frederic Konra

[Ada] Fix 32/64bit mistake on SYSTEM_INFO component in s-win32

The dwActiveProcessorMask field in a SYSTEM_INFO structure on Windows should be DWORD_PTR, an integer the size of a pointer. In s-win32, it is currently declared as DWORD. This happens to work on 32bit hosts and is wrong on 64bit hosts, causing mishaps in accesses to this component and all the fol

[Ada] Fix typo in error message

An error message mentions "gnamake", where it meant to mention "gnatmake". Tested on x86_64-pc-linux-gnu, committed on trunk 2019-09-18 Tom Tromey gcc/ada/ * make.adb (Initialize): Fix typo.--- gcc/ada/make.adb +++ gcc/ada/make.adb @@ -3789,7 +3789,7 @@ package body Make is

[patch, committed] Use PRId64 in libgomp/config/linux

Use PRId64 if available, otherwise use a cast. For some reasons, it failed during bootstrap with a -Werror even though %ld should be okay with int64_t on x86_64-gnu-linux. Nonetheless, using PRId64 is better. Committed after testing on x86_64-gnu-linux. Tobias commit 8a8ebae1a419e1d3642d22874

[patch,committed][OG9] Fix compiler warnings

Committed the following patch to silence compiler warnings – some pointed to issues, which are now fixed. Tobias commit 500483e6ced44e2e0fea6a37e4f8c267ebaf826a Author: Tobias Burnus Date: Wed Sep 18 08:44:20 2019 +0200 Silence compiler warnings gcc/ 2019-09-17 Tobias Burn

Re: [PATCH] Come up with json::integer_number and use it in GCOV.

PING^4 Just note that the author of the JSON implementation in GCC is fine with the patch ;) Martin On 9/9/19 2:38 PM, Martin Liška wrote: > PING^3 > > On 8/30/19 10:55 AM, Martin Liška wrote: >> PING^2 >> >> On 8/26/19 2:34 PM, Martin Liška wrote: >>> PING^1 >>> >>> On 8/13/19 1:51 PM, Martin

Re: [PATCH 5/9] Come up with an abstraction.

Hello. Ok, so the current IPA ICF transformation is being blocked by the patch 2/9 (about FIELD_DECL). I asked Honza for a help here. In the meantime, can you Richi make an opinion about the part 5 which is about the interaction in between old operand_equal_p and a new hook in IPA ICF? Thanks, Ma

Re: [x86] Tweak testcases for PR82361

Uros Bizjak writes: > On Tue, Sep 17, 2019 at 6:34 PM Richard Sandiford > wrote: >> >> gcc/testsuite/gcc.target/i386/pr82361-[12].c check whether we >> can optimise away a 32-to-64-bit zero extension of a 32-bit >> division or modulus result. Currently this fails for the modulus >> part of f1 an

Re: Patch RFA: Emit .cfi_sections after some input code has been seen

On Tue, 17 Sep 2019, Ian Lance Taylor wrote: > This seemingly innocuous change > > 2019-09-11 Richard Biener > > * lto-opts.c (lto_write_options): Stream -g when debug is enabled. > * lto-wrapper.c (merge_and_complain): Pick up -g. > (append_compiler_options): Likewise. > (run_gcc): Re-instan

[PATCH] Come up with debug counter for store-merging.

Hi. After I spent quite some time with PR91758, I would like to see a debug counter in store merging for the next time. Ready to be installed? Thanks, Martin gcc/ChangeLog: 2019-09-18 Martin Liska * dbgcnt.def (store_merging): New counter. * gimple-ssa-store-merging.c (imm_