Bernd Schmidt writes:
> On 04/15/2016 02:52 PM, Senthil Kumar Selvaraj wrote:
>>
>> For both testcases in the PR, reload fails to take into account that
>> FP-SP elimination can no longer be performed, and tries to find reload
>> regs for an rtx generated when FP-SP elimination was valid.
>>
>> 1
On 08/04/16 09:30, Claudiu Zissulescu wrote:
This patch adds support for the new SIMD operations added to ARC HS
cpu class. The proposed patch doesn't chase for performance but offers
support for those newly added operations, and autovectorization.
The patch is tested using dg.exp, compile.exp
Hi,
According to Richard's suggestion in
https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01240.html
I try to remove the SMS dependency on doloop pass.
SMS would need to adjust kernel loop iteration count
during the transformation.
To adjust loop iteration count, SMS would need to find
count_reg w
In the `Extern "C"` commentary, the coding conventions said:
Definitions within the body of a namespace are not indented.
Now it reads:
Definitions within the body of an extern "C" block
are not indented.
Initially reported at:
https://gcc.gnu.org/ml/gcc/2016-04/msg00211.html
Cheers,
On 04/22/2016 06:11 AM, Trevor Saunders wrote:
On Thu, Apr 21, 2016 at 11:12:48PM -0600, Jeff Law wrote:
On 04/20/2016 12:22 AM, tbsaunde+...@tbsaunde.org wrote:
From: Trevor Saunders
gcc/ChangeLog:
2016-04-19 Trevor Saunders
* var-tracking.c (struct adjust_mem_data): Make side_e
On 04/27/2016 02:20 AM, Dominik Vogt wrote:
The attached patch is a result of discussing an S/390 issue with
"and with complement" in some cases.
https://gcc.gnu.org/ml/gcc/2016-03/msg00163.html
https://gcc.gnu.org/ml/gcc-patches/2016-04/msg01586.html
Combine would merge a ZERO_EXTEND and a
On 04/05/2016 03:43 AM, Dominik Vogt wrote:
On Mon, Jan 04, 2016 at 12:33:21PM +0100, Dominik Vogt wrote:
On Fri, Jan 01, 2016 at 05:53:08PM -0700, Martin Sebor wrote:
On 12/31/2015 04:50 AM, Dominik Vogt wrote:
The attached patch fixes C++-11 handling of "alignas(0)" which
should be ignored b
This patch replaces all of the bool argument to c_finish_omp_clauses and
finish_omp_clauses in the c and c++ front ends, respectively. Right now
there are three bool arguments, one for is_omp/allow_fields,
declare_simd and is_cilk, the latter two have default values set.
OpenACC will require some s
Hi,
The removal of SH5 support from GCC has been announced here
https://gcc.gnu.org/ml/gcc/2015-08/msg00101.html
The attached patch removes support for SH5 in the compiler back end.
There are still some leftovers and new simplification opportunities.
These will be addressed in later follow up
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On Wed, Apr 27, 2016 at 8:05 PM, Uros Bizjak wrote:
> Hello!
>
> Based on recent discussion, the attached patch fixes ix86_spill_class
> condition. The spills to SSE registers are now enabled for real on
> SSE2 target, where inter-unit moves to/from vector registers are
> enabled.
>
> Since this i
On Wed, 27 Apr 2016, Richard Biener wrote:
Please use types_match_p () instead
Ah, thanks, I couldn't remember the name and spent a bit of time looking
for it with a name like same_type, equal_types, etc, and eventually
assumed the patch adding it had never been committed when I saw we
stil
On 03/10/2016 04:38 PM, Patrick Palka wrote:
I ran the command
git grep -l "dg-do compile" | xargs grep -l __builtin_abort | xargs grep -lw
main
to find tests marked as compile-time tests that likely ought to instead
be marked as run-time tests, by the rationale that they use
__builtin_abort
Hi!
While AVX512F doesn't contain EVEX encoded vround{ss,sd,ps,pd} instructions,
it contains vrndscale* which performs the same thing if bits [4:7] of the
immediate are zero.
For _mm*_round_{ps,pd} we actually already emit vrndscale* for -mavx512f
instead of vround* unconditionally (because
_rnds
On 03/11/2016 09:38 AM, Patrick Palka wrote:
On Thu, Mar 10, 2016 at 6:38 PM, Patrick Palka wrote:
I ran the command
git grep -l "dg-do compile" | xargs grep -l __builtin_abort | xargs grep -lw
main
to find tests marked as compile-time tests that likely ought to instead
be marked as run-ti
gcc/
* config/aarch64/aarch64-protos.h
(tune_params): Add new member "approx_div_modes".
(aarch64_emit_approx_div): Declare new function.
* config/aarch64/aarch64.c
(generic_tunings): New member "approx_div_modes".
(cortexa35_tunings): Likewise.
gcc/
* config/aarch64/aarch64-protos.h
(aarch64_emit_approx_rsqrt): Replace with new function
"aarch64_emit_approx_sqrt".
(tune_params): New member "approx_sqrt_modes".
* config/aarch64/aarch64.c
(generic_tunings): New member "approx_rsqrt_modes".
gcc/
* config/aarch64/aarch64-protos.h
(AARCH64_APPROX_MODE): New macro.
(AARCH64_APPROX_{NONE,SP,DP,DFORM,QFORM,SCALAR,VECTOR,ALL}):
Likewise.
(tune_params): New member "approx_rsqrt_modes".
* config/aarch64/aarch64-tuning-flags.def
(AARCH64_E
Hi,
AARCH64 ILP32 is like x32 where UNITS_PER_WORD > sizeof(void*) so we
need to define REG_VALUE_IN_UNWIND_CONTEXT for ILP32. This fixes
unwinding through the signal handler. This is independent of the ABI
which Linux kernel uses to store the registers.
OK? Bootstrapped and tested on aarch64
This patch suite increases the granularity of target selections of
approximate FP operations and adds the options of emitting approximate
square root and division.
The full suite is contained in the emails tagged:
1.
[PATCH 1/3][AArch64] Add more choices for the reciprocal square root
app
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On 04/27/2016 03:02 PM, Bernd Schmidt wrote:
On 04/27/2016 10:59 PM, Jeff Law wrote:
PR rtl-optimization/44281
* hard-reg-set.h (struct target_hard_regs): New field
x_fixed_nonglobal_reg_set.
(fixed_nonglobal_reg_set): New macro.
* reginfo.c (init_reg_sets_1): Initialize it.
On 03/01/2016 07:10 AM, Marek Polacek wrote:
This PR from 2011 reports that -Waddress prints unhelpful warning when the
comparison comes from a macro. Since I've added from_macro_expansion_at,
this is easy to circumvent. I'm not so sure we actually want to disable
the warning in the case of a m
On 04/27/2016 10:59 PM, Jeff Law wrote:
PR rtl-optimization/44281
* hard-reg-set.h (struct target_hard_regs): New field
x_fixed_nonglobal_reg_set.
(fixed_nonglobal_reg_set): New macro.
* reginfo.c (init_reg_sets_1): Initialize it.
* ira.c (setup_alloc_regs): Use fixed_nong
On 02/19/2016 03:03 PM, Bernd Schmidt wrote:
In this PR, we generate unnecessarily bad code for code that declares a
global register var. Since global regs get added to fixed_regs, IRA
never considers them as candidates. However, we do seem to have proper
data flow information for them. In the te
Apologies for the top post. Pinging on this again. It still applies
cleanly, so no need to resubmit, I think. Is there anything else missing
or required before this can go in?
Thanks,
-Aaron
Aaron Conole writes:
> The previous gcov behavior was to always output errors on the stderr channel.
> T
On 02/09/2016 12:55 AM, Bernhard Reutner-Fischer wrote:
On February 8, 2016 9:18:03 AM GMT+01:00, Jeff Law wrote:
This turns out to be far easier than expected. Given a conditional
like
x == y, we already record the canonicalized x = y equivalence. If we
just record y = x then this "just wor
On 01/20/2016 10:57 AM, Ryan Burn wrote:
This patch follows on from
https://gcc.gnu.org/ml/gcc-patches/2015-12/msg02142.html
As discussed, it creates a separate function
cilk_cp_detect_spawn_and_unwrap in gcc/cp to handle processing
cilk_spawn expressions for c++ and adds support for implicit
co
On Wed, Apr 27, 2016 at 12:58 PM, Uros Bizjak wrote:
> Hello!
>
> This RFC patch illustrates the idea of using STV pass to load/store
> any TImode constant using SSE insns. The testcase:
>
> --cut here--
> __int128 x;
>
> __int128 test_1 (void)
> {
> x = (__int128) 0x00112233;
> }
>
> __int128 t
Hello!
This RFC patch illustrates the idea of using STV pass to load/store
any TImode constant using SSE insns. The testcase:
--cut here--
__int128 x;
__int128 test_1 (void)
{
x = (__int128) 0x00112233;
}
__int128 test_2 (void)
{
x = ((__int128) 0x0011223344556677 << 64);
}
__int128 test_3
On 04/26/16 08:25, Wilco Dijkstra wrote:
Evandro Menezes wrote:
On 03/10/16 10:37, James Greenhalgh wrote:
Thanks for sticking with it. This is OK for GCC 7 when development
opens.
Remember to mention the most recent changes in your Changelog entry
(Remove "fp" attribute from *movhf_aarch64 an
> On Apr 26, 2016, at 5:56 PM, Trevor Saunders wrote:
> So pre ISO C++ gave the second decl the same scope as the first one?
> that's... exciting ;)
So, all the code in the world that is meant to be ported up the an ANSI
standard for C++ has already been so ported, we could remove all notion th
Hi,
While looking into documenting the new built-ins, I realized that these
instructions provide correct support for the vec_xl and vec_xst
built-ins required by the vector API. I've therefore reworked the patch
to provide those as overloaded built-ins, rather than the separate
per-mode built-ins
This implements support in gigi for incomplete types in profiles introduced
in Ada 2012 and remove the various kludges present in the FE and gigi that
were added to make it work in the simple cases.
Tested on x86_64-suse-linux, applied on the mainline.
2016-04-27 Eric Botcazou
* sem_
Hello!
Based on recent discussion, the attached patch fixes ix86_spill_class
condition. The spills to SSE registers are now enabled for real on
SSE2 target, where inter-unit moves to/from vector registers are
enabled.
Since this is new functionality, the patch can cause some minor
runtime regress
> On Apr 27, 2016, at 2:22 AM, Rainer Orth
> wrote:
> Will commit to mainline in a day or two, giving interested parties an
> opportunity to comment.
:-) Always nice to see cleanups.
... to avoid build warnings.
2016-04-27 Uros Bizjak
* config/i386/i386.md
(lea arith with mem operand + setcc peephole2): Set operator mode.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Committed to mainline SVN.
Uros.
Index: config/i386/i386.md
=
On Wed, Apr 27, 2016 at 3:33 AM, Kyrill Tkachov
wrote:
> Thanks, I've incorporated your and James' feedback.
> Since James ok'd the content of the patch from an AArch64 perspective
> I'll commit this later today if I receive no further feedback.
There is no paragraph for the Qualcomm qdf24xx. Do
On 01/20/2016 10:57 AM, Ryan Burn wrote:
This patch follows on from
https://gcc.gnu.org/ml/gcc-patches/2015-12/msg02142.html
As discussed, it creates a separate function
cilk_cp_detect_spawn_and_unwrap in gcc/cp to handle processing
cilk_spawn expressions for c++ and adds support for implicit
co
This test took forever to compile with -fsanitize=null, because the
instrumentation was creating incredible amount of duplicated expressions, in a
quadratic fashion. I think the problem is that we instrument &TARGET_EXPR <>
expressions, which doesn't seem to be needed -- we only need to instrument
On 04/27/2016 07:06 PM, David Malcolm wrote:
Whilst debugging an issue in df, I noticed that there are
some #define constants that could be an enum (thus making them known
to gdb).
Convert them to a new enum, and update the "id" field of
struct df_problem.
Successfully bootstrapped & regrtested
On 04/27/2016 07:12 PM, David Malcolm wrote:
The function maybe_set_first_label_num acts on a CODE_LABEL; we can
capture that in the type system.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu; it's
only used from stmt.c (not in any of the config subdirs), so I didn't
attempt a ma
The function maybe_set_first_label_num acts on a CODE_LABEL; we can
capture that in the type system.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu; it's
only used from stmt.c (not in any of the config subdirs), so I didn't
attempt a many-config test.
OK for trunk?
gcc/ChangeLog:
James Greenhalgh wrote:
> So the part of this patch removing the fallthrough to general operand
> is not OK for trunk.
>
> The other parts look reasonable to me, please resubmit just those.
Right, I removed the removal of the fallthrough. Here is the revised version:
ChangeLog:
2016-04-27 Wilco
On 04/27/2016 07:08 PM, David Malcolm wrote:
The various struct df_problem instances are constant data; mark them
as such.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu
OK for trunk?
gcc/ChangeLog:
* df-core.c (df_add_problem): Make the problem param be const.
(
On 04/27/2016 07:03 PM, David Malcolm wrote:
Commit r210360 removed the first "i" field from the various instruction
nodes in rtx.def, moving it to an explicit "int insn_uid;" field
of the union "u2" within rtx_def.
Update the comment in rtl.def to reflect this change. Also, fix
a stray apost
The various struct df_problem instances are constant data; mark them
as such.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu
OK for trunk?
gcc/ChangeLog:
* df-core.c (df_add_problem): Make the problem param be const.
(df_remove_problem): Make local "problem" be con
Whilst debugging an issue in df, I noticed that there are
some #define constants that could be an enum (thus making them known
to gdb).
Convert them to a new enum, and update the "id" field of
struct df_problem.
Successfully bootstrapped & regrtested on x86_64-pc-linux-gnu
OK for trunk?
gcc/Cha
Commit r210360 removed the first "i" field from the various instruction
nodes in rtx.def, moving it to an explicit "int insn_uid;" field
of the union "u2" within rtx_def.
Update the comment in rtl.def to reflect this change. Also, fix
a stray apostrophe.
Successfully bootstrapped & regrtested on
On Wed, Apr 27, 2016 at 05:42:48PM +0200, Bernd Schmidt wrote:
> On 03/28/2016 06:44 AM, Andi Kleen wrote:
> >This patch adds a new gcc-auto-profile script that figures out the
> >correct event and runs perf. The script is installed with on Linux systems.
>
> That sounds useful, and I think we'll
On 04/15/2016 07:39 PM, Marcel Böhme wrote:
Sure. The updated patch, including Changelog and more test cases. Regression
tested.
This patch seems seriously damaged by sending it through the email body.
Please attach it (text/plain) instead.
Bernd
On Wed, Apr 27, 2016 at 05:36:09PM +0200, Bernd Schmidt wrote:
> On 03/28/2016 06:44 AM, Andi Kleen wrote:
> >From: Andi Kleen
> >
> >Add support for profiledbootstrap with autofdo. Will be useful
> >to get better testing coverage of autofdo.
>
> Is this the only purpose? I'll admit this is the p
On 27/04/16 16:22, Torsten Duwe wrote:
> Hi Maxim,
>
> thanks for starting the work on this; I have added the missing
> command line option. It builds now and the resulting compiler generates
> a linux kernel with the desired properties, so work can continue there.
>
> Torsten
i guess the
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Thanks again for the review Bernd,
On 16-04-27 01:33:47, Bernd Schmidt wrote:
> >+ epoch = strtoll (source_date_epoch, &endptr, 10);
> >+ if ((errno == ERANGE && (epoch == LLONG_MAX || epoch == LLONG_MIN))
> >+ || (errno != 0 && epoch == 0))
> >+fatal_error (UNKNOWN_LOCATION, "environme
Hi,
Currently tree if-conversion only supports PHIs with no more than two arguments
unless the loop is marked with "simd pragma". This patch makes such PHIs
supported unconditionally if they have no more than MAX_PHI_ARG_NUM arguments,
thus cases like PR56541 can be fixed. Note because a chain
On 04/27/16 09:10, Kyrill Tkachov wrote:
2016-04-27 Kyrylo Tkachov
* config/aarch64/aarch64.md (ashl3, SHORT modes):
Use const_int_operand for operand 2 predicate. Simplify expand code
as a result.
LGTM
--
Evandro Menezes
Am 27.04.2016 um 17:37 schrieb Rainer Orth:
> Bernd Edlinger writes:
>
>> On 26.04.2016 22:14, Joseph Myers wrote:
>>> On Tue, 26 Apr 2016, Bernd Edlinger wrote:
>>>
Hi,
as we all know, it's high time now to adjust the minimum supported
gmp/mpfr/mpc versions for gcc-7.
>>>
>>
On 04/27/16 09:23, James Greenhalgh wrote:
On Tue, Apr 12, 2016 at 01:14:51PM -0500, Evandro Menezes wrote:
On 04/05/16 17:30, Evandro Menezes wrote:
On 04/05/16 13:37, Wilco Dijkstra wrote:
I can't get any of these to work... Not only do I get a large
number of collisions and duplicated
code
On 04/27/16 09:15, James Greenhalgh wrote:
So this is off for all cores currently supported by GCC? I'm not sure
I understand why we should take this if it will immediately be dead code?
Excuse me? Not only are other target maintainers free to evaluate if
this code is useful to them, but so
On 03/28/2016 06:44 AM, Andi Kleen wrote:
This patch adds a new gcc-auto-profile script that figures out the
correct event and runs perf. The script is installed with on Linux systems.
That sounds useful, and I think we'll want to accept this.
So Linux just hardcodes installing the script, bu
On 04/27/2016 03:55 AM, Bernd Schmidt wrote:
On 04/26/2016 11:23 PM, Martin Sebor wrote:
The documentation for the new option implies that it should warn
for calls to memset where the third argument contains the number
of elements not multiplied by the element size. But in my (quick)
testing it
Bernd Edlinger writes:
> On 26.04.2016 22:14, Joseph Myers wrote:
>> On Tue, 26 Apr 2016, Bernd Edlinger wrote:
>>
>>> Hi,
>>>
>>> as we all know, it's high time now to adjust the minimum supported
>>> gmp/mpfr/mpc versions for gcc-7.
>>
>> I think updating the minimum versions (when using previo
On 03/28/2016 06:44 AM, Andi Kleen wrote:
From: Andi Kleen
Add support for profiledbootstrap with autofdo. Will be useful
to get better testing coverage of autofdo.
Is this the only purpose? I'll admit this is the patch I like least out
of the series.
The autofdo'ed compiler is ~7% faster
On 26.04.2016 22:14, Joseph Myers wrote:
> On Tue, 26 Apr 2016, Bernd Edlinger wrote:
>
>> Hi,
>>
>> as we all know, it's high time now to adjust the minimum supported
>> gmp/mpfr/mpc versions for gcc-7.
>
> I think updating the minimum versions (when using previously built
> libraries, not in-tree
On 04/27/2016 05:16 PM, H.J. Lu wrote:
This works for -m32, -mx32 and -m64. OK for trunk?
Yes, thanks.
Bernd
On 03/28/2016 06:44 AM, Andi Kleen wrote:
From: Andi Kleen
Extend the existing bprob and tree-prof tests to also run with autofdo.
The test runtimes are really a bit too short for autofdo, but it's
a reasonable sanity check.
This only works natively for now.
dejagnu doesn't seem to support a
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Hi Maxim,
thanks for starting the work on this; I have added the missing
command line option. It builds now and the resulting compiler generates
a linux kernel with the desired properties, so work can continue there.
Torsten
diff --git a/gcc/c-family/c-common.c b/gcc/c-family/c-common.c
James Greenhalgh wrote:
> So this is off for all cores currently supported by GCC?
>
> I'm not sure I understand why we should take this if it will immediately
> be dead code?
I presume it was meant to have the vector variants enabled with -mcpu=exynos-m1
as that is where you can get a good gain
On Wed, Apr 27, 2016 at 2:09 AM, Bernd Schmidt wrote:
> On 04/27/2016 02:10 AM, H.J. Lu wrote:
>>
>> On Tue, Apr 26, 2016 at 3:11 PM, Bernd Schmidt
>> wrote:
>>>
>>> On 04/26/2016 09:39 PM, H.J. Lu wrote:
make check-gcc RUNTESTFLAGS="--target_board='unix{-mx32}'
i386.exp=avx51
On Fri, Apr 22, 2016 at 02:24:49PM +, Wilco Dijkstra wrote:
> Some patterns are using '%w2' for immediate operands, which means that a zero
> immediate is actually emitted as 'wzr' or 'xzr'. This not only changes an
> immediate operand into a register operand but may emit illegal instructions
>
On 04/27/2016 01:31 PM, Richard Biener wrote:
Ok.
Thanks,
Richard.
Thank you for the very quick feedback! I just commited the change.
--
Pierre-Marie de Rodat
On 04/18/2016 03:43 PM, Joel Sherrill wrote:
Hi
For some unknown reason, moxie-rtems has its own stanza
in libgcc/config.host which does not include extra_parts.
This results in C++ RTEMS applications not linking.
Also the tmake_file variable is overridden by the
shared moxie stanza rather than
On Fri, Apr 22, 2016 at 8:20 AM, Richard Biener
wrote:
> On Thu, Apr 21, 2016 at 7:26 PM, Bin Cheng wrote:
>> Hi,
>> This patch refactors IVOPT in three major aspects:
>> Firstly it rewrites iv_use groups. Use group is originally introduced only
>> for address type uses, this patch makes it gen
On Fri, Apr 22, 2016 at 02:11:52PM +, Wilco Dijkstra wrote:
> This patch fixes the attributes of integer immediate shifts which were
> incorrectly modelled as register controlled shifts. Also change EXTR
> attribute to being a rotate.
>
> OK for trunk?
OK. Thanks for the fix.
Thanks,
James
On 04/21/2016 06:55 AM, Richard Biener wrote:
The following patch makes us not allocate decls but SSA names for
temporaries required during gimplification. This is basically the
same thing as we do when calling the gimplifier on GENERIC expressions
from optimization passes (when we are already
>
> Ping? Note that the patch has been on GCC 6 for more than 3 months now without
> any issue reported against it.
OK.
Ramana
>
> Best regards,
>
> Thomas
On Fri, Apr 22, 2016 at 01:22:51PM +, Wilco Dijkstra wrote:
> Improve modes_tieable by returning true in more cases: allow scalar access
> within vectors without requiring an extra move. Removing these moves helps
> the register allocator in deciding whether to use integer or FP registers on
>
On 04/27/2016 03:55 AM, Bernd Schmidt wrote:
On 04/26/2016 11:23 PM, Martin Sebor wrote:
The documentation for the new option implies that it should warn
for calls to memset where the third argument contains the number
of elements not multiplied by the element size. But in my (quick)
testing it
Andi Kleen writes:
Ping^3 for the patch series!
> Andi Kleen writes:
>
> Ping^2 for the patch series!
>
>> Andi Kleen writes:
>>
>> Ping for the patch series!
>>
>>> From: Andi Kleen
>>>
>>> Using autofdo is currently something difficult. It requires using the
>>> model specific branches take
On Tue, Apr 12, 2016 at 01:14:51PM -0500, Evandro Menezes wrote:
> On 04/05/16 17:30, Evandro Menezes wrote:
> >On 04/05/16 13:37, Wilco Dijkstra wrote:
> >>I can't get any of these to work... Not only do I get a large
> >>number of collisions and duplicated
> >>code between these patches, when I t
Ping?
Best regards,
Thomas
On Thursday 17 December 2015 17:32:48 Thomas Preud'homme wrote:
> Hi,
>
> We decided to apply the following patch to the ARM embedded 5 branch.
>
> Best regards,
>
> Thomas
>
> > -Original Message-
> > From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches
> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index b7086dd..21af809 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -414,7 +414,8 @@ static const struct tune_params generic_tunings =
>0, /* max_case_values. */
>0, /* cac
Hi all,
Another costs issue that came out of the investigation for PR 65932 is that
sign-extending loads get a higher cost than they should in the arm backend.
The problem is that when handling a sign-extend of a MEM we add the cost
of the load_sign_extend cost field and then recursively add the
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On 26.04.2016 21:28, Marc Glisse wrote:
> On Tue, 26 Apr 2016, Bernd Edlinger wrote:
>
>> For instance PR libstdc++/69881: gmp.h did this:
>>
>> #define __need_size_t /* tell gcc stddef.h we only want size_t */
>> #include /* for size_t */
>>
>> I've persuaded Jonathan to work around that in
Hi all,
The CC_ZESWP and CC_SESWP are not used anywhere and seem to be a remmant of some
old code that was removed. The various compare+extend patterns in aarch64.md
don't
use these modes. So it should be safe to remove them to avoid future confusion.
Bootstrapped and tested on aarch64.
Ok for
Hi all,
The ashl3 expander for QI and HI modes is needlessly obfuscated.
The 2nd operand predicate accepts nonmemory_operand but the expand code
FAILs if it's not a CONST_INT. We can just demand a const_int_operand in
the predicate and remove the extra CONST_INT check.
Looking at git blame, it s
Hi all,
WORD_REGISTER_OPERATIONS is currently cryptically commented out in aarch64.h.
In reality, we cannot define it to 1 for aarch64 because operations narrower
than word_mode (DImode for aarch64)
don't behave like word_mode if they use the W-form of the registers. They'll be
performed in SIm
On Tue, Apr 26, 2016 at 02:22:58PM +0100, Ramana Radhakrishnan wrote:
> As $SUBJECT. The reason this caught my eye on aarch64 is because
> the return value register (x0) is not identical to the register in which
> the hidden parameter for AArch64 is set (x8). Thus setting this to true
> seems to be
On Tue, Apr 26, 2016 at 2:29 PM, Ilya Enkovich wrote:
> 2016-04-22 10:13 GMT+03:00 Richard Biener :
>> On Thu, Apr 21, 2016 at 6:09 PM, Ilya Enkovich
>> wrote:
>>> Hi,
>>>
>>> Currently when loop is vectorized we adjust its nb_iterations_upper_bound
>>> by dividing it by VF. This is incorrect s
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