> The attached patch moves the code from integrate.c to (what I hope you
> agree to be) better places:
>
> * inliner code goes to tree-inline.c
> * functions only called from dwarf2out.c are moved there.
> * allocate_initial_values is moved to ira.c
> * the initial-value stuff is moved to function.
> My main concern is that the precise collector we have in place now
> requires substantial care to use. It is supported by a tool that
> does not really understand C, let alone C++. We avoid the problems
> when annotations are unnecessary. We can do that in one of two
> ways, either by upgradin
From: Xinyu Qi
gcc/
* config/arm/arm.c (enum arm_builtins): Revise built-in fcode.
(IWMMXT2_BUILTIN): New define.
(IWMMXT2_BUILTIN2): Likewise.
(iwmmx2_mbuiltin): Likewise.
(builtin_description bdesc_2arg): Revise built in declaration.
(buil
From: Xinyu Qi
gcc/
* config/arm/mmintrin.h: Use __IWMMXT__ to enable iWMMXt intrinsics.
Use __IWMMXT2__ to enable iWMMXt2 intrinsics.
Use C name-mangling for intrinsics.
(__v8qi): Redefine.
(_mm_cvtsi32_si64, _mm_andnot_si64, _mm_sad_pu8): Revise.
From: Xinyu Qi
gcc/
* config/arm/arm.c (FL_IWMMXT2): New define.
(arm_arch_iwmmxt2): New variable.
(arm_option_override): Enable use of iWMMXt with VFP.
Disable use of iWMMXt with NEON. Disable use of iWMMXt under
Thumb mode. Set arm_arch_iwmmxt2.
From: Xinyu Qi
gcc/
* config/arm/t-arm (MD_INCLUDES): Add marvell-f-iwmmxt.md.
* config/arm/marvell-f-iwmmxt.md: New file.
* config/arm/arm.md (marvell-f-iwmmxt.md): Include.
---
gcc/config/arm/arm.md |1 +
gcc/config/arm/marvell-f-iwmmxt.md | 17
This series was written by Marvell and sent by Xinyu Qi
a number of times in the last year.
We (One Laptop per Child) need these patches for reasonable iWMMXt support
and performance. Without them, logical and shift intrinsics cause ICEs,
see PR 35294 and its duplicates 36798 and 36966.
The sof
Oleg Endo wrote:
> The attached patch addresses PR 51340.
> Tested with
>
> make info dvi pdf
>
> and
>
> make check-gcc RUNTESTFLAGS="sh.exp=pr51340* --target_board=sh-sim
> \{-m4a-single/-ml,-m2/-ml,-m2a/-mb,-m2e/-ml,-m4a/-ml,-m4a-single/-ml,-m4a-single-only/-ml,-m4a-nofpu/-ml}"
>
> OK?
OK
Oleg Endo wrote:
> The attached patch is the same as the last proposed patch in the PR.
> Re-tested it on sh-sim against rev 187914 with -msoft-atomic and
> -mhard-atomic enabled, as well with 'make info dvi pdf'.
>
> I was hoping that after recent reload patches the R0 spill failure
> problem
>
Implemented because the overhead of calling abort spills over
into the frame of the almost-never-calling function.
Tested cris-elf, committed.
gcc:
* config/cris/cris.h (TARGET_HAS_BREAK, TARGET_TRAP_USING_BREAK8):
New macros.
* config/cris/cris.md ("trap"): Define, enabl
Hello,
The attached patch addresses PR 51340.
Tested with
make info dvi pdf
and
make check-gcc RUNTESTFLAGS="sh.exp=pr51340* --target_board=sh-sim
\{-m4a-single/-ml,-m2/-ml,-m2a/-mb,-m2e/-ml,-m4a/-ml,-m4a-single/-ml,-m4a-single-only/-ml,-m4a-nofpu/-ml}"
OK?
Cheers,
Oleg
ChangeLog:
On Wed, Apr 4, 2012 at 2:34 PM, Matt Turner wrote:
> 2012-04-04 Matt Turner
>
> gcc/
> * doc/extend.texi (__builtin_arm_tinsrb): Add missing second
> parameter.
> (__builtin_arm_tinsrh): Likewise.
> (__builtin_arm_tinsrw): Likewise.
> ---
> This patch and 2/2
On Fri, Feb 24, 2012 at 10:53 PM, Matt Turner wrote:
> PR 36798 and 36966 are duplicates.
>
> 2012-02-24 Matt Turner
>
> PR target/35294
> * config/arm/arm.c (arm_expand_builtin): Wire up missing
> intrinsics.
> ---
> gcc/config/arm/arm.c | 62
>
On Tue, Feb 28, 2012 at 7:13 PM, Ramana Radhakrishnan
wrote:
> On Fri, Feb 24, 2012 at 10:53:35PM -0500, Matt Turner wrote:
>> The x86/amd64 mmintrin.h provides the _mm_empty intrinsic for the 'emms'
>> MMX instruction. Although ARM does not need such an instruction, we
>> should provide an empty
On Fri, Feb 24, 2012 at 10:53 PM, Matt Turner wrote:
> See section 2.5.3 (page 28) of
> http://download.majix.org/dec/comp_guide_v2.pdf
>
> 2012-02-24 Matt Turner
>
> * config/alpha/ev6.md: (define_bypass "ev6_fmul,ev6_fadd"): New.
> (define_bypass "ev6_fcmov"): New.
> ---
> gcc/
On Sat, Feb 25, 2012 at 3:11 AM, Richard Sandiford
wrote:
> Matt Turner writes:
>> The r4600_imul and r4600_idiv reservations were correct for si, but
>> there were no *_di reservations.
>>
>> See page 4 of
>> http://www.sgistuff.net/hardware/other/documents/R4600_Prod_OV.pdf
>>
>> 2012-02-24 Ma
On Thu, Apr 5, 2012 at 4:53 AM, Ramana Radhakrishnan
wrote:
> On 4 April 2012 19:35, Matt Turner wrote:
>> gcc/testsuite/gcc.target/arm/mmx-2.c | 158
>> ++
>> 1 files changed, 158 insertions(+), 0 deletions(-)
>> create mode 100644 gcc/testsuite/gcc.target/arm
Hello!
> Ping?
Please at least add and URL to the patch, it took me some time to
found the latest version [1], I'm not even sure if it is the latest
version...
I assume that you cleared all issues with middle-end and scheduler
maintainers, it is not clear from the message.
+ (1) IMUL instrcti
Hello,
The old RTL inliner, integrate.c, now only contains a few functions
for initial-value pairs, and a few functions related to inlining.
The attached patch moves the code from integrate.c to (what I hope you
agree to be) better places:
* inliner code goes to tree-inline.c
* functions only ca
On 5/28/12, Jakub Jelinek wrote:
> On Fri, May 25, 2012 at 05:43:20PM -0500, Gabriel Dos Reis wrote:
> > On May 25, 2012 Lawrence Crowl wrote:
> > > Personally, I would rather see if we can take advantage of C++
> > > features to reduce garbage and then use the Boehm collector.
> > > There is too
On 5/28/12, Jakub Jelinek wrote:
> On Fri, May 25, 2012 at 02:42:39PM -0700, Lawrence Crowl wrote:
> > On 5/24/12, Jakub Jelinek wrote:
> > > On Thu, May 24, 2012 at 09:43:42AM -0700, Lawrence Crowl wrote:
> > > > Add a type-safe hash table, typed_htab. Uses of this table
> > > > replace uses of
Ping?
On Sun, May 6, 2012 at 11:27 AM, Igor Zamyatin wrote:
> Ping. Could x86 maintainer(s) look at these changes?
>
> Thanks,
> Igor
>
> On Fri, Apr 20, 2012 at 4:04 PM, Igor Zamyatin wrote:
>> On Tue, Apr 17, 2012 at 12:27 AM, Igor Zamyatin wrote:
>>> On Fri, Apr 13, 2012 at 4:20 PM, Andrey B
Ping?
On Sat, May 12, 2012 at 1:26 AM, Igor Zamyatin wrote:
> Ping?
>
> On Fri, Apr 27, 2012 at 4:42 PM, Igor Zamyatin wrote:
>> On Wed, Apr 25, 2012 at 6:41 PM, Richard Guenther
>> wrote:
>>> On Wed, Apr 25, 2012 at 4:32 PM, Igor Zamyatin wrote:
On Wed, Apr 25, 2012 at 1:14 PM, Richard G
Tejas Belagod writes:
> Hi Richard,
>
> Thanks for your comments. Some questions inline below.
>
> Richard Sandiford wrote:
>> Marcus Shawcroft writes:
>>> This patch adds an implementation of integer iterators.
>>
>> Nice. A few comments from an onlooker (on top of what Stephen said).
>>
>>>
On 28 May 2012 18:40, Simon Baldwin wrote:
>
> Port r184840 from gcc-4_6.
>
> Forward-port r184840, contrib/testsuite-management/validate_failures.py fix
> for cross-compilers, from gcc-4_6 to gcc-4_7.
>
> Okay for google/integration and google/gcc-4_7-integration branches?
That should have read
Port r184840 from gcc-4_6.
Forward-port r184840, contrib/testsuite-management/validate_failures.py fix
for cross-compilers, from gcc-4_6 to gcc-4_7.
Okay for google/integration and google/gcc-4_7-integration branches?
2012-05-28 Simon Baldwin
Port r184840 from gcc-4_6.
2012
OK.
Jason
On Mon, 28 May 2012, Christian Bruel wrote:
>
>
> On 05/28/2012 01:11 PM, Joseph S. Myers wrote:
> > On Mon, 28 May 2012, Christian Bruel wrote:
> >
> >> I shared the same concern, however, after playing bits with spec toys, I
> >> couldn't a find a way to get a %< switch recognition failure, s
On 05/24/2012 03:18 PM, Dodji Seketeli wrote:
Like the below?
Yep, thanks. The patch is OK.
Jason
Hello,
The attached patch is the same as the last proposed patch in the PR.
Re-tested it on sh-sim against rev 187914 with -msoft-atomic and
-mhard-atomic enabled, as well with 'make info dvi pdf'.
I was hoping that after recent reload patches the R0 spill failure
problem
(see http://gcc.gnu.org/
Committed as obvious.
gcc:
* doc/md.texi (Standard Names): Fix typos in documentation of atomic
patterns.
Index: doc/md.texi
===
--- doc/md.texi (revision 187934)
+++ doc/md.texi (working copy)
@@ -5885,7 +5885,7 @@ from a c
On Mon, May 28, 2012 at 3:37 PM, Marc Glisse wrote:
>
> Ping? The rest of the patch has been approved already.
>
>
> On Thu, 10 May 2012, Marc Glisse wrote:
>
>> Hello,
>>
>> could an i386 maintainer take a look at the following testcase?
>>
>> gcc/testsuite/ChangeLog
>> 2012-05-08 Marc Glisse
This patch fixes the regression reported in PR53463 for arm-none-eabi as
well.
Thanks,
Greta
> -Original Message-
> From: Dodji Seketeli [mailto:do...@redhat.com]
> Sent: 21 May 2012 14:55
> To: GCC Patches
> Cc: Jason Merrill; Tom Tromey; Paolo Carlini
> Subject: [PATCH 2/2] Better syst
I have regstapped r187893 with the following patch
[karma] gcc/darwin_buildw% diff -up ../_gcc_clean/libcpp/lex.c
../work/libcpp/lex.c
--- ../_gcc_clean/libcpp/lex.c 2012-05-25 08:54:05.0 +0200
+++ ../work/libcpp/lex.c2012-05-27 13:25:08.0 +0200
@@ -592,7 +592,8 @@ search
Hi!
As we have no short testcase for PR53438, I've committed
the following testcase as obvious to trunk and 4.7.
2012-05-28 Jakub Jelinek
PR tree-optimization/53505
* c-c++-common/torture/pr53505.c: New test.
--- gcc/testsuite/c-c++-common/torture/pr53505.c.jj 2012-05-28
On 05/25/2012 01:10 PM, Paweł Sikora wrote:
On Friday 25 of May 2012 11:50:13 Gabriel Dos Reis wrote:
On Fri, May 25, 2012 at 11:44 AM, Paweł Sikora wrote:
so, why you just don't use the hash table implementation from libstdc++?
we have agreed on C++03 as a bootstrap compiler.
There is unfor
Ping? The rest of the patch has been approved already.
On Thu, 10 May 2012, Marc Glisse wrote:
Hello,
could an i386 maintainer take a look at the following testcase?
gcc/testsuite/ChangeLog
2012-05-08 Marc Glisse
* gcc.target/i386/shuf-concat.c: New test.
--- gcc.target/i386/s
On 28/05/12 12:27, Joseph S. Myers wrote:
On Mon, 28 May 2012, Matthew Gretton-Dann wrote:
This patch adds a variety of predefined macros to reveal the presence of
various features of the ARM architecture. These are detailed in the ARM
C Language Extensions specification, available here:
http:
Hi Richard,
Thanks for your comments. Some questions inline below.
Richard Sandiford wrote:
Marcus Shawcroft writes:
This patch adds an implementation of integer iterators.
Nice. A few comments from an onlooker (on top of what Stephen said).
+/* Since GCC does not construct a table of v
On 05/28/2012 01:32 PM, Gabriel Dos Reis wrote:
On Mon, May 28, 2012 at 6:13 AM, Paolo Carlini wrote:
Hi,
apparently we have serious troubles with and -std=c++11 and
-fno-trapping-math because LTGT_EXPR is unhandled in
potential_constant_expression_1. Thus, unless we have sound reasons to *no
On Fri, May 25, 2012 at 05:43:20PM -0500, Gabriel Dos Reis wrote:
> On Fri, May 25, 2012 at 4:52 PM, Lawrence Crowl wrote:
>
> > Personally, I would rather see if we can take advantage of C++
> > features to reduce garbage and then use the Boehm collector.
> > There is too much manual management
On Fri, May 25, 2012 at 02:42:39PM -0700, Lawrence Crowl wrote:
> On 5/24/12, Jakub Jelinek wrote:
> > On Thu, May 24, 2012 at 09:43:42AM -0700, Lawrence Crowl wrote:
> > > Add a type-safe hash table, typed_htab. Uses of this table
> > > replace uses of libiberty's htab_t. The benefits include l
On 05/28/2012 01:11 PM, Joseph S. Myers wrote:
> On Mon, 28 May 2012, Christian Bruel wrote:
>
>> I shared the same concern, however, after playing bits with spec toys, I
>> couldn't a find a way to get a %< switch recognition failure, since the
>> switches passed on the command line at this poi
On Mon, May 28, 2012 at 6:13 AM, Paolo Carlini wrote:
> Hi,
>
> apparently we have serious troubles with and -std=c++11 and
> -fno-trapping-math because LTGT_EXPR is unhandled in
> potential_constant_expression_1. Thus, unless we have sound reasons to *not*
> handle it together with all the other
On Mon, 28 May 2012, Matthew Gretton-Dann wrote:
> This patch adds a variety of predefined macros to reveal the presence of
> various features of the ARM architecture. These are detailed in the ARM
> C Language Extensions specification, available here:
> http://infocenter.arm.com/help/topic/com.a
Hi,
apparently we have serious troubles with and -std=c++11 and
-fno-trapping-math because LTGT_EXPR is unhandled in
potential_constant_expression_1. Thus, unless we have sound reasons to
*not* handle it together with all the other *_EXPR, I think the below
could safely go in mainline and 4_
On Mon, 28 May 2012, Christian Bruel wrote:
> I shared the same concern, however, after playing bits with spec toys, I
> couldn't a find a way to get a %< switch recognition failure, since the
> switches passed on the command line at this point are already validated
> if necessary.
Suppose with t
Hi
This is the second part of the patches that deals with 64bit and. It directly
extends the patterns anddi3, anddi3_insn and anddi3_neon to handle 64bit
constant operands.
Tested on arm qemu without regression.
OK for trunk?
thanks
Carrot
2012-05-28 Wei Guozhi
PR target/53447
All,
This patch adds a variety of predefined macros to reveal the presence of
various features of the ARM architecture. These are detailed in the ARM
C Language Extensions specification, available here:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0053-/index.html
This patch then adds co
diff -upr .pc/symdb_enhance_plugin/gcc/c-family/c-common.h
gcc/c-family/c-common.h
--- .pc/symdb_enhance_plugin/gcc/c-family/c-common.h2011-12-21
04:44:13.0 +0800
+++ gcc/c-family/c-common.h2012-05-25 14:56:56.776263281 +0800
@@ -25,6 +25,7 @@ along with GCC; see the file COPYING3.
Hello
On 05/22/2012 03:52 PM, Joseph S. Myers wrote:
> On Mon, 21 May 2012, Christian Bruel wrote:
>
>> 1) Lazily check the flag validation until all command line spec files
>> are read. For this purpose, 'read_specs' records specs, to be analyzed
>> with 'file_spec_p'. Such flags have 'live_cond
51 matches
Mail list logo
