[gcc r15-5116] Match: Optimize log (x) CMP CST and exp (x) CMP CST operations

https://gcc.gnu.org/g:e232dc3bb5c3e8f8a3749239135b7b859a204fc7 commit r15-5116-ge232dc3bb5c3e8f8a3749239135b7b859a204fc7 Author: Soumya AR Date: Tue Nov 12 09:26:24 2024 +0530 Match: Optimize log (x) CMP CST and exp (x) CMP CST operations This patch implements transformations for

[gcc r15-5188] aarch64: Optimise calls to ldexp with SVE FSCALE instruction [PR111733]

https://gcc.gnu.org/g:9b2915d95d855333d4d8f66b71a75f653ee0d076 commit r15-5188-g9b2915d95d855333d4d8f66b71a75f653ee0d076 Author: Soumya AR Date: Wed Nov 13 10:20:14 2024 +0530 aarch64: Optimise calls to ldexp with SVE FSCALE instruction [PR111733] This patch uses the FSCALE instru

[gcc r15-5201] Match: Fold pow calls to ldexp when possible [PR57492]

https://gcc.gnu.org/g:5a674367c6da870184f3bdb7ec110b96aa91bb2b commit r15-5201-g5a674367c6da870184f3bdb7ec110b96aa91bb2b Author: Soumya AR Date: Wed Nov 13 15:41:15 2024 +0530 Match: Fold pow calls to ldexp when possible [PR57492] This patch transforms the following POW calls to e

[gcc r15-4771] [MAINTAINERS] Add myself to write after approval and DCO.

https://gcc.gnu.org/g:91577f0c8d955bc670ee76d1a8851df336bf240c commit r15-4771-g91577f0c8d955bc670ee76d1a8851df336bf240c Author: Soumya AR Date: Wed Oct 30 14:27:46 2024 +0530 [MAINTAINERS] Add myself to write after approval and DCO. ChangeLog: * MAINTAINERS: Add

[gcc r15-5438] [PATCH] testsuite: Require C99 for pow-to-ldexp.c

https://gcc.gnu.org/g:90645dba41bac29cab4c5996ba320c97a0325eb2 commit r15-5438-g90645dba41bac29cab4c5996ba320c97a0325eb2 Author: Soumya AR Date: Tue Nov 19 14:23:47 2024 +0530 [PATCH] testsuite: Require C99 for pow-to-ldexp.c pow-to-ldexp.c checks for calls to __builtin_ldexpf and

[gcc r15-6098] aarch64: Extend SVE2 bit-select instructions for Neon modes.

https://gcc.gnu.org/g:65b7c8db9c61bcdfd07a3404047dd2d2beac4bbb commit r15-6098-g65b7c8db9c61bcdfd07a3404047dd2d2beac4bbb Author: Soumya AR Date: Wed Dec 11 09:32:35 2024 +0530 aarch64: Extend SVE2 bit-select instructions for Neon modes. NBSL, BSL1N, and BSL2N are bit-select intruc

[gcc r15-6099] aarch64: Use SVE ASRD instruction with Neon modes.

https://gcc.gnu.org/g:e5569a20cf3791553ac324269001a7c7c0e56242 commit r15-6099-ge5569a20cf3791553ac324269001a7c7c0e56242 Author: Soumya AR Date: Wed Dec 11 09:45:09 2024 +0530 aarch64: Use SVE ASRD instruction with Neon modes. The ASRD instruction on SVE performs an arithmetic shi

[gcc r15-7222] match.pd: Fix indefinite recursion during exp-log transformations [PR118490]

https://gcc.gnu.org/g:d8a7f07f7cf008e359dad631aaae1028776b9e18 commit r15-7222-gd8a7f07f7cf008e359dad631aaae1028776b9e18 Author: Soumya AR Date: Mon Jan 27 11:12:33 2025 +0530 match.pd: Fix indefinite recursion during exp-log transformations [PR118490] This patch fixes the ICE cau

[gcc r15-7603] aarch64: Use generic_armv8_a_prefetch_tune in generic_armv8_a.h

https://gcc.gnu.org/g:8606ab346ba4b6b852d42f335b84322fd85a0831 commit r15-7603-g8606ab346ba4b6b852d42f335b84322fd85a0831 Author: Soumya AR Date: Tue Feb 18 14:10:08 2025 +0530 aarch64: Use generic_armv8_a_prefetch_tune in generic_armv8_a.h generic_armv8_a.h defines generic_armv8_a