[gcc(refs/vendors/ibm/heads/mmaplus)] MMA+: Fix up MMA+ constraint and predicate usage

https://gcc.gnu.org/g:a456fc556e2b9a8653ec04bba0e230b076d376ae commit a456fc556e2b9a8653ec04bba0e230b076d376ae Author: Peter Bergner Date: Fri Apr 25 14:31:20 2025 -0500 MMA+: Fix up MMA+ constraint and predicate usage Replace all mma.md "d" constraints with the new "wD" constrain

[gcc(refs/vendors/ibm/heads/mmaplus)] rs6000: Disassemble opaque modes using subregs to allow optimizations [PR109116]

https://gcc.gnu.org/g:a7e4699f286e48b9de7b8c81542b0e6897df7c0a commit a7e4699f286e48b9de7b8c81542b0e6897df7c0a Author: Peter Bergner Date: Fri Jan 17 16:14:48 2025 -0500 rs6000: Disassemble opaque modes using subregs to allow optimizations [PR109116] PR109116 exposes an issue whe

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-PowerPC: Add support for 1, 024 bit DMR registers.

https://gcc.gnu.org/g:453484d9b339d29b44323734f838bb8b301b085f commit 453484d9b339d29b44323734f838bb8b301b085f Author: Michael Meissner Date: Tue Oct 22 16:58:33 2024 -0400 RFC2653-PowerPC: Add support for 1,024 bit DMR registers. This patch is a prelimianry patch to add the full

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2677-Add xvrlw support.

https://gcc.gnu.org/g:904961a355ecae12ce801a7475b439d5e8ef1479 commit 904961a355ecae12ce801a7475b439d5e8ef1479 Author: Michael Meissner Date: Tue Oct 22 17:02:33 2024 -0400 RFC2677-Add xvrlw support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/alt

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2686-Add paddis support.

https://gcc.gnu.org/g:83a5d8b95e312f0c19998719dbe048d67fce3415 commit 83a5d8b95e312f0c19998719dbe048d67fce3415 Author: Michael Meissner Date: Tue Oct 22 17:01:20 2024 -0400 RFC2686-Add paddis support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/co

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2655-Add saturating subtract built-ins.

https://gcc.gnu.org/g:56e6cba06a8f626faff300ffef89017977c27928 commit 56e6cba06a8f626faff300ffef89017977c27928 Author: Michael Meissner Date: Tue Oct 22 17:00:35 2024 -0400 RFC2655-Add saturating subtract built-ins. This patch adds support for a saturating subtract built-in functi

[gcc(refs/vendors/ibm/heads/mmaplus)] Use vector pair load/store for memcpy with -mcpu=future

https://gcc.gnu.org/g:805a9d9c81d277706cc3a5e3270767d5f101aae6 commit 805a9d9c81d277706cc3a5e3270767d5f101aae6 Author: Michael Meissner Date: Tue Oct 22 16:54:35 2024 -0400 Use vector pair load/store for memcpy with -mcpu=future In the development for the power10 processor, GCC di

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2656-Support load/store vector with right length.

https://gcc.gnu.org/g:8a4e2eb426c73182fc91e5faef8f4d0f0a3f6122 commit 8a4e2eb426c73182fc91e5faef8f4d0f0a3f6122 Author: Michael Meissner Date: Tue Oct 22 16:59:43 2024 -0400 RFC2656-Support load/store vector with right length. This patch adds support for new instructions that may b

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-PowerPC: Switch to dense math names for all MMA operations.

https://gcc.gnu.org/g:253c0abd46d96818f051ca6e7ae81983094abe6a commit 253c0abd46d96818f051ca6e7ae81983094abe6a Author: Michael Meissner Date: Tue Oct 22 16:57:05 2024 -0400 RFC2653-PowerPC: Switch to dense math names for all MMA operations. This patch changes the assembler instruc

[gcc(refs/vendors/ibm/heads/mmaplus)] Add rs6000 architecture masks.

https://gcc.gnu.org/g:930ca76e5ab0497a82dbc1ffdb53a370c444b9a0 commit 930ca76e5ab0497a82dbc1ffdb53a370c444b9a0 Author: Michael Meissner Date: Tue Oct 22 16:40:13 2024 -0400 Add rs6000 architecture masks. This patch begins the journey to move architecture bits that are not user IS

[gcc(refs/vendors/ibm/heads/mmaplus)] Use architecture flags for defining _ARCH_PWR macros.

https://gcc.gnu.org/g:f09b1dd1d965ad3ab5886789f953baf4c8247a08 commit f09b1dd1d965ad3ab5886789f953baf4c8247a08 Author: Michael Meissner Date: Tue Oct 22 16:41:09 2024 -0400 Use architecture flags for defining _ARCH_PWR macros. For the newer architectures, this patch changes GCC to

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_FPRND to TARGET_POWER5X

https://gcc.gnu.org/g:f9667b2f18d9babc111b30b22fde2241125bcaf7 commit f9667b2f18d9babc111b30b22fde2241125bcaf7 Author: Michael Meissner Date: Tue Oct 22 16:48:59 2024 -0400 Change TARGET_FPRND to TARGET_POWER5X As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Do not allow -mvsx to boost processor to power7.

https://gcc.gnu.org/g:b4bc2c4ae3e92cff696ca01979ccefb30d7f6694 commit b4bc2c4ae3e92cff696ca01979ccefb30d7f6694 Author: Michael Meissner Date: Tue Oct 22 16:42:11 2024 -0400 Do not allow -mvsx to boost processor to power7. This patch restructures the code so that -mvsx for example

[gcc(refs/vendors/ibm/heads/mmaplus)] Add ChangeLog.dmf and update REVISION.

https://gcc.gnu.org/g:4b6030cb0dccf0d2e079895fdd7d4068910adabd commit 4b6030cb0dccf0d2e079895fdd7d4068910adabd Author: Michael Meissner Date: Tue Oct 22 16:38:02 2024 -0400 Add ChangeLog.dmf and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_POPCNTB to TARGET_POWER5

https://gcc.gnu.org/g:baaf1472a8684897432a613dc530577e33efdf14 commit baaf1472a8684897432a613dc530577e33efdf14 Author: Michael Meissner Date: Tue Oct 22 16:48:20 2024 -0400 Change TARGET_POPCNTB to TARGET_POWER5 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add support for dense math registers.

https://gcc.gnu.org/g:07bd318f83e5b93fb487bd9e097124646eede5d1 commit 07bd318f83e5b93fb487bd9e097124646eede5d1 Author: Michael Meissner Date: Tue Oct 22 16:56:10 2024 -0400 RFC2653-Add support for dense math registers. The MMA subsystem added the notion of accumulator registers as

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add dense math test for new instruction names.

https://gcc.gnu.org/g:fa38ab238e9f5bb8a3ca3a13ac160734857440b1 commit fa38ab238e9f5bb8a3ca3a13ac160734857440b1 Author: Michael Meissner Date: Tue Oct 22 16:57:52 2024 -0400 RFC2653-Add dense math test for new instruction names. 2024-10-22 Michael Meissner gcc/testsuit

[gcc(refs/vendors/ibm/heads/mmaplus)] Add support for -mcpu=future

https://gcc.gnu.org/g:1fda538674d13775e58b900efe20d78d1b36e57a commit 1fda538674d13775e58b900efe20d78d1b36e57a Author: Michael Meissner Date: Tue Oct 22 16:53:04 2024 -0400 Add support for -mcpu=future This patch adds the support that can be used in developing GCC support for

[gcc(refs/vendors/ibm/heads/mmaplus)] Update tests to work with architecture flags changes.

https://gcc.gnu.org/g:133e2820bf27118f45a412e7588a44da767a2d02 commit 133e2820bf27118f45a412e7588a44da767a2d02 Author: Michael Meissner Date: Tue Oct 22 16:52:24 2024 -0400 Update tests to work with architecture flags changes. Two tests used -mvsx to raise the processor level to a

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add wD constraint.

https://gcc.gnu.org/g:fdca7a07c697a45f4bf1d3969cd9902fe502b199 commit fdca7a07c697a45f4bf1d3969cd9902fe502b199 Author: Michael Meissner Date: Tue Oct 22 16:55:18 2024 -0400 RFC2653-Add wD constraint. This patch adds a new constraint ('wD') that matches the accumulator registers

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_POPCNTD to TARGET_POWER7

https://gcc.gnu.org/g:27c3e09525ae509dce78fcff423019a310116ad7 commit 27c3e09525ae509dce78fcff423019a310116ad7 Author: Michael Meissner Date: Tue Oct 22 16:50:48 2024 -0400 Change TARGET_POPCNTD to TARGET_POWER7 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_CMPB to TARGET_POWER6

https://gcc.gnu.org/g:a63f9e5522286c58ef1c502908892aa496e49cf7 commit a63f9e5522286c58ef1c502908892aa496e49cf7 Author: Michael Meissner Date: Tue Oct 22 16:49:52 2024 -0400 Change TARGET_CMPB to TARGET_POWER6 As part of the architecture flags patches, this patch changes the use of

[gcc(refs/vendors/ibm/heads/mmaplus)] Add -mcpu=future tuning support.

https://gcc.gnu.org/g:4e5faa8611582139b33bab10f65a53fc8c58b385 commit 4e5faa8611582139b33bab10f65a53fc8c58b385 Author: Michael Meissner Date: Tue Oct 22 16:53:40 2024 -0400 Add -mcpu=future tuning support. This patch makes -mtune=future use the same tuning decision as -mtune=powe

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_MODULO to TARGET_POWER9

https://gcc.gnu.org/g:cff03e03f35f7e27538ccea63ce0773b9e641cc4 commit cff03e03f35f7e27538ccea63ce0773b9e641cc4 Author: Michael Meissner Date: Tue Oct 22 16:51:43 2024 -0400 Change TARGET_MODULO to TARGET_POWER9 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Update ChangeLog.*

https://gcc.gnu.org/g:89c0f5b4778d7a65eb2448340642d842b23994f7 commit 89c0f5b4778d7a65eb2448340642d842b23994f7 Author: Michael Meissner Date: Tue Oct 22 17:55:58 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.mmaplus | 814 ++ 1 file

[gcc(refs/vendors/ibm/heads/mmaplus)] Revert changes

https://gcc.gnu.org/g:72fce80f31f4df84078284c077789067e579929b commit 72fce80f31f4df84078284c077789067e579929b Author: Michael Meissner Date: Tue Oct 22 17:51:04 2024 -0400 Revert changes Diff: --- gcc/config/rs6000/altivec.md | 14 gcc/config/rs6000/constraint

[gcc(refs/vendors/ibm/heads/mmaplus)] Set default name to power8 if no --with-cpu.

https://gcc.gnu.org/g:596a6fa8f3aa19a98d5ea9726a11d19c9b0c1c58 commit 596a6fa8f3aa19a98d5ea9726a11d19c9b0c1c58 Author: Michael Meissner Date: Wed Nov 6 16:52:07 2024 -0500 Set default name to power8 if no --with-cpu. 2024-11-06 Michael Meissner gcc/ *

[gcc(refs/vendors/ibm/heads/mmaplus)] Update ChangeLog.*

https://gcc.gnu.org/g:5e032b1a1424bdd5c6657b545b4fd6b64edb0999 commit 5e032b1a1424bdd5c6657b545b4fd6b64edb0999 Author: Michael Meissner Date: Wed Nov 6 16:54:27 2024 -0500 Update ChangeLog.* Diff: --- gcc/ChangeLog.mmaplus | 13 + 1 file changed, 13 insertions(+) diff --git

[gcc r16-1349] MAINTAINERS: Update my email address

https://gcc.gnu.org/g:e825ec7fcd81cf845bc6f926d07917b6040a585d commit r16-1349-ge825ec7fcd81cf845bc6f926d07917b6040a585d Author: Peter Bergner Date: Mon Jun 9 16:01:52 2025 -0500 MAINTAINERS: Update my email address 2025-06-09 Peter Bergner * MAINTAINERS: Updat

<    1   2