[gcc r14-10081] RISC-V: Adjust overlap attr after revert d3544cea63d and e65aaf8efe1

https://gcc.gnu.org/g:2a8187e0a1cf5fb5d1adcb5a2a2b579a80215202 commit r14-10081-g2a8187e0a1cf5fb5d1adcb5a2a2b579a80215202 Author: Pan Li Date: Mon Apr 22 21:20:02 2024 +0800 RISC-V: Adjust overlap attr after revert d3544cea63d and e65aaf8efe1 After we reverted below 2 commits, the

[gcc r14-10102] Revert "RISC-V: Support highpart overlap for vext.vf"

https://gcc.gnu.org/g:8bcefc2d5fb0d8f8f9671fd830132b4e655c44b4 commit r14-10102-g8bcefc2d5fb0d8f8f9671fd830132b4e655c44b4 Author: Pan Li Date: Wed Apr 24 10:46:28 2024 +0800 Revert "RISC-V: Support highpart overlap for vext.vf" This reverts commit 62685890d8861b72f812bfe171a20332d

[gcc r14-10103] RISC-V: Add xfail test case for highpart overlap of vext.vf

https://gcc.gnu.org/g:f952745943c2e9fbb2df32d2f2b037669d3fc50f commit r14-10103-gf952745943c2e9fbb2df32d2f2b037669d3fc50f Author: Pan Li Date: Wed Apr 24 10:39:25 2024 +0800 RISC-V: Add xfail test case for highpart overlap of vext.vf We reverted below patch for register group over

[gcc r14-10108] Revert "RISC-V: Support highpart register overlap for vwcvt"

https://gcc.gnu.org/g:bc17a92380ff89b47b5bdc54d44368174d97d2df commit r14-10108-gbc17a92380ff89b47b5bdc54d44368174d97d2df Author: Pan Li Date: Wed Apr 24 19:20:39 2024 +0800 Revert "RISC-V: Support highpart register overlap for vwcvt" This reverts commit bdad036da32f72b84a96070518

[gcc r14-10113] RISC-V: Add xfail test case for highpart register overlap of vwcvt

https://gcc.gnu.org/g:d44c2052c59545731edcf7f99a32bcef3b0415b6 commit r14-10113-gd44c2052c59545731edcf7f99a32bcef3b0415b6 Author: Pan Li Date: Wed Apr 24 23:09:24 2024 +0800 RISC-V: Add xfail test case for highpart register overlap of vwcvt We reverted below patch for register gro

[gcc r14-10117] RISC-V: Add early clobber to the dest of vwsll

https://gcc.gnu.org/g:10ad46bc191f8aa90b0d7b00963bfd52c6d7b09c commit r14-10117-g10ad46bc191f8aa90b0d7b00963bfd52c6d7b09c Author: Pan Li Date: Thu Apr 25 08:55:08 2024 +0800 RISC-V: Add early clobber to the dest of vwsll We missed the existing early clobber for the dest operand of

[gcc r14-10118] RISC-V: Add test cases for insn does not satisfy its constraints [PR114714]

https://gcc.gnu.org/g:af7d981ba40f145256f6f6d3409451e8fa647f75 commit r14-10118-gaf7d981ba40f145256f6f6d3409451e8fa647f75 Author: Pan Li Date: Thu Apr 25 15:04:02 2024 +0800 RISC-V: Add test cases for insn does not satisfy its constraints [PR114714] We have one ICE when RVV regist

[gcc r15-45] RISC-V: Fix ICE for legitimize move on subreg const_poly_int [PR114885]

https://gcc.gnu.org/g:add51a2514a39978dc66976a8974f8435c86168f commit r15-45-gadd51a2514a39978dc66976a8974f8435c86168f Author: Pan Li Date: Sat Apr 27 20:24:04 2024 +0800 RISC-V: Fix ICE for legitimize move on subreg const_poly_int [PR114885] When we build with isl, there will be

[gcc r14-10145] RISC-V: Fix ICE for legitimize move on subreg const_poly_int [PR114885]

https://gcc.gnu.org/g:d40073be96ea24c7eace7141c4e0fed50077d2b0 commit r14-10145-gd40073be96ea24c7eace7141c4e0fed50077d2b0 Author: Pan Li Date: Sat Apr 27 20:24:04 2024 +0800 RISC-V: Fix ICE for legitimize move on subreg const_poly_int [PR114885] When we build with isl, there will

[gcc r15-2355] Match: Support .SAT_SUB with IMM op for form 1-4

https://gcc.gnu.org/g:6d79d53eed82b1df378998bd4ced88644dcde200 commit r15-2355-g6d79d53eed82b1df378998bd4ced88644dcde200 Author: Pan Li Date: Fri Jul 26 17:00:13 2024 +0800 Match: Support .SAT_SUB with IMM op for form 1-4 This patch would like to support .SAT_SUB when one of the o

[gcc r15-2379] Widening-Mul: Try .SAT_SUB for PLUS_EXPR when one op is IMM

https://gcc.gnu.org/g:696d8b9bf3f0ea60da0c24361dc5fe559f97ab77 commit r15-2379-g696d8b9bf3f0ea60da0c24361dc5fe559f97ab77 Author: Pan Li Date: Sat Jul 27 11:29:42 2024 +0800 Widening-Mul: Try .SAT_SUB for PLUS_EXPR when one op is IMM After add the matching for .SAT_SUB when one op

[gcc r15-2399] RISC-V: Take Xmode instead of Pmode for ussub expanding

https://gcc.gnu.org/g:85cff6e46d212240f9c15c2d7d614b6089be772a commit r15-2399-g85cff6e46d212240f9c15c2d7d614b6089be772a Author: Pan Li Date: Tue Jul 30 13:56:40 2024 +0800 RISC-V: Take Xmode instead of Pmode for ussub expanding The Pmode is designed for pointer, thus leverage th

[gcc r15-2900] Internal-fn: Handle vector bool type for type strict match mode [PR116103]

https://gcc.gnu.org/g:5618b023e8c3ea96f009c202e9457ea7261ecf57 commit r15-2900-g5618b023e8c3ea96f009c202e9457ea7261ecf57 Author: Pan Li Date: Mon Jul 29 15:45:54 2024 +0800 Internal-fn: Handle vector bool type for type strict match mode [PR116103] For some target like target=amdgc

[gcc r15-794] Match: Add overloaded types_match to avoid code dup [NFC]

https://gcc.gnu.org/g:dca3e6b9049ff3c1432d4717ca2309e7aad20447 commit r15-794-gdca3e6b9049ff3c1432d4717ca2309e7aad20447 Author: Pan Li Date: Thu May 23 08:09:40 2024 +0800 Match: Add overloaded types_match to avoid code dup [NFC] There are sorts of match pattern for SAT related ca

[gcc r15-840] Gen-Match: Fix gen_kids_1 right hand braces mis-alignment

https://gcc.gnu.org/g:5d99cf74c9f748c93ea218eca9bd2f08edfb2a88 commit r15-840-g5d99cf74c9f748c93ea218eca9bd2f08edfb2a88 Author: Pan Li Date: Sat May 25 23:16:50 2024 +0800 Gen-Match: Fix gen_kids_1 right hand braces mis-alignment Notice some mis-alignment for gen_kids_1 right hand

[gcc r15-1030] Internal-fn: Support new IFN SAT_SUB for unsigned scalar int

https://gcc.gnu.org/g:abe6d39365476e6be724815d09d072e305018755 commit r15-1030-gabe6d39365476e6be724815d09d072e305018755 Author: Pan Li Date: Tue May 28 15:37:44 2024 +0800 Internal-fn: Support new IFN SAT_SUB for unsigned scalar int This patch would like to add the middle-end pre

[gcc r15-1064] Vect: Support IFN SAT_SUB for unsigned vector int

https://gcc.gnu.org/g:2d11de35d378a0763a8956638766182a49272e0b commit r15-1064-g2d11de35d378a0763a8956638766182a49272e0b Author: Pan Li Date: Wed May 29 16:18:31 2024 +0800 Vect: Support IFN SAT_SUB for unsigned vector int This patch would like to support the .SAT_SUB for the unsi

[gcc r15-1081] Match: Support more form for scalar unsigned SAT_ADD

https://gcc.gnu.org/g:e14afbe2d1c696cc4abda24ca10a5a43ee9c2818 commit r15-1081-ge14afbe2d1c696cc4abda24ca10a5a43ee9c2818 Author: Pan Li Date: Thu Jun 6 09:19:53 2024 +0800 Match: Support more form for scalar unsigned SAT_ADD After we support one gassign form of the unsigned .SAT_A

[gcc r15-1083] RISC-V: Add testcases for scalar unsigned SAT_ADD form 1

https://gcc.gnu.org/g:a737c2bf5212822b8225f65efa643a968e5a7c78 commit r15-1083-ga737c2bf5212822b8225f65efa643a968e5a7c78 Author: Pan Li Date: Wed May 29 14:15:45 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_ADD form 1 After the middle-end support the form 1 of unsigned

[gcc r15-1084] RISC-V: Add testcases for scalar unsigned SAT_ADD form 2

https://gcc.gnu.org/g:0261ed4337f62c247b33145a81cd4fb5a69bc5a7 commit r15-1084-g0261ed4337f62c247b33145a81cd4fb5a69bc5a7 Author: Pan Li Date: Mon Jun 3 09:35:49 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_ADD form 2 After the middle-end support the form 2 of unsigned

[gcc r15-1085] RISC-V: Add testcases for scalar unsigned SAT_ADD form 3

https://gcc.gnu.org/g:39dde9200dd936339df7dd6c8f56e88866bcecc5 commit r15-1085-g39dde9200dd936339df7dd6c8f56e88866bcecc5 Author: Pan Li Date: Mon Jun 3 10:24:47 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_ADD form 3 After the middle-end support the form 3 of unsigned

[gcc r15-1087] RISC-V: Add testcases for scalar unsigned SAT_ADD form 5

https://gcc.gnu.org/g:93f44e18cddb2b5eb3a00232d3be9a5bc8179f25 commit r15-1087-g93f44e18cddb2b5eb3a00232d3be9a5bc8179f25 Author: Pan Li Date: Mon Jun 3 10:43:10 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_ADD form 5 After the middle-end support the form 5 of unsigned

[gcc r15-1086] RISC-V: Add testcases for scalar unsigned SAT_ADD form 4

https://gcc.gnu.org/g:a171aac72408837ed0b20e3912a22c5b4891ace4 commit r15-1086-ga171aac72408837ed0b20e3912a22c5b4891ace4 Author: Pan Li Date: Mon Jun 3 10:33:15 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_ADD form 4 After the middle-end support the form 4 of unsigned

[gcc r15-1112] RISC-V: Implement .SAT_SUB for unsigned scalar int

https://gcc.gnu.org/g:ab50ac8180beae9001c97cc036ce0df055e25b41 commit r15-1112-gab50ac8180beae9001c97cc036ce0df055e25b41 Author: Pan Li Date: Wed Jun 5 16:42:05 2024 +0800 RISC-V: Implement .SAT_SUB for unsigned scalar int As the middle support of .SAT_SUB committed, implement th

[gcc r15-1174] RISC-V: Implement .SAT_SUB for unsigned vector int

https://gcc.gnu.org/g:8087204a4260a552c7cee37d1fb46cec7edfe9ee commit r15-1174-g8087204a4260a552c7cee37d1fb46cec7edfe9ee Author: Pan Li Date: Tue Jun 11 11:04:22 2024 +0800 RISC-V: Implement .SAT_SUB for unsigned vector int As the middle support of .SAT_SUB committed, implement t

[gcc r15-1198] Widening-Mul: Take gsi after_labels instead of start_bb for gcall insertion

https://gcc.gnu.org/g:acd2ca1e28128d9d0d41683d6039f437c02d793f commit r15-1198-gacd2ca1e28128d9d0d41683d6039f437c02d793f Author: Pan Li Date: Tue Jun 11 21:39:43 2024 +0800 Widening-Mul: Take gsi after_labels instead of start_bb for gcall insertion We inserted the gcall of .SAT_AD

[gcc r15-1233] Test: Move target independent test cases to gcc.dg/torture

https://gcc.gnu.org/g:b6eda6b61c52aa005bb07465969d2ef089eb28e6 commit r15-1233-gb6eda6b61c52aa005bb07465969d2ef089eb28e6 Author: Pan Li Date: Tue Jun 11 10:56:23 2024 +0800 Test: Move target independent test cases to gcc.dg/torture The test cases of pr115387 are target independent

[gcc r15-1243] RISC-V: Bugfix vec_extract vls mode iterator restriction mismatch

https://gcc.gnu.org/g:3dac1049c1211e6d06c2536b86445a6334c3866d commit r15-1243-g3dac1049c1211e6d06c2536b86445a6334c3866d Author: Pan Li Date: Thu Jun 13 15:26:59 2024 +0800 RISC-V: Bugfix vec_extract vls mode iterator restriction mismatch We have vec_extract pattern which takes ZV

[gcc r15-1327] RISC-V: Bugfix vec_extract v mode iterator restriction mismatch

https://gcc.gnu.org/g:c2c61d8902dbda017b1647252d17bce141493433 commit r15-1327-gc2c61d8902dbda017b1647252d17bce141493433 Author: Pan Li Date: Fri Jun 14 14:54:22 2024 +0800 RISC-V: Bugfix vec_extract v mode iterator restriction mismatch We have vec_extract pattern which takes ZVFH

[gcc r15-1334] RISC-V: Add testcases for scalar unsigned SAT_SUB form 4

https://gcc.gnu.org/g:d0f6a1ea5363662e01c5b735fe4b19cac4c1caf2 commit r15-1334-gd0f6a1ea5363662e01c5b735fe4b19cac4c1caf2 Author: Pan Li Date: Thu Jun 13 22:35:21 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_SUB form 4 After the middle-end support the form 4 of unsigned

[gcc r15-1335] RISC-V: Add testcases for scalar unsigned SAT_SUB form 5

https://gcc.gnu.org/g:bfe92c70821bc21df5befae3a39fe6ab31d2cbb4 commit r15-1335-gbfe92c70821bc21df5befae3a39fe6ab31d2cbb4 Author: Pan Li Date: Thu Jun 13 22:43:31 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_SUB form 5 After the middle-end support the form 5 of unsigned

[gcc r15-1337] RISC-V: Add testcases for scalar unsigned SAT_SUB form 7

https://gcc.gnu.org/g:1d37b81cbfb4b5ead7112855ef6c215ad1042456 commit r15-1337-g1d37b81cbfb4b5ead7112855ef6c215ad1042456 Author: Pan Li Date: Fri Jun 14 09:49:22 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_SUB form 7 After the middle-end support the form 7 of unsigned

[gcc r15-1339] RISC-V: Add testcases for scalar unsigned SAT_SUB form 9

https://gcc.gnu.org/g:40609350e77d3fd4fac9787ff5066d723c7a6329 commit r15-1339-g40609350e77d3fd4fac9787ff5066d723c7a6329 Author: Pan Li Date: Fri Jun 14 10:03:15 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_SUB form 9 After the middle-end support the form 9 of unsigned

[gcc r15-1338] RISC-V: Add testcases for scalar unsigned SAT_SUB form 8

https://gcc.gnu.org/g:6d73bb157a7ddc8fe42fc2cb31f3e2371162a228 commit r15-1338-g6d73bb157a7ddc8fe42fc2cb31f3e2371162a228 Author: Pan Li Date: Fri Jun 14 09:57:22 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_SUB form 8 After the middle-end support the form 8 of unsigned

[gcc r15-1332] Match: Support more forms for the scalar unsigned .SAT_SUB

https://gcc.gnu.org/g:869af0255b648727fbd45fd3da4225069cbcb86d commit r15-1332-g869af0255b648727fbd45fd3da4225069cbcb86d Author: Pan Li Date: Wed Jun 12 14:28:09 2024 +0800 Match: Support more forms for the scalar unsigned .SAT_SUB After we support the scalar unsigned form 1 and 2

[gcc r15-1333] RISC-V: Add testcases for scalar unsigned SAT_SUB form 3

https://gcc.gnu.org/g:308f87030ea0a4580c16906b948eb8996cf4f8de commit r15-1333-g308f87030ea0a4580c16906b948eb8996cf4f8de Author: Pan Li Date: Thu Jun 13 22:06:09 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_SUB form 3 After the middle-end support the form 3 of unsigned

[gcc r15-1336] RISC-V: Add testcases for scalar unsigned SAT_SUB form 6

https://gcc.gnu.org/g:b781fb4fe19f00aef886b21acf57b96d52545a0c commit r15-1336-gb781fb4fe19f00aef886b21acf57b96d52545a0c Author: Pan Li Date: Thu Jun 13 23:05:00 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_SUB form 6 After the middle-end support the form 6 of unsigned

[gcc r15-1340] RISC-V: Add testcases for scalar unsigned SAT_SUB form 10

https://gcc.gnu.org/g:896e043830fa4bc391db5f3cc2c33496cb8aa32e commit r15-1340-g896e043830fa4bc391db5f3cc2c33496cb8aa32e Author: Pan Li Date: Fri Jun 14 10:08:59 2024 +0800 RISC-V: Add testcases for scalar unsigned SAT_SUB form 10 After the middle-end support the form 10 of unsign

[gcc r15-1350] RISC-V: Refine the SAT_ARITH test help header files [NFC]

https://gcc.gnu.org/g:9a674ed5584e1c3060bbc7caed9bcd42c48be51f commit r15-1350-g9a674ed5584e1c3060bbc7caed9bcd42c48be51f Author: Pan Li Date: Sat Jun 15 10:15:17 2024 +0800 RISC-V: Refine the SAT_ARITH test help header files [NFC] Separate the vector part code to one standalone he

[gcc r15-1352] RISC-V: Add testcases for vector unsigned SAT_SUB form 2

https://gcc.gnu.org/g:079506b8aaff878cfc5506241909566f91c624c8 commit r15-1352-g079506b8aaff878cfc5506241909566f91c624c8 Author: Pan Li Date: Sat Jun 15 20:27:01 2024 +0800 RISC-V: Add testcases for vector unsigned SAT_SUB form 2 The previous RISC-V backend .SAT_SUB enabling patch

[gcc r15-1408] Match: Support form 11 for the unsigned scalar .SAT_SUB

https://gcc.gnu.org/g:9b109826e0b0473572395f5837b455d57fa5a93c commit r15-1408-g9b109826e0b0473572395f5837b455d57fa5a93c Author: Pan Li Date: Mon Jun 17 14:56:42 2024 +0800 Match: Support form 11 for the unsigned scalar .SAT_SUB We missed one match pattern for the unsigned scalar

[gcc r15-1409] Match: Support forms 7 and 8 for the unsigned .SAT_ADD

https://gcc.gnu.org/g:e4f938936867d8799775d1455e67bd3fb8711afd commit r15-1409-ge4f938936867d8799775d1455e67bd3fb8711afd Author: Pan Li Date: Mon Jun 17 09:31:33 2024 +0800 Match: Support forms 7 and 8 for the unsigned .SAT_ADD When investigate the vectorization of .SAT_ADD, we n

[gcc r15-1424] RISC-V: Add testcases for unsigned .SAT_SUB scalar form 11

https://gcc.gnu.org/g:6315c000c027948fd49d9f5a55aa83808b21b85a commit r15-1424-g6315c000c027948fd49d9f5a55aa83808b21b85a Author: Pan Li Date: Tue Jun 18 16:14:23 2024 +0800 RISC-V: Add testcases for unsigned .SAT_SUB scalar form 11 After the middle-end support the form 11 of unsig

[gcc r15-1425] RISC-V: Add testcases for unsigned .SAT_SUB scalar form 12

https://gcc.gnu.org/g:61655f5c95186960f637c26130f08098e5407516 commit r15-1425-g61655f5c95186960f637c26130f08098e5407516 Author: Pan Li Date: Tue Jun 18 16:22:59 2024 +0800 RISC-V: Add testcases for unsigned .SAT_SUB scalar form 12 After the middle-end support the form 12 of unsig

[gcc r15-1426] RISC-V: Add testcases for unsigned .SAT_ADD vector form 2

https://gcc.gnu.org/g:a84945e521e5687cdc46fc1f963d64d0b7f26cdd commit r15-1426-ga84945e521e5687cdc46fc1f963d64d0b7f26cdd Author: Pan Li Date: Mon Jun 17 14:39:10 2024 +0800 RISC-V: Add testcases for unsigned .SAT_ADD vector form 2 After the middle-end support the form 2 of unsigne

[gcc r15-1427] RISC-V: Add testcases for unsigned .SAT_ADD vector form 3

https://gcc.gnu.org/g:1bdcac7aefdd2a170112e2c78e8e769f7caad0a2 commit r15-1427-g1bdcac7aefdd2a170112e2c78e8e769f7caad0a2 Author: Pan Li Date: Mon Jun 17 14:53:12 2024 +0800 RISC-V: Add testcases for unsigned .SAT_ADD vector form 3 After the middle-end support the form 3 of unsigne

[gcc r15-1428] RISC-V: Add testcases for unsigned .SAT_ADD vector form 4

https://gcc.gnu.org/g:24ae0a0a3dea27d8c81f2f102d637cf09424b4b9 commit r15-1428-g24ae0a0a3dea27d8c81f2f102d637cf09424b4b9 Author: Pan Li Date: Mon Jun 17 16:09:13 2024 +0800 RISC-V: Add testcases for unsigned .SAT_ADD vector form 4 After the middle-end support the form 4 of unsigne

[gcc r15-1429] RISC-V: Add testcases for unsigned .SAT_ADD vector form 5

https://gcc.gnu.org/g:1daf54aa7818519b5a1dcc441c8b235d15a8726e commit r15-1429-g1daf54aa7818519b5a1dcc441c8b235d15a8726e Author: Pan Li Date: Mon Jun 17 16:31:26 2024 +0800 RISC-V: Add testcases for unsigned .SAT_ADD vector form 5 After the middle-end support the form 5 of unsigne

[gcc r15-1430] RISC-V: Add testcases for unsigned .SAT_ADD vector form 6

https://gcc.gnu.org/g:748b9f0a37c448cbe8585cfa8c1b380b4975ba9d commit r15-1430-g748b9f0a37c448cbe8585cfa8c1b380b4975ba9d Author: Pan Li Date: Mon Jun 17 22:10:31 2024 +0800 RISC-V: Add testcases for unsigned .SAT_ADD vector form 6 After the middle-end support the form 6 of unsigne

[gcc r15-1431] RISC-V: Add testcases for unsigned .SAT_ADD vector form 7

https://gcc.gnu.org/g:ed94699eefc7cc8ac8fd79a6d8d81bf05d5a79ff commit r15-1431-ged94699eefc7cc8ac8fd79a6d8d81bf05d5a79ff Author: Pan Li Date: Mon Jun 17 22:19:54 2024 +0800 RISC-V: Add testcases for unsigned .SAT_ADD vector form 7 After the middle-end support the form 7 of unsigne

[gcc r15-1432] RISC-V: Add testcases for unsigned .SAT_ADD vector form 8

https://gcc.gnu.org/g:eb549f13fcde079a7bbe27e5ba3d5e80abbffba1 commit r15-1432-geb549f13fcde079a7bbe27e5ba3d5e80abbffba1 Author: Pan Li Date: Mon Jun 17 22:31:27 2024 +0800 RISC-V: Add testcases for unsigned .SAT_ADD vector form 8 After the middle-end support the form 8 of unsigne

[gcc r15-1438] RISC-V: Add testcases for unsigned .SAT_SUB vector form 3

https://gcc.gnu.org/g:b3a34469f3f94b8cde26976e87b61895e8111cd1 commit r15-1438-gb3a34469f3f94b8cde26976e87b61895e8111cd1 Author: Pan Li Date: Wed Jun 19 18:56:51 2024 +0800 RISC-V: Add testcases for unsigned .SAT_SUB vector form 3 After the middle-end support the form 3 of unsigne

[gcc r15-1439] RISC-V: Add testcases for unsigned .SAT_SUB vector form 4

https://gcc.gnu.org/g:0fe8c5f146178ac86468859f8c83039e88b73481 commit r15-1439-g0fe8c5f146178ac86468859f8c83039e88b73481 Author: Pan Li Date: Wed Jun 19 19:19:23 2024 +0800 RISC-V: Add testcases for unsigned .SAT_SUB vector form 4 After the middle-end support the form 4 of unsigne

[gcc r15-1440] RISC-V: Add testcases for unsigned .SAT_SUB vector form 5

https://gcc.gnu.org/g:d5054ecca13b9f8f480f5534e40da3e931c4fa72 commit r15-1440-gd5054ecca13b9f8f480f5534e40da3e931c4fa72 Author: Pan Li Date: Wed Jun 19 19:44:52 2024 +0800 RISC-V: Add testcases for unsigned .SAT_SUB vector form 5 After the middle-end support the form 5 of unsigne

[gcc r15-1441] RISC-V: Add testcases for unsigned .SAT_SUB vector form 6

https://gcc.gnu.org/g:337b21151135176b48d5cb6382e3f3258bc9a1db commit r15-1441-g337b21151135176b48d5cb6382e3f3258bc9a1db Author: Pan Li Date: Wed Jun 19 20:15:27 2024 +0800 RISC-V: Add testcases for unsigned .SAT_SUB vector form 6 After the middle-end support the form 6 of unsigne

[gcc r15-1442] RISC-V: Add testcases for unsigned .SAT_SUB vector form 7

https://gcc.gnu.org/g:be8dc4bf3b25ca2600886f6e1d9ba7299e78b856 commit r15-1442-gbe8dc4bf3b25ca2600886f6e1d9ba7299e78b856 Author: Pan Li Date: Wed Jun 19 20:28:11 2024 +0800 RISC-V: Add testcases for unsigned .SAT_SUB vector form 7 After the middle-end support the form 7 of unsigne

[gcc r15-1443] RISC-V: Add testcases for unsigned .SAT_SUB vector form 8

https://gcc.gnu.org/g:ff3729e94a114f5b24a5c3d0a6c3b7a9aeb8cbc9 commit r15-1443-gff3729e94a114f5b24a5c3d0a6c3b7a9aeb8cbc9 Author: Pan Li Date: Wed Jun 19 20:38:43 2024 +0800 RISC-V: Add testcases for unsigned .SAT_SUB vector form 8 After the middle-end support the form 8 of unsigne

[gcc r15-1444] RISC-V: Add testcases for unsigned .SAT_SUB vector form 9

https://gcc.gnu.org/g:f1275820518772f4eece48bb3a578277cd7da138 commit r15-1444-gf1275820518772f4eece48bb3a578277cd7da138 Author: Pan Li Date: Wed Jun 19 21:02:27 2024 +0800 RISC-V: Add testcases for unsigned .SAT_SUB vector form 9 After the middle-end support the form 9 of unsigne

[gcc r15-1445] RISC-V: Add testcases for unsigned .SAT_SUB vector form 10

https://gcc.gnu.org/g:be18486825dd24533d320bf840bf95bd083487d1 commit r15-1445-gbe18486825dd24533d320bf840bf95bd083487d1 Author: Pan Li Date: Wed Jun 19 21:14:31 2024 +0800 RISC-V: Add testcases for unsigned .SAT_SUB vector form 10 After the middle-end support the form 10 of unsig

[gcc r15-4281] RISC-V: Add testcases for form 1 of vector signed SAT_SUB

https://gcc.gnu.org/g:c4af4fe11e71c686ee06c1eebe9e64ad5a94410a commit r15-4281-gc4af4fe11e71c686ee06c1eebe9e64ad5a94410a Author: Pan Li Date: Fri Oct 11 12:12:03 2024 +0800 RISC-V: Add testcases for form 1 of vector signed SAT_SUB Form 1: #define DEF_VEC_SAT_S_SUB_FMT_1(T, U

[gcc r15-4279] Vect: Try the pattern of vector signed integer SAT_SUB

https://gcc.gnu.org/g:d339dbee2c1429fee8792a03f571fa75d036566b commit r15-4279-gd339dbee2c1429fee8792a03f571fa75d036566b Author: Pan Li Date: Fri Oct 11 11:58:30 2024 +0800 Vect: Try the pattern of vector signed integer SAT_SUB Almost the same as vector unsigned integer SAT_SUB, t

[gcc r15-4280] RISC-V: Implement vector SAT_SUB for signed integer

https://gcc.gnu.org/g:2a7f4904942fd0d988d7d29ba512ee4ee357bb13 commit r15-4280-g2a7f4904942fd0d988d7d29ba512ee4ee357bb13 Author: Pan Li Date: Fri Oct 11 12:05:10 2024 +0800 RISC-V: Implement vector SAT_SUB for signed integer This patch would like to implement the sssub for vector

[gcc r15-4278] Match: Support form 1 for vector signed integer SAT_SUB

https://gcc.gnu.org/g:b4f2fccf302bfe4ce704d11017b1a174eb3da89f commit r15-4278-gb4f2fccf302bfe4ce704d11017b1a174eb3da89f Author: Pan Li Date: Fri Oct 11 11:51:52 2024 +0800 Match: Support form 1 for vector signed integer SAT_SUB This patch would like to support the form 1 of the v

[gcc r15-4344] RISC-V: Fix UNRESOLVED testcases for SAT alu vector mode

https://gcc.gnu.org/g:14493126c0f56dd201b27bfd28fb4575351a9725 commit r15-4344-g14493126c0f56dd201b27bfd28fb4575351a9725 Author: Pan Li Date: Tue Oct 15 09:19:44 2024 +0800 RISC-V: Fix UNRESOLVED testcases for SAT alu vector mode Some saturation related alu testcases missed additi

[gcc r15-4310] Match: Support form 3 for vector signed integer SAT_SUB

https://gcc.gnu.org/g:5920bc841492e04b2bd06426db8620784b263d8d commit r15-4310-g5920bc841492e04b2bd06426db8620784b263d8d Author: Pan Li Date: Sat Oct 12 10:34:55 2024 +0800 Match: Support form 3 for vector signed integer SAT_SUB This patch would like to support the form 3 of the v

[gcc r15-4311] RISC-V: Add testcases for form 3 of vector signed SAT_SUB

https://gcc.gnu.org/g:b97629226d9be496bc30bb13608ef1c2bcdceeb7 commit r15-4311-gb97629226d9be496bc30bb13608ef1c2bcdceeb7 Author: Pan Li Date: Sat Oct 12 10:40:30 2024 +0800 RISC-V: Add testcases for form 3 of vector signed SAT_SUB Form 3: #define DEF_VEC_SAT_S_SUB_FMT_3(T, U

[gcc r15-4312] RISC-V: Add testcases for form 4 of vector signed SAT_SUB

https://gcc.gnu.org/g:4d8373f853269cd3a6f99ad0cb774fccd68cb874 commit r15-4312-g4d8373f853269cd3a6f99ad0cb774fccd68cb874 Author: Pan Li Date: Sat Oct 12 11:08:21 2024 +0800 RISC-V: Add testcases for form 4 of vector signed SAT_SUB Form 4: #define DEF_VEC_SAT_S_SUB_FMT_4(T, U

[gcc r15-4309] RISC-V: Add testcases for form 2 of vector signed SAT_SUB

https://gcc.gnu.org/g:72d24d2a130a54fbe1479cb85e5639a7eab6c971 commit r15-4309-g72d24d2a130a54fbe1479cb85e5639a7eab6c971 Author: Pan Li Date: Sat Oct 12 09:13:54 2024 +0800 RISC-V: Add testcases for form 2 of vector signed SAT_SUB Form 2: #define DEF_VEC_SAT_S_SUB_FMT_2(T, U

[gcc r15-4354] Match: Remove dup match pattern for signed_integer_sat_sub [PR117141]

https://gcc.gnu.org/g:97f98855d4157a2511a713129ec77740fe6f88dc commit r15-4354-g97f98855d4157a2511a713129ec77740fe6f88dc Author: Pan Li Date: Tue Oct 15 07:30:13 2024 +0800 Match: Remove dup match pattern for signed_integer_sat_sub [PR117141] This patch would like to fix the warni

[gcc r15-4170] RISC-V: Add testcases for form 4 of scalar signed SAT_SUB

https://gcc.gnu.org/g:9252fc398c86ec0eac2c56283e2ded8ea6cfb70c commit r15-4170-g9252fc398c86ec0eac2c56283e2ded8ea6cfb70c Author: Pan Li Date: Thu Oct 3 16:47:52 2024 +0800 RISC-V: Add testcases for form 4 of scalar signed SAT_SUB Form 4: #define DEF_SAT_S_SUB_FMT_4(T, UT, MI

[gcc r15-4169] RISC-V: Add testcases for form 3 of scalar signed SAT_SUB

https://gcc.gnu.org/g:aac2bc48014dd418a5c9dc3a7c962c0f0bb48312 commit r15-4169-gaac2bc48014dd418a5c9dc3a7c962c0f0bb48312 Author: Pan Li Date: Thu Oct 3 16:15:56 2024 +0800 RISC-V: Add testcases for form 3 of scalar signed SAT_SUB Form 3: #define DEF_SAT_S_SUB_FMT_3(T, UT, MI

[gcc r15-4168] Match: Support form 3 and form 4 for scalar signed integer SAT_SUB

https://gcc.gnu.org/g:e21a8d9ec63464b2c8301f882a3a04ac59b01fcd commit r15-4168-ge21a8d9ec63464b2c8301f882a3a04ac59b01fcd Author: Pan Li Date: Thu Oct 3 16:06:08 2024 +0800 Match: Support form 3 and form 4 for scalar signed integer SAT_SUB This patch would like to support the form

[gcc r15-4179] RISC-V: Add testcases for form 1 of scalar signed SAT_TRUNC

https://gcc.gnu.org/g:8b407d5c6940a65d78a544f9c66850e619638171 commit r15-4179-g8b407d5c6940a65d78a544f9c66850e619638171 Author: Pan Li Date: Tue Oct 8 11:28:44 2024 +0800 RISC-V: Add testcases for form 1 of scalar signed SAT_TRUNC Form 1: #define DEF_SAT_S_TRUNC_FMT_1(WT, N

[gcc r15-4176] Match: Support form 1 for scalar signed integer SAT_TRUNC

https://gcc.gnu.org/g:f9f57df85a5411dce201165a42f4b9d57489bed9 commit r15-4176-gf9f57df85a5411dce201165a42f4b9d57489bed9 Author: Pan Li Date: Tue Oct 8 10:02:21 2024 +0800 Match: Support form 1 for scalar signed integer SAT_TRUNC This patch would like to support the form 1 of the

[gcc r15-4177] Widening-Mul: Fix one bug of consume after phi node released

https://gcc.gnu.org/g:2291739ec432abc01c7afc5a07443c575539316a commit r15-4177-g2291739ec432abc01c7afc5a07443c575539316a Author: Pan Li Date: Tue Oct 8 11:06:23 2024 +0800 Widening-Mul: Fix one bug of consume after phi node released When try to matching saturation related pattern

[gcc r15-4178] RISC-V: Implement scalar SAT_TRUNC for signed integer

https://gcc.gnu.org/g:110ccfa5c88544c5ec85d31b1ed2c2f9dac163fd commit r15-4178-g110ccfa5c88544c5ec85d31b1ed2c2f9dac163fd Author: Pan Li Date: Tue Oct 8 11:22:21 2024 +0800 RISC-V: Implement scalar SAT_TRUNC for signed integer This patch would like to implement the sstrunc for scal

[gcc r15-3952] RISC-V: Add testcases for form 1 of scalar signed SAT_SUB

https://gcc.gnu.org/g:a2a78c0639dbebdab19d71f54edca99e7f9094fd commit r15-3952-ga2a78c0639dbebdab19d71f54edca99e7f9094fd Author: Pan Li Date: Wed Sep 25 09:42:31 2024 +0800 RISC-V: Add testcases for form 1 of scalar signed SAT_SUB Form 1: #define DEF_SAT_S_SUB_FMT_1(T, UT, M

[gcc r15-3951] RISC-V: Implement scalar SAT_SUB for signed integer

https://gcc.gnu.org/g:b6ea98bcaf1dad506fa643df8df50187feeb7e35 commit r15-3951-gb6ea98bcaf1dad506fa643df8df50187feeb7e35 Author: Pan Li Date: Wed Sep 25 09:36:05 2024 +0800 RISC-V: Implement scalar SAT_SUB for signed integer This patch would like to implement the sssub form 1. Ak

[gcc r15-3954] Match: Support form 1 for scalar signed integer SAT_SUB

https://gcc.gnu.org/g:3f8b1b21f377427adbdfa4cbfc21b979eb49c9d3 commit r15-3954-g3f8b1b21f377427adbdfa4cbfc21b979eb49c9d3 Author: Pan Li Date: Wed Sep 25 09:26:07 2024 +0800 Match: Support form 1 for scalar signed integer SAT_SUB This patch would like to support the form 1 of the s

[gcc r15-4530] RISC-V: Add testcases for form 7 of vector signed SAT_TRUNC

https://gcc.gnu.org/g:f138806811968a99bd81d7a60746279877df7ee8 commit r15-4530-gf138806811968a99bd81d7a60746279877df7ee8 Author: Pan Li Date: Mon Oct 14 15:10:46 2024 +0800 RISC-V: Add testcases for form 7 of vector signed SAT_TRUNC Form 7: #define DEF_VEC_SAT_S_TRUNC_FMT_7(

[gcc r15-4531] RISC-V: Add testcases for form 8 of vector signed SAT_TRUNC

https://gcc.gnu.org/g:cb131a401b7489cc17e2d70420cf9a916515b3f6 commit r15-4531-gcb131a401b7489cc17e2d70420cf9a916515b3f6 Author: Pan Li Date: Mon Oct 14 15:23:57 2024 +0800 RISC-V: Add testcases for form 8 of vector signed SAT_TRUNC Form 8: #define DEF_VEC_SAT_S_TRUNC_FMT_8(

[gcc r15-4529] RISC-V: Add testcases for form 6 of vector signed SAT_TRUNC

https://gcc.gnu.org/g:f411abe7935e01b7e61f966d12a7a0850ca8f1c0 commit r15-4529-gf411abe7935e01b7e61f966d12a7a0850ca8f1c0 Author: Pan Li Date: Mon Oct 14 14:55:56 2024 +0800 RISC-V: Add testcases for form 6 of vector signed SAT_TRUNC Form 6: #define DEF_VEC_SAT_S_TRUNC_FMT_6(

[gcc r15-4527] RISC-V: Add testcases for form 4 of vector signed SAT_TRUNC

https://gcc.gnu.org/g:f30ca9867a77c78f3a48bc124ab3bc4ce32283fa commit r15-4527-gf30ca9867a77c78f3a48bc124ab3bc4ce32283fa Author: Pan Li Date: Mon Oct 14 11:41:02 2024 +0800 RISC-V: Add testcases for form 4 of vector signed SAT_TRUNC Form 4: #define DEF_VEC_SAT_S_TRUNC_FMT_4(

[gcc r15-4524] RISC-V: Add testcases for form 1 of vector signed SAT_TRUNC

https://gcc.gnu.org/g:1f3a9c08aff9aac53d6c12b658efc222cf91de9c commit r15-4524-g1f3a9c08aff9aac53d6c12b658efc222cf91de9c Author: Pan Li Date: Mon Oct 14 10:21:39 2024 +0800 RISC-V: Add testcases for form 1 of vector signed SAT_TRUNC Form 1: #define DEF_VEC_SAT_S_TRUNC_FMT_1(

[gcc r15-4526] RISC-V: Add testcases for form 3 of vector signed SAT_TRUNC

https://gcc.gnu.org/g:efa1617bfc095e0667df31a6f3a2c0319afbc8d0 commit r15-4526-gefa1617bfc095e0667df31a6f3a2c0319afbc8d0 Author: Pan Li Date: Mon Oct 14 11:26:06 2024 +0800 RISC-V: Add testcases for form 3 of vector signed SAT_TRUNC Form 3: #define DEF_VEC_SAT_S_TRUNC_FMT_3(

[gcc r15-4525] RISC-V: Add testcases for form 2 of vector signed SAT_TRUNC

https://gcc.gnu.org/g:033900fc175bbd67fd1a8c8f7410a21f8b04eda2 commit r15-4525-g033900fc175bbd67fd1a8c8f7410a21f8b04eda2 Author: Pan Li Date: Mon Oct 14 11:09:55 2024 +0800 RISC-V: Add testcases for form 2 of vector signed SAT_TRUNC Form 2: #define DEF_VEC_SAT_S_TRUNC_FMT_2(

[gcc r15-4528] RISC-V: Add testcases for form 5 of vector signed SAT_TRUNC

https://gcc.gnu.org/g:108c8ef03dd5dff96fd3a4aa31088e42d98a0624 commit r15-4528-g108c8ef03dd5dff96fd3a4aa31088e42d98a0624 Author: Pan Li Date: Mon Oct 14 14:41:22 2024 +0800 RISC-V: Add testcases for form 5 of vector signed SAT_TRUNC Form 5: #define DEF_VEC_SAT_S_TRUNC_FMT_5(

[gcc r15-4523] RISC-V: Implement vector SAT_TRUNC for signed integer

https://gcc.gnu.org/g:b5a058154179ab16fe5f9e6aa331624363410aad commit r15-4523-gb5a058154179ab16fe5f9e6aa331624363410aad Author: Pan Li Date: Mon Oct 14 10:14:31 2024 +0800 RISC-V: Implement vector SAT_TRUNC for signed integer This patch would like to implement the sstrunc for vec

[gcc r15-4522] Vect: Try the pattern of vector signed integer SAT_TRUNC

https://gcc.gnu.org/g:2987ca61003ee7d55b8b005ab4c9c679efc9558b commit r15-4522-g2987ca61003ee7d55b8b005ab4c9c679efc9558b Author: Pan Li Date: Mon Oct 14 10:09:31 2024 +0800 Vect: Try the pattern of vector signed integer SAT_TRUNC Almost the same as vector unsigned integer SAT_TRUN

[gcc r15-4521] Match: Support form 1 for vector signed integer SAT_TRUNC

https://gcc.gnu.org/g:bdbb74e38f30827568ba1224d52f5c86edb5d48c commit r15-4521-gbdbb74e38f30827568ba1224d52f5c86edb5d48c Author: Pan Li Date: Mon Oct 14 10:03:25 2024 +0800 Match: Support form 1 for vector signed integer SAT_TRUNC This patch would like to support the form 1 of the

[gcc r15-4250] Match: Support form 2 for scalar signed integer SAT_TRUNC

https://gcc.gnu.org/g:1f84115e6569bc647a93e142ae53098efe2b8101 commit r15-4250-g1f84115e6569bc647a93e142ae53098efe2b8101 Author: Pan Li Date: Wed Oct 9 10:28:55 2024 +0800 Match: Support form 2 for scalar signed integer SAT_TRUNC This patch would like to support the form 2 of the

[gcc r15-4251] RISC-V: Add testcases for form 2 of scalar signed SAT_TRUNC

https://gcc.gnu.org/g:00d04a7b237fad4928bcaac19b3d0f18ddf8810e commit r15-4251-g00d04a7b237fad4928bcaac19b3d0f18ddf8810e Author: Pan Li Date: Wed Oct 9 10:33:31 2024 +0800 RISC-V: Add testcases for form 2 of scalar signed SAT_TRUNC Form 2: #define DEF_SAT_S_TRUNC_FMT_2(NT, W

[gcc r15-4253] RISC-V: Add testcases for form 3 of scalar signed SAT_TRUNC

https://gcc.gnu.org/g:77fceccf8bd05ebf0cf95fea3b34126431827a5d commit r15-4253-g77fceccf8bd05ebf0cf95fea3b34126431827a5d Author: Pan Li Date: Wed Oct 9 22:37:00 2024 +0800 RISC-V: Add testcases for form 3 of scalar signed SAT_TRUNC Form 3: #define DEF_SAT_S_TRUNC_FMT_3(NT, W

[gcc r15-4252] Match: Support form 3 for scalar signed integer SAT_TRUNC

https://gcc.gnu.org/g:cdb5b1eb1115600dabcc2ba4ffa639eef3e2a7b1 commit r15-4252-gcdb5b1eb1115600dabcc2ba4ffa639eef3e2a7b1 Author: Pan Li Date: Wed Oct 9 22:33:10 2024 +0800 Match: Support form 3 for scalar signed integer SAT_TRUNC This patch would like to support the form 3 of the

[gcc r15-4255] RISC-V: Add testcases for form 4 of scalar signed SAT_TRUNC

https://gcc.gnu.org/g:6e19e09c2a8303615627aa0e8163a4a9e4fcbd12 commit r15-4255-g6e19e09c2a8303615627aa0e8163a4a9e4fcbd12 Author: Pan Li Date: Thu Oct 10 14:52:04 2024 +0800 RISC-V: Add testcases for form 4 of scalar signed SAT_TRUNC Form 4: #define DEF_SAT_S_TRUNC_FMT_4(NT,

[gcc r15-4254] Match: Support form 4 for scalar signed integer SAT_TRUNC

https://gcc.gnu.org/g:a9386a1fff3c93c485b1f78c3a158c51a5301703 commit r15-4254-ga9386a1fff3c93c485b1f78c3a158c51a5301703 Author: Pan Li Date: Thu Oct 10 14:47:34 2024 +0800 Match: Support form 4 for scalar signed integer SAT_TRUNC This patch would like to support the form 4 of the

[gcc r15-4256] RISC-V: Add testcases for form 5 of scalar signed SAT_TRUNC

https://gcc.gnu.org/g:303b3f5057cdb9acc415ff975eca3d470f0e1daf commit r15-4256-g303b3f5057cdb9acc415ff975eca3d470f0e1daf Author: Pan Li Date: Thu Oct 10 15:35:33 2024 +0800 RISC-V: Add testcases for form 5 of scalar signed SAT_TRUNC Form 5: #define DEF_SAT_S_TRUNC_FMT_5(NT,

[gcc r15-4258] RISC-V: Add testcases for form 7 of scalar signed SAT_TRUNC

https://gcc.gnu.org/g:43e347660f418529f104b67ebce0c5aa332687d7 commit r15-4258-g43e347660f418529f104b67ebce0c5aa332687d7 Author: Pan Li Date: Thu Oct 10 16:08:40 2024 +0800 RISC-V: Add testcases for form 7 of scalar signed SAT_TRUNC Form 7: #define DEF_SAT_S_TRUNC_FMT_7(NT,

[gcc r15-4257] RISC-V: Add testcases for form 6 of scalar signed SAT_TRUNC

https://gcc.gnu.org/g:ffd351ac4968861122a4b1beae75167b1421e715 commit r15-4257-gffd351ac4968861122a4b1beae75167b1421e715 Author: Pan Li Date: Thu Oct 10 15:53:45 2024 +0800 RISC-V: Add testcases for form 6 of scalar signed SAT_TRUNC Form 6: #define DEF_SAT_S_TRUNC_FMT_6(NT,

[gcc r15-4259] RISC-V: Add testcases for form 8 of scalar signed SAT_TRUNC

https://gcc.gnu.org/g:dd2d4b3fd87241dca658b68b4f9eef533b7fad36 commit r15-4259-gdd2d4b3fd87241dca658b68b4f9eef533b7fad36 Author: Pan Li Date: Thu Oct 10 16:24:08 2024 +0800 RISC-V: Add testcases for form 8 of scalar signed SAT_TRUNC Form 8: #define DEF_SAT_S_TRUNC_FMT_8(NT,

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