[gcc r15-9130] RISC-V: Tweak testcase for PIE

https://gcc.gnu.org/g:fe1e8966cb5483c4e77d7d7bbea7acb0c191cff0 commit r15-9130-gfe1e8966cb5483c4e77d7d7bbea7acb0c191cff0 Author: Kito Cheng Date: Tue Apr 1 09:14:51 2025 +0800 RISC-V: Tweak testcase for PIE Linux toolchain may configured with --enable-default-pie, and that will

[gcc r15-9118] RISC-V: testsuite: Fix broken testsuite error of zicbop

https://gcc.gnu.org/g:954708cf02adc01d3af9d7d4a860377e985cc9af commit r15-9118-g954708cf02adc01d3af9d7d4a860377e985cc9af Author: Liao Shihua Date: Mon Mar 31 16:53:27 2025 +0800 RISC-V: testsuite: Fix broken testsuite error of zicbop Fix broken testsuite like "ERROR: gcc.targe

[gcc r15-9116] RISC-V: Fix wrong LMUL when only implict zve32f.

https://gcc.gnu.org/g:28751389a68e131e21fcaf8e3f661d76a2b4d0cc commit r15-9116-g28751389a68e131e21fcaf8e3f661d76a2b4d0cc Author: Monk Chiang Date: Tue Feb 4 15:29:17 2025 +0800 RISC-V: Fix wrong LMUL when only implict zve32f. According to Section 3.4.2, Vector Register Grouping, i

[gcc r14-11546] [RISC-V][PR target/116256] Fix incorrect return value for predicate

https://gcc.gnu.org/g:47b509fef536455d59aeb7b8e97851099c6b29a5 commit r14-11546-g47b509fef536455d59aeb7b8e97851099c6b29a5 Author: Jeff Law Date: Tue Jan 21 06:56:27 2025 -0700 [RISC-V][PR target/116256] Fix incorrect return value for predicate Another bug found while chasing paths

[gcc r14-11639] RISC-V: Fix vec_duplicate[bimode] expander [PR119572].

https://gcc.gnu.org/g:52c1f60bea3f2ec589a694c3a0bf4f1c4666fa5b commit r14-11639-g52c1f60bea3f2ec589a694c3a0bf4f1c4666fa5b Author: Robin Dapp Date: Tue Apr 1 21:17:54 2025 +0200 RISC-V: Fix vec_duplicate[bimode] expander [PR119572]. Since r15-9062-g70391e3958db79 we perform vector

[gcc r14-11640] RISC-V: Put jump table in text for large code model

https://gcc.gnu.org/g:b61acf546e189f619ce93a223b7a2171b3e6baf3 commit r14-11640-gb61acf546e189f619ce93a223b7a2171b3e6baf3 Author: Kito Cheng Date: Mon Apr 14 16:03:07 2025 +0800 RISC-V: Put jump table in text for large code model Large code model assume the data or rodata may put

[gcc r15-9515] riscv: Fix incorrect gnu property alignment on rv32

https://gcc.gnu.org/g:fc4099a4842805f1eb59a666e18f84e309df8cb1 commit r15-9515-gfc4099a4842805f1eb59a666e18f84e309df8cb1 Author: Jesse Huang Date: Thu Apr 10 21:25:21 2025 -0700 riscv: Fix incorrect gnu property alignment on rv32 Codegen is incorrectly emitting a ".p2align 3" that

[gcc r15-9514] RISC-V: Put jump table in text for large code model

https://gcc.gnu.org/g:1d9e02bb7e0af4f3d3eaaa1a0f4961970aba5560 commit r15-9514-g1d9e02bb7e0af4f3d3eaaa1a0f4961970aba5560 Author: Kito Cheng Date: Mon Apr 14 16:03:07 2025 +0800 RISC-V: Put jump table in text for large code model Large code model assume the data or rodata may put f

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