[gcc r16-770] libstdc++: remove two redundant statements in pb_ds binary tree

2025-05-21 Thread Xi Ruoyao via Libstdc++-cvs
https://gcc.gnu.org/g:6740732a659f9bef523f872c633d5477e8dc349c commit r16-770-g6740732a659f9bef523f872c633d5477e8dc349c Author: Xℹ Ruoyao Date: Fri Jul 10 20:10:52 2020 +0800 libstdc++: remove two redundant statements in pb_ds binary tree libstdc++-v3/ChangeLog: *

[gcc r16-771] libstdc++: maintain subtree size in pb_ds binary search trees

2025-05-21 Thread Xi Ruoyao via Libstdc++-cvs
https://gcc.gnu.org/g:2e27df6cbd05a3ee742434b7f50dbff5f363b487 commit r16-771-g2e27df6cbd05a3ee742434b7f50dbff5f363b487 Author: Xℹ Ruoyao Date: Fri Jul 10 20:58:04 2020 +0800 libstdc++: maintain subtree size in pb_ds binary search trees libstdc++-v3/ChangeLog: * i

[gcc r16-772] libstdc++: use maintained size when split pb_ds binary search trees

2025-05-21 Thread Xi Ruoyao via Libstdc++-cvs
https://gcc.gnu.org/g:36c20fee22d40c6d25f52e929b42f5eab62cb1eb commit r16-772-g36c20fee22d40c6d25f52e929b42f5eab62cb1eb Author: Xℹ Ruoyao Date: Fri Jul 10 21:38:09 2020 +0800 libstdc++: use maintained size when split pb_ds binary search trees libstdc++-v3/ChangeLog:

[gcc r16-776] nds32: Avoid accessing beyond the operands[] array

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:a6ec398042c6054cbf2c08b646df98b63a9418d5 commit r16-776-ga6ec398042c6054cbf2c08b646df98b63a9418d5 Author: Richard Sandiford Date: Wed May 21 10:01:26 2025 +0100 nds32: Avoid accessing beyond the operands[] array This pattern used operands[2] to hold the shift

[gcc r16-789] vxworks: libgcc: include string.h for memset

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:99a65bfe59208c33a74718ef5fc05e255a76393a commit r16-789-g99a65bfe59208c33a74718ef5fc05e255a76393a Author: Alexandre Oliva Date: Wed May 21 06:19:46 2025 -0300 vxworks: libgcc: include string.h for memset gthr-vxworks-thread.c calls memset in __ghtread_cond_si

[gcc r16-790] [testsuite] [vxworks] netinet includes atomic, reqs c++11

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:659fe2a28e8cbaf4672d4db8ef3f13c6efed9c0c commit r16-790-g659fe2a28e8cbaf4672d4db8ef3f13c6efed9c0c Author: Alexandre Oliva Date: Wed May 21 06:19:57 2025 -0300 [testsuite] [vxworks] netinet includes atomic, reqs c++11 On vxworks, the included netinet/in.h head

[gcc r16-794] [testsuite] [aarch64] match alt cache clear names in sme nonlocal_goto tests

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:4b75decf5297838ef9ddfb842da0117adbe3f975 commit r16-794-g4b75decf5297838ef9ddfb842da0117adbe3f975 Author: Alexandre Oliva Date: Wed May 21 06:20:22 2025 -0300 [testsuite] [aarch64] match alt cache clear names in sme nonlocal_goto tests vxworks calls cacheText

[gcc r16-795] [testsuite] [x86] double copysign requires -msse2

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:02788cde86264559ca9cb3323c73c72fd0211c5d commit r16-795-g02788cde86264559ca9cb3323c73c72fd0211c5d Author: Alexandre Oliva Date: Wed May 21 06:20:29 2025 -0300 [testsuite] [x86] double copysign requires -msse2 SSE_FLOAT_MODE_P only holds for DFmode with SSE2,

[gcc r16-792] [testsuite] tolerate missing std::stold

2025-05-21 Thread Alexandre Oliva via Libstdc++-cvs
https://gcc.gnu.org/g:207534061fb026585d65af3cf863dc434ec36d7c commit r16-792-g207534061fb026585d65af3cf863dc434ec36d7c Author: Alexandre Oliva Date: Wed May 21 06:20:11 2025 -0300 [testsuite] tolerate missing std::stold basic_string.h doesn't define the non-w string version of st

[gcc r16-791] [testsuite] [analyzer] [vxworks] define __STDC_WANT_LIB_EXT1__ to 1

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:f3c5e0a2091ddd5cae4d7381a847aac5f546f04c commit r16-791-gf3c5e0a2091ddd5cae4d7381a847aac5f546f04c Author: Alexandre Oliva Date: Wed May 21 06:20:03 2025 -0300 [testsuite] [analyzer] [vxworks] define __STDC_WANT_LIB_EXT1__ to 1 vxworks' headers use #if instead

[gcc r16-793] [testsuite] [aarch64] use uint64_t in rwsr tests

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:d41028df8b39087ef71de84a5daf68cb305b9f7f commit r16-793-gd41028df8b39087ef71de84a5daf68cb305b9f7f Author: Alexandre Oliva Date: Wed May 21 06:20:17 2025 -0300 [testsuite] [aarch64] use uint64_t in rwsr tests stdint.h defines uint64_t instead of __uint64_t, so

[gcc r16-797] [testsuite] [x86] strlenopt-80 needs -msse2 on ia32

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:fe9be609d7a10f2cd706aecd772e3e3427868daf commit r16-797-gfe9be609d7a10f2cd706aecd772e3e3427868daf Author: Alexandre Oliva Date: Wed May 21 06:20:37 2025 -0300 [testsuite] [x86] strlenopt-80 needs -msse2 on ia32 The string length optimizations at 8-byte blocks

[gcc r16-800] [testsuite] [x86] no-callee-saved-16.c needs -fomit-frame-pointer

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:012a857d1eb5b45baee8752e3b5a434fa25c52e2 commit r16-800-g012a857d1eb5b45baee8752e3b5a434fa25c52e2 Author: Alexandre Oliva Date: Wed May 21 06:20:54 2025 -0300 [testsuite] [x86] no-callee-saved-16.c needs -fomit-frame-pointer If the toolchain is built with --e

[gcc r16-802] [testsuite] [x86] pr31985.c needs -fomit-frame-pointer to match movl count

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:6621311c309fcc68ecdd395bceb9ad7994bed41f commit r16-802-g6621311c309fcc68ecdd395bceb9ad7994bed41f Author: Alexandre Oliva Date: Wed May 21 06:21:04 2025 -0300 [testsuite] [x86] pr31985.c needs -fomit-frame-pointer to match movl count On an --enable-frame-poin

[gcc r16-801] [testsuite] [x86] pr108938-3.c needs -msse2 for bswap in foo2 with -m32

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:3392849511c9b9eb1d912a547f2441cece766e3b commit r16-801-g3392849511c9b9eb1d912a547f2441cece766e3b Author: Alexandre Oliva Date: Wed May 21 06:20:59 2025 -0300 [testsuite] [x86] pr108938-3.c needs -msse2 for bswap in foo2 with -m32 Without SSE2, we don't combi

[gcc r16-803] [testsuite] [x86] vect-simd-clone-1[678]e.c adjust

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:e82a9f6536ba8fcf50a7172650a86519c50aeabd commit r16-803-ge82a9f6536ba8fcf50a7172650a86519c50aeabd Author: Alexandre Oliva Date: Wed May 21 06:21:08 2025 -0300 [testsuite] [x86] vect-simd-clone-1[678]e.c adjust Since r13-6296, we haven't got 4 simdclone calls

[gcc r16-796] [testsuite] [x86] memcpy-6 needs -msse2

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:f3a758e9a2b2aa40bda68a18157996167d772e4d commit r16-796-gf3a758e9a2b2aa40bda68a18157996167d772e4d Author: Alexandre Oliva Date: Wed May 21 06:20:33 2025 -0300 [testsuite] [x86] memcpy-6 needs -msse2 The 8-byte memory operations will only be inlined on ia32 wi

[gcc r16-798] [testsuite] [x86] forwprop-41 needs -msse

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:8bb72b737c38adb08bfefabc43cb4f25f7d9e95d commit r16-798-g8bb72b737c38adb08bfefabc43cb4f25f7d9e95d Author: Alexandre Oliva Date: Wed May 21 06:20:42 2025 -0300 [testsuite] [x86] forwprop-41 needs -msse The vector operations are only turned into BIT_INSERT_EXPR

[gcc r16-799] [testsuite] add missing require vect_early_break_hw for vect-tsvc

2025-05-21 Thread Alexandre Oliva via Gcc-cvs
https://gcc.gnu.org/g:57cc4f8bf31f8c25fd338b18b5e709d77cc2a0ad commit r16-799-g57cc4f8bf31f8c25fd338b18b5e709d77cc2a0ad Author: Alexandre Oliva Date: Wed May 21 06:20:48 2025 -0300 [testsuite] add missing require vect_early_break_hw for vect-tsvc Some tsvc tests add vect_early_bre

[gcc r16-775] c++, coroutines: Clean up the ramp cleanups.

2025-05-21 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:18df4a10bc96946401218019ec566d867238b3e4 commit r16-775-g18df4a10bc96946401218019ec566d867238b3e4 Author: Iain Sandoe Date: Mon May 12 20:38:48 2025 +0100 c++, coroutines: Clean up the ramp cleanups. This replaces the cleanup try-catch block in the ramp with

[gcc r16-774] c++, coroutines: Use decltype(auto) for the g_r_o.

2025-05-21 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:e71a6e002c6650a7a7be99277120d3e59ecb78a3 commit r16-774-ge71a6e002c6650a7a7be99277120d3e59ecb78a3 Author: Iain Sandoe Date: Sun May 11 20:36:58 2025 +0100 c++, coroutines: Use decltype(auto) for the g_r_o. The revised wording for coroutines, uses decltype(aut

[gcc r16-773] c++, coroutines: Address CWG2563 return value init [PR119916].

2025-05-21 Thread Iain D Sandoe via Gcc-cvs
https://gcc.gnu.org/g:e06555a40c051d5062405b02f93b89b01a397f97 commit r16-773-ge06555a40c051d5062405b02f93b89b01a397f97 Author: Iain Sandoe Date: Mon May 12 19:47:42 2025 +0100 c++, coroutines: Address CWG2563 return value init [PR119916]. This addresses the clarification that, wh

[gcc r16-779] genemit: Use references rather than pointers

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:9b57e38e0ef26192ebb0e9e326ab3a9df06ee275 commit r16-779-g9b57e38e0ef26192ebb0e9e326ab3a9df06ee275 Author: Richard Sandiford Date: Wed May 21 10:01:27 2025 +0100 genemit: Use references rather than pointers This patch makes genemit.cc pass the md_rtx_info arou

[gcc r16-777] xstormy16: Avoid accessing beyond the operands[] array

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:856f6de5d19257e3c5802a250e7c749ca44beee3 commit r16-777-g856f6de5d19257e3c5802a250e7c749ca44beee3 Author: Richard Sandiford Date: Wed May 21 10:01:26 2025 +0100 xstormy16: Avoid accessing beyond the operands[] array The negsi2 C++ code writes to operands[2] e

[gcc r16-788] genemit: Use a byte encoding to generate insns

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:d63c889d5cd3ef00ec5b0c3389448eab4f7d2b68 commit r16-788-gd63c889d5cd3ef00ec5b0c3389448eab4f7d2b68 Author: Richard Sandiford Date: Wed May 21 10:01:32 2025 +0100 genemit: Use a byte encoding to generate insns genemit has traditionally used open-coded gen_rtx_F

[gcc r16-778] sparc: Avoid operandN variables in .md files

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:35dd60935336eb574194f2fe2088133f34c8 commit r16-778-g35dd60935336eb574194f2fe2088133f34c8 Author: Richard Sandiford Date: Wed May 21 10:01:27 2025 +0100 sparc: Avoid operandN variables in .md files The automatically-generated gen_* routines take their

[gcc r16-783] genemit: Add a generator struct

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:88b849ffb9fc4b6de3786784b4c4b074758cc2a1 commit r16-783-g88b849ffb9fc4b6de3786784b4c4b074758cc2a1 Author: Richard Sandiford Date: Wed May 21 10:01:29 2025 +0100 genemit: Add a generator struct gen_exp now has quite a few arguments that need to be passed t

[gcc r16-785] genemit: Remove purported handling of location_ts

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:efbc8de515c71c27e881d425f8325e39f7b4f328 commit r16-785-gefbc8de515c71c27e881d425f8325e39f7b4f328 Author: Richard Sandiford Date: Wed May 21 10:01:30 2025 +0100 genemit: Remove purported handling of location_ts gen_exp had code to handle the 'L' operand forma

[gcc r16-786] genemit: Remove support for string operands

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:97d2686decc34400e585bbc725602757c91e3fbf commit r16-786-g97d2686decc34400e585bbc725602757c91e3fbf Author: Richard Sandiford Date: Wed May 21 10:01:31 2025 +0100 genemit: Remove support for string operands gen_exp currently supports the 's' (string) operand ty

[gcc r16-787] genemit: Avoid using gen_exp in output_add_clobbers

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:aca0cf1150d6f6be9ee451b5f91f505aef911f8e commit r16-787-gaca0cf1150d6f6be9ee451b5f91f505aef911f8e Author: Richard Sandiford Date: Wed May 21 10:01:31 2025 +0100 genemit: Avoid using gen_exp in output_add_clobbers output_add_clobbers emits code to add:

[gcc r16-784] genemit: Always track multiple uses of operands

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:8ebe8f5eff9fda40f22b9df7a0b8a6c2fdf5f8d7 commit r16-784-g8ebe8f5eff9fda40f22b9df7a0b8a6c2fdf5f8d7 Author: Richard Sandiford Date: Wed May 21 10:01:30 2025 +0100 genemit: Always track multiple uses of operands gen_exp has code to detect when the same operand i

[gcc r16-780] genemit: Add an internal queue

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:4fafb14e1f2ea068f2eb1a29ffb54d9984ab154d commit r16-780-g4fafb14e1f2ea068f2eb1a29ffb54d9984ab154d Author: Richard Sandiford Date: Wed May 21 10:01:28 2025 +0100 genemit: Add an internal queue An earlier version of this series wanted to collect information

[gcc r16-782] genemit: Consistently use operand arrays in gen_* functions

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:02c3910f75ddae52dd59775bf9a6c4452bbdd0ac commit r16-782-g02c3910f75ddae52dd59775bf9a6c4452bbdd0ac Author: Richard Sandiford Date: Wed May 21 10:01:29 2025 +0100 genemit: Consistently use operand arrays in gen_* functions One slightly awkward part about emitti

[gcc r16-781] genemit: Factor out code common to insns and expands

2025-05-21 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:5355568c75a99fc621e2008fa98626ad811678c5 commit r16-781-g5355568c75a99fc621e2008fa98626ad811678c5 Author: Richard Sandiford Date: Wed May 21 10:01:28 2025 +0100 genemit: Factor out code common to insns and expands Mostly to reduce cut-&-paste. gcc/

[gcc r16-807] [RISC-V][PR target/120368] Fix 32bit shift on rv64

2025-05-21 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:8459c546197dc9178d250994db021b36405f1bd6 commit r16-807-g8459c546197dc9178d250994db021b36405f1bd6 Author: Jeff Law Date: Wed May 21 14:15:23 2025 -0600 [RISC-V][PR target/120368] Fix 32bit shift on rv64 So a followup to last week's bugfix. In last week's cha

[gcc r16-810] [PATCH] configure: Always add pre-installed header directories to search path

2025-05-21 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:dff727b2c28c52e90e0bd61957d15f907494b245 commit r16-810-gdff727b2c28c52e90e0bd61957d15f907494b245 Author: Stephanos Ioannidis Date: Wed May 21 17:28:36 2025 -0600 [PATCH] configure: Always add pre-installed header directories to search path configure script

[gcc(refs/users/meissner/heads/work206-bugs)] Fix PR 118541, do not generate unordered fp cmoves for IEEE compares.

2025-05-21 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:d88170074249387a79537291b3548cb115712d86 commit d88170074249387a79537291b3548cb115712d86 Author: Michael Meissner Date: Wed May 21 20:03:02 2025 -0400 Fix PR 118541, do not generate unordered fp cmoves for IEEE compares. In bug PR target/118541 on power9, pow

[gcc r16-811] aarch64: Carry over zeroness in aarch64_evpc_reencode

2025-05-21 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:84c6988c026114727693cd7cd74b8cd5cdcdeb74 commit r16-811-g84c6988c026114727693cd7cd74b8cd5cdcdeb74 Author: Pengxuan Zheng Date: Tue May 20 17:58:23 2025 -0700 aarch64: Carry over zeroness in aarch64_evpc_reencode There was a bug in aarch64_evpc_reencode which

[gcc(refs/users/meissner/heads/work206-bugs)] Update ChangeLog.*

2025-05-21 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:cec29adfc6dea03c04e6c6f6c1a3a70ed1c500c4 commit cec29adfc6dea03c04e6c6f6c1a3a70ed1c500c4 Author: Michael Meissner Date: Wed May 21 20:04:35 2025 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.bugs | 30 -- 1 file changed, 20 insertions(

[gcc(refs/users/meissner/heads/work206-bugs)] Revert changes

2025-05-21 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:6ac181184da7d2c0bf54646434b253d46d33b86c commit 6ac181184da7d2c0bf54646434b253d46d33b86c Author: Michael Meissner Date: Wed May 21 15:29:23 2025 -0400 Revert changes Diff: --- gcc/config/rs6000/predicates.md | 6 ++ gcc/config/rs6000/rs6000.h

[gcc(refs/users/meissner/heads/work206-bugs)] Fix PR 118541, do not generate unordered fp cmoves for IEEE compares.

2025-05-21 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:33d453d937554d8d93861541ea8926647a674ea8 commit 33d453d937554d8d93861541ea8926647a674ea8 Author: Michael Meissner Date: Wed May 21 14:01:38 2025 -0400 Fix PR 118541, do not generate unordered fp cmoves for IEEE compares. In bug PR target/118541 on power9, pow

[gcc(refs/users/meissner/heads/work206-bugs)] Update ChangeLog.*

2025-05-21 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:86eb8563626948a0bc690c1a61907bf75fb0b940 commit 86eb8563626948a0bc690c1a61907bf75fb0b940 Author: Michael Meissner Date: Wed May 21 14:03:12 2025 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.bugs | 42 ++ 1 file changed, 22

[gcc r16-814] [PATCH] testsuite: RISC-V: Update the cset-sext-sfb/zba-slliuw test optimization level.

2025-05-21 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:d8636b05c559e6f060e16652bb10c59d9fb0fb54 commit r16-814-gd8636b05c559e6f060e16652bb10c59d9fb0fb54 Author: Dongyan Chen Date: Wed May 21 21:46:52 2025 -0600 [PATCH] testsuite: RISC-V: Update the cset-sext-sfb/zba-slliuw test optimization level. Failed testcas

[gcc r16-808] [RISC-V] Improve (x << C1) + C2 split code

2025-05-21 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:0bed343a2a640c7be4a1970d303098ccf62bd1c6 commit r16-808-g0bed343a2a640c7be4a1970d303098ccf62bd1c6 Author: Jeff Law Date: Wed May 21 16:04:58 2025 -0600 [RISC-V] Improve (x << C1) + C2 split code I wrote this a couple months ago to fix an instruction count reg

[gcc r16-809] combine: gen_lowpart_no_emit vs CLOBBER [PR120090]

2025-05-21 Thread Andrew Pinski via Gcc-cvs
https://gcc.gnu.org/g:f725d6765373f7884a2ea23bc11409b15545958b commit r16-809-gf725d6765373f7884a2ea23bc11409b15545958b Author: Andrew Pinski Date: Mon May 5 09:46:14 2025 -0700 combine: gen_lowpart_no_emit vs CLOBBER [PR120090] The problem here is simplify-rtx.cc expects gen_lowp

[gcc r16-813] [RISC-V] Clear high or low bits using shift pairs

2025-05-21 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:b3c778e858497f2b7f37fa8a3101854361c025da commit r16-813-gb3c778e858497f2b7f37fa8a3101854361c025da Author: Shreya Munnangi Date: Wed May 21 18:49:14 2025 -0600 [RISC-V] Clear high or low bits using shift pairs So the first special case of clearing bits from Sh

[gcc(refs/users/meissner/heads/work206-bugs)] Revert changes

2025-05-21 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:b3b14d8bec72de46bf0721e367756d13b1b3044f commit b3b14d8bec72de46bf0721e367756d13b1b3044f Author: Michael Meissner Date: Wed May 21 10:44:41 2025 -0400 Revert changes Diff: --- gcc/config/rs6000/predicates.md | 10 +- gcc/config/rs6000/rs6000-protos.h

[gcc(refs/vendors/redhat/heads/gcc-15-branch)] Merge commit 'r15-9719-g7e580225e57086e335a16f9258d0401a21e468ef' into redhat/gcc-15-branch

2025-05-21 Thread Jakub Jelinek via Libstdc++-cvs
https://gcc.gnu.org/g:b9def1721b12cae307c1a1ebc49030fce6531dfa commit b9def1721b12cae307c1a1ebc49030fce6531dfa Merge: ac84ab706662 7e580225e570 Author: Jakub Jelinek Date: Wed May 21 14:40:58 2025 +0200 Merge commit 'r15-9719-g7e580225e57086e335a16f9258d0401a21e468ef' into redhat/gcc-15-b

[gcc/redhat/heads/gcc-15-branch] (133 commits) Merge commit 'r15-9719-g7e580225e57086e335a16f9258d0401a21e

2025-05-21 Thread Jakub Jelinek via Gcc-cvs
The branch 'redhat/heads/gcc-15-branch' was updated to point to: b9def1721b12... Merge commit 'r15-9719-g7e580225e57086e335a16f9258d0401a21e It previously pointed to: ac84ab706662... Merge commit 'r15-9587-ga36dd9ee5bb1d2f2f19b8d935db29468a35 Diff: Summary of changes (added commits): ---

[gcc r16-806] RISC-V: Add test for vec_duplicate + vand.vv combine case 1 with GR2VR cost 0, 1 and 2

2025-05-21 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:4f02bfb62da3a0e32a86cc2ac1171b11da026e7c commit r16-806-g4f02bfb62da3a0e32a86cc2ac1171b11da026e7c Author: Pan Li Date: Tue May 20 22:30:04 2025 +0800 RISC-V: Add test for vec_duplicate + vand.vv combine case 1 with GR2VR cost 0, 1 and 2 Add asm dump check te

[gcc r16-804] RISC-V: RISC-V: Combine vec_duplicate + vand.vv to vand.vx on GR2VR cost

2025-05-21 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:ad041944f1060be0c9280421a065037aa14e169e commit r16-804-gad041944f1060be0c9280421a065037aa14e169e Author: Pan Li Date: Tue May 20 15:00:15 2025 +0800 RISC-V: RISC-V: Combine vec_duplicate + vand.vv to vand.vx on GR2VR cost This patch would like to combine the

[gcc r16-805] RISC-V: Add test for vec_duplicate + vand.vv combine case 0 with GR2VR cost 0, 2 and 15

2025-05-21 Thread Pan Li via Gcc-cvs
https://gcc.gnu.org/g:b7b914622e8da0d5f10027d9a4db418f21ed2ddc commit r16-805-gb7b914622e8da0d5f10027d9a4db418f21ed2ddc Author: Pan Li Date: Tue May 20 15:06:34 2025 +0800 RISC-V: Add test for vec_duplicate + vand.vv combine case 0 with GR2VR cost 0, 2 and 15 Add asm dump check t