[gcc r16-510] [PATCH v2] RISC-V: Use vclmul for CRC expansion if available

2025-05-10 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:ab6e2d9f6f26a97e24f64a79eccbcb82b9317f82 commit r16-510-gab6e2d9f6f26a97e24f64a79eccbcb82b9317f82 Author: Anton Blanchard Date: Sat May 10 07:07:39 2025 -0600 [PATCH v2] RISC-V: Use vclmul for CRC expansion if available If the vector version of clmul (vclmul)

[gcc r15-9648] testsuite: Fix pr119131-1.c for targets which emit a psabi warning for vectors of DFP [PR119909]

2025-05-10 Thread Andrew Pinski via Gcc-cvs
https://gcc.gnu.org/g:de014484f013225bc32bc6eeb11e44038925ae1b commit r15-9648-gde014484f013225bc32bc6eeb11e44038925ae1b Author: Andrew Pinski Date: Sat May 10 17:13:05 2025 -0700 testsuite: Fix pr119131-1.c for targets which emit a psabi warning for vectors of DFP [PR119909] On

[gcc r16-522] testsuite: Fix pr119131-1.c for targets which emit a psabi warning for vectors of DFP [PR119909]

2025-05-10 Thread Andrew Pinski via Gcc-cvs
https://gcc.gnu.org/g:bfb61bf309ed207694a97adabc454bfd0936b269 commit r16-522-gbfb61bf309ed207694a97adabc454bfd0936b269 Author: Andrew Pinski Date: Sat May 10 17:13:05 2025 -0700 testsuite: Fix pr119131-1.c for targets which emit a psabi warning for vectors of DFP [PR119909] On P

[gcc r15-9650] Fix PR 119928, formal arguments used to wrongly inferred for CLASS.

2025-05-10 Thread Thomas Koenig via Gcc-cvs
https://gcc.gnu.org/g:7b38bab21a126512c17c8084ad78b6bf75fc1437 commit r15-9650-g7b38bab21a126512c17c8084ad78b6bf75fc1437 Author: Thomas Koenig Date: Tue May 6 18:05:41 2025 +0200 Fix PR 119928, formal arguments used to wrongly inferred for CLASS. The problem was indeed that genera

[gcc r16-525] Do not generate formal arglist from actual if we have already resolved it.

2025-05-10 Thread Thomas Koenig via Gcc-cvs
https://gcc.gnu.org/g:004bf889e0b1b96ae50f93339104d3602a88deb5 commit r16-525-g004bf889e0b1b96ae50f93339104d3602a88deb5 Author: Thomas Koenig Date: Sun May 11 07:40:23 2025 +0200 Do not generate formal arglist from actual if we have already resolved it. This bug was another case o

[gcc r16-514] testsuite: Disable bit tests in aarch64/pr99988.c

2025-05-10 Thread Filip Kastl via Gcc-cvs
https://gcc.gnu.org/g:afaed441b5b096376afd15cb58c9a8a567fecdcf commit r16-514-gafaed441b5b096376afd15cb58c9a8a567fecdcf Author: Filip Kastl Date: Sat May 10 18:30:23 2025 +0200 testsuite: Disable bit tests in aarch64/pr99988.c My recent changes to bit-test switch lowering broke pr

[gcc r16-515] fortran: fix simple typo in libgfortran

2025-05-10 Thread Tobias Burnus via Gcc-cvs
https://gcc.gnu.org/g:5d9e66493afaa9b0450f03b53f0cb99afb411816 commit r16-515-g5d9e66493afaa9b0450f03b53f0cb99afb411816 Author: Yuao Ma Date: Sat May 10 19:04:12 2025 +0200 fortran: fix simple typo in libgfortran This patch fix a simple typo in the comment of libgfortran. No u

[gcc r16-513] gimple: Don't assert that switch has nondefault cases during lowering [PR120080]

2025-05-10 Thread Filip Kastl via Gcc-cvs
https://gcc.gnu.org/g:358a5aedf2b5b61f4edfc7964144355a4897dbb9 commit r16-513-g358a5aedf2b5b61f4edfc7964144355a4897dbb9 Author: Filip Kastl Date: Sat May 10 16:18:33 2025 +0200 gimple: Don't assert that switch has nondefault cases during lowering [PR120080] I have mistakenly assu

[gcc r16-517] i386: Fix some problems in stv cost model

2025-05-10 Thread Jan Hubicka via Gcc-cvs
https://gcc.gnu.org/g:993aa0bd28722c7f01fb8310f1c79814aef217ed commit r16-517-g993aa0bd28722c7f01fb8310f1c79814aef217ed Author: Jan Hubicka Date: Sat May 10 22:23:48 2025 +0200 i386: Fix some problems in stv cost model this patch fixes some of problems with cosint in scalar to vec

[gcc r16-518] Fortran: fix passing of inquiry ref of complex array to TRANSFER [PR102891]

2025-05-10 Thread Harald Anlauf via Gcc-cvs
https://gcc.gnu.org/g:94fa992b60e53dcf807fc7055ab606d828b931d8 commit r16-518-g94fa992b60e53dcf807fc7055ab606d828b931d8 Author: Harald Anlauf Date: Tue May 6 20:59:48 2025 +0200 Fortran: fix passing of inquiry ref of complex array to TRANSFER [PR102891] PR fortran/102891

[gcc r16-511] i386/cygming: Decrease default preferred stack boundary for 32-bit targets

2025-05-10 Thread Jonathan Yong via Gcc-cvs
https://gcc.gnu.org/g:ee7c0a5b70dc316477f45abc0f09dd2af9abe5cb commit r16-511-gee7c0a5b70dc316477f45abc0f09dd2af9abe5cb Author: LIU Hao Date: Tue Apr 29 10:43:06 2025 +0800 i386/cygming: Decrease default preferred stack boundary for 32-bit targets This commit decreases the default

[gcc r16-512] [V2][RISC-V] Synthesize more efficient IOR/XOR sequences

2025-05-10 Thread Jeff Law via Gcc-cvs
https://gcc.gnu.org/g:36daa0da95fba18d0d4eb4e10fa07ac3b76fa426 commit r16-512-g36daa0da95fba18d0d4eb4e10fa07ac3b76fa426 Author: Shreya Munnangi Date: Sat May 10 07:18:33 2025 -0600 [V2][RISC-V] Synthesize more efficient IOR/XOR sequences So mvconst_internal's primary benefit is in

[gcc r16-516] fortran: Fix debug info for unsigned(kind=1) and unsigned(kind=4) [PR120193]

2025-05-10 Thread Jakub Jelinek via Gcc-cvs
https://gcc.gnu.org/g:512371d786e70d27dbaef38d60e9036c11f458c6 commit r16-516-g512371d786e70d27dbaef38d60e9036c11f458c6 Author: Jakub Jelinek Date: Sat May 10 21:20:09 2025 +0200 fortran: Fix debug info for unsigned(kind=1) and unsigned(kind=4) [PR120193] As the following testcase

[gcc r16-519] x86: Change dest to src in replace_vector_const

2025-05-10 Thread H.J. Lu via Gcc-cvs
https://gcc.gnu.org/g:ba9d228a92057d3b839e7ea32b12c93fcfc5ff1e commit r16-519-gba9d228a92057d3b839e7ea32b12c93fcfc5ff1e Author: H.J. Lu Date: Sun May 11 06:17:45 2025 +0800 x86: Change dest to src in replace_vector_const Replace rtx dest = SET_SRC (set); with

[gcc r16-523] RISC-V: Support RISC-V Profiles 20/22.

2025-05-10 Thread Jiawei Chen via Gcc-cvs
https://gcc.gnu.org/g:43b450e3f72a53c744e77f55393962f1d349373a commit r16-523-g43b450e3f72a53c744e77f55393962f1d349373a Author: Jiawei Date: Sat May 10 20:25:52 2025 +0800 RISC-V: Support RISC-V Profiles 20/22. This patch introduces support for RISC-V Profiles RV20 and RV22 [1],

[gcc r16-524] RISC-V: Support RISC-V Profiles 23.

2025-05-10 Thread Jiawei Chen via Gcc-cvs
https://gcc.gnu.org/g:66d17ba3cb47980455ee9d6b4123dce61aef2fa2 commit r16-524-g66d17ba3cb47980455ee9d6b4123dce61aef2fa2 Author: Jiawei Date: Sat May 10 19:26:35 2025 +0800 RISC-V: Support RISC-V Profiles 23. This patch introduces support for RISC-V Profiles RV23A and RV23B [1],