[gcc r15-6098] aarch64: Extend SVE2 bit-select instructions for Neon modes.

https://gcc.gnu.org/g:65b7c8db9c61bcdfd07a3404047dd2d2beac4bbb commit r15-6098-g65b7c8db9c61bcdfd07a3404047dd2d2beac4bbb Author: Soumya AR Date: Wed Dec 11 09:32:35 2024 +0530 aarch64: Extend SVE2 bit-select instructions for Neon modes. NBSL, BSL1N, and BSL2N are bit-select intruc

[gcc r15-6099] aarch64: Use SVE ASRD instruction with Neon modes.

https://gcc.gnu.org/g:e5569a20cf3791553ac324269001a7c7c0e56242 commit r15-6099-ge5569a20cf3791553ac324269001a7c7c0e56242 Author: Soumya AR Date: Wed Dec 11 09:45:09 2024 +0530 aarch64: Use SVE ASRD instruction with Neon modes. The ASRD instruction on SVE performs an arithmetic shi

[gcc r15-6078] Remove vcond{,u,eq} optabs

https://gcc.gnu.org/g:d24316413cbe9e2f3098f57e88a3c733c115e0ed commit r15-6078-gd24316413cbe9e2f3098f57e88a3c733c115e0ed Author: Richard Sandiford Date: Tue Dec 10 14:22:28 2024 + Remove vcond{,u,eq} optabs This patch removes the remaining traces of the vcond{,u,eq} optabs.

[gcc r15-6084] c++: Implement a coroutine language debug dump

https://gcc.gnu.org/g:fcdc0d8963adfa99315a7895b5685ac102182cdf commit r15-6084-gfcdc0d8963adfa99315a7895b5685ac102182cdf Author: Arsen Arsenović Date: Thu Sep 5 19:53:07 2024 +0200 c++: Implement a coroutine language debug dump This provides to people working on coroutines, as wel

[gcc r15-6075] aarch64: Add support for fp8dot2 and fp8dot4

https://gcc.gnu.org/g:c88c7d345c26724ace5f69c0ce1895b57154ced2 commit r15-6075-gc88c7d345c26724ace5f69c0ce1895b57154ced2 Author: Saurabh Jha Date: Tue Dec 10 13:21:20 2024 + aarch64: Add support for fp8dot2 and fp8dot4 The AArch64 FEAT_FP8DOT2 and FEAT_FP8DOT4 extension introd

[gcc r15-6089] c++: ICE with -Wduplicated-branches in template [PR117880]

https://gcc.gnu.org/g:d26c166001d6a5bdfd94be6e6d17135669ed340b commit r15-6089-gd26c166001d6a5bdfd94be6e6d17135669ed340b Author: Marek Polacek Date: Mon Dec 9 15:36:25 2024 -0500 c++: ICE with -Wduplicated-branches in template [PR117880] In a template, for things like void() we'll

[gcc r15-6090] Fortran: Fix READ with padding in BLANK ZERO mode.

https://gcc.gnu.org/g:cf406a6c79ce404c45f99bcf2df3293269dbb462 commit r15-6090-gcf406a6c79ce404c45f99bcf2df3293269dbb462 Author: Jerry DeLisle Date: Mon Dec 9 20:11:23 2024 -0800 Fortran: Fix READ with padding in BLANK ZERO mode. PR fortran/117819 libgfortran/Chan

[gcc r15-6093] PR modula2/117120: case ch with a nul char constant causes ICE

https://gcc.gnu.org/g:e0ab8816ea53e2a343f7e945f4718172bff5ce95 commit r15-6093-ge0ab8816ea53e2a343f7e945f4718172bff5ce95 Author: Gaius Mulley Date: Tue Dec 10 20:47:36 2024 + PR modula2/117120: case ch with a nul char constant causes ICE This patch fixes the ICE caused when a

[gcc/ibm/heads/mmaplus] (1192 commits) Update ChangeLog.*

The branch 'ibm/heads/mmaplus' was updated to point to: b0534a239f4e... Update ChangeLog.* It previously pointed to: 3b2b644646c7... Update ChangeLog.* Diff: !!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST): --

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add support for dense math registers.

https://gcc.gnu.org/g:e3507bcba8da515736267a70c3dfb5fac05463c4 commit e3507bcba8da515736267a70c3dfb5fac05463c4 Author: Michael Meissner Date: Tue Oct 22 16:56:10 2024 -0400 RFC2653-Add support for dense math registers. The MMA subsystem added the notion of accumulator registers as

[gcc(refs/vendors/ibm/heads/mmaplus)] Revert changes

https://gcc.gnu.org/g:789030a88dc752b80277f1868d94cb8e4e82d481 commit 789030a88dc752b80277f1868d94cb8e4e82d481 Author: Michael Meissner Date: Tue Oct 22 17:51:04 2024 -0400 Revert changes Diff: --- gcc/config/rs6000/altivec.md | 14 gcc/config/rs6000/constraint

[gcc(refs/vendors/ibm/heads/mmaplus)] Do not allow -mvsx to boost processor to power7.

https://gcc.gnu.org/g:8b38dc4e1d3d1794cdc9436f5ad392c8d5442912 commit 8b38dc4e1d3d1794cdc9436f5ad392c8d5442912 Author: Michael Meissner Date: Tue Oct 22 16:42:11 2024 -0400 Do not allow -mvsx to boost processor to power7. This patch restructures the code so that -mvsx for example

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_POPCNTD to TARGET_POWER7

https://gcc.gnu.org/g:f986a6097fcffd83d871946d8c479d0ee398baea commit f986a6097fcffd83d871946d8c479d0ee398baea Author: Michael Meissner Date: Tue Oct 22 16:50:48 2024 -0400 Change TARGET_POPCNTD to TARGET_POWER7 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Use vector pair load/store for memcpy with -mcpu=future

https://gcc.gnu.org/g:898e330bd7d50a0cb630d3b206561e4d54877a2b commit 898e330bd7d50a0cb630d3b206561e4d54877a2b Author: Michael Meissner Date: Tue Oct 22 16:54:35 2024 -0400 Use vector pair load/store for memcpy with -mcpu=future In the development for the power10 processor, GCC di

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2656-Support load/store vector with right length.

https://gcc.gnu.org/g:6f039c1f5c4b0b7bfc765c355a9a1b9152500a56 commit 6f039c1f5c4b0b7bfc765c355a9a1b9152500a56 Author: Michael Meissner Date: Tue Oct 22 16:59:43 2024 -0400 RFC2656-Support load/store vector with right length. This patch adds support for new instructions that may b

[gcc(refs/vendors/ibm/heads/mmaplus)] Update tests to work with architecture flags changes.

https://gcc.gnu.org/g:4a8a2d079162111f3cfbf7c5147e5554f97a5113 commit 4a8a2d079162111f3cfbf7c5147e5554f97a5113 Author: Michael Meissner Date: Tue Oct 22 16:52:24 2024 -0400 Update tests to work with architecture flags changes. Two tests used -mvsx to raise the processor level to a

[gcc(refs/vendors/ibm/heads/mmaplus)] Use architecture flags for defining _ARCH_PWR macros.

https://gcc.gnu.org/g:9597f840febcc4820270023c5d843e5a0a051587 commit 9597f840febcc4820270023c5d843e5a0a051587 Author: Michael Meissner Date: Tue Oct 22 16:41:09 2024 -0400 Use architecture flags for defining _ARCH_PWR macros. For the newer architectures, this patch changes GCC to

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add wD constraint.

https://gcc.gnu.org/g:af1a75250d8b9e9c2170c579e6127368e22d2282 commit af1a75250d8b9e9c2170c579e6127368e22d2282 Author: Michael Meissner Date: Tue Oct 22 16:55:18 2024 -0400 RFC2653-Add wD constraint. This patch adds a new constraint ('wD') that matches the accumulator registers

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_MODULO to TARGET_POWER9

https://gcc.gnu.org/g:e493980945dc9b1e6b52fb6a02dfd05d97d9c4fc commit e493980945dc9b1e6b52fb6a02dfd05d97d9c4fc Author: Michael Meissner Date: Tue Oct 22 16:51:43 2024 -0400 Change TARGET_MODULO to TARGET_POWER9 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-PowerPC: Switch to dense math names for all MMA operations.

https://gcc.gnu.org/g:e9de88cf40fd3e61cb824384e1b1780d39f89ebe commit e9de88cf40fd3e61cb824384e1b1780d39f89ebe Author: Michael Meissner Date: Tue Oct 22 16:57:05 2024 -0400 RFC2653-PowerPC: Switch to dense math names for all MMA operations. This patch changes the assembler instruc

[gcc(refs/vendors/ibm/heads/mmaplus)] Add rs6000 architecture masks.

https://gcc.gnu.org/g:f596a7323701b001d9bbf1a8f3cf06b6d75669e0 commit f596a7323701b001d9bbf1a8f3cf06b6d75669e0 Author: Michael Meissner Date: Tue Oct 22 16:40:13 2024 -0400 Add rs6000 architecture masks. This patch begins the journey to move architecture bits that are not user IS

[gcc(refs/vendors/ibm/heads/mmaplus)] Add -mcpu=future tuning support.

https://gcc.gnu.org/g:7b173d32ded5d88d6f4973b167c6304b60453492 commit 7b173d32ded5d88d6f4973b167c6304b60453492 Author: Michael Meissner Date: Tue Oct 22 16:53:40 2024 -0400 Add -mcpu=future tuning support. This patch makes -mtune=future use the same tuning decision as -mtune=powe

[gcc(refs/vendors/ibm/heads/mmaplus)] Add support for -mcpu=future

https://gcc.gnu.org/g:99ed71cbb0b2d61153e2bac086e226d85db219fa commit 99ed71cbb0b2d61153e2bac086e226d85db219fa Author: Michael Meissner Date: Tue Oct 22 16:53:04 2024 -0400 Add support for -mcpu=future This patch adds the support that can be used in developing GCC support for

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_POPCNTB to TARGET_POWER5

https://gcc.gnu.org/g:c535ab073031bb3c9e512c635bcbc0c099e59485 commit c535ab073031bb3c9e512c635bcbc0c099e59485 Author: Michael Meissner Date: Tue Oct 22 16:48:20 2024 -0400 Change TARGET_POPCNTB to TARGET_POWER5 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_CMPB to TARGET_POWER6

https://gcc.gnu.org/g:9a17bb6964e3b15bc596d8f06d38e125fbb8948d commit 9a17bb6964e3b15bc596d8f06d38e125fbb8948d Author: Michael Meissner Date: Tue Oct 22 16:49:52 2024 -0400 Change TARGET_CMPB to TARGET_POWER6 As part of the architecture flags patches, this patch changes the use of

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_FPRND to TARGET_POWER5X

https://gcc.gnu.org/g:25d8c2792e5e8ebf00b6d6a9295ad9e051895c6c commit 25d8c2792e5e8ebf00b6d6a9295ad9e051895c6c Author: Michael Meissner Date: Tue Oct 22 16:48:59 2024 -0400 Change TARGET_FPRND to TARGET_POWER5X As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2686-Add paddis support.

https://gcc.gnu.org/g:aa6348c986600150bc32069cf1e07a608f378068 commit aa6348c986600150bc32069cf1e07a608f378068 Author: Michael Meissner Date: Tue Oct 22 17:01:20 2024 -0400 RFC2686-Add paddis support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/co

[gcc(refs/vendors/ibm/heads/mmaplus)] Set default name to power8 if no --with-cpu.

https://gcc.gnu.org/g:57af3f6b604772d371328520b972755fed590704 commit 57af3f6b604772d371328520b972755fed590704 Author: Michael Meissner Date: Wed Nov 6 16:52:07 2024 -0500 Set default name to power8 if no --with-cpu. 2024-11-06 Michael Meissner gcc/ *

[gcc(refs/vendors/ibm/heads/mmaplus)] Add ChangeLog.dmf and update REVISION.

https://gcc.gnu.org/g:899fe7e3026fef4d0a4e9fdc517bdaea67e156e8 commit 899fe7e3026fef4d0a4e9fdc517bdaea67e156e8 Author: Michael Meissner Date: Tue Oct 22 16:38:02 2024 -0400 Add ChangeLog.dmf and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc r15-6095] sarif-replay: fix missing URLs [PR117944]

https://gcc.gnu.org/g:f102b82d3da6dd4d5f9af1cd622fce93d0c494eb commit r15-6095-gf102b82d3da6dd4d5f9af1cd622fce93d0c494eb Author: David Malcolm Date: Tue Dec 10 18:31:24 2024 -0500 sarif-replay: fix missing URLs [PR117944] gcc/ChangeLog: PR other/117944 * li

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2655-Add saturating subtract built-ins.

https://gcc.gnu.org/g:92ab335ad4356e4c383a77fb2ab24bf60aefc44c commit 92ab335ad4356e4c383a77fb2ab24bf60aefc44c Author: Michael Meissner Date: Tue Oct 22 17:00:35 2024 -0400 RFC2655-Add saturating subtract built-ins. This patch adds support for a saturating subtract built-in functi

[gcc(refs/vendors/ibm/heads/mmaplus)] Update ChangeLog.*

https://gcc.gnu.org/g:b0534a239f4e7cd1e7e19b16eeca2d6dba49b57a commit b0534a239f4e7cd1e7e19b16eeca2d6dba49b57a Author: Michael Meissner Date: Wed Nov 6 16:54:27 2024 -0500 Update ChangeLog.* Diff: --- gcc/ChangeLog.mmaplus | 13 + 1 file changed, 13 insertions(+) diff --git

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2677-Add xvrlw support.

https://gcc.gnu.org/g:12dc932b4ea19c1e6bb6d5dff6c4f6ea9f3f5e09 commit 12dc932b4ea19c1e6bb6d5dff6c4f6ea9f3f5e09 Author: Michael Meissner Date: Tue Oct 22 17:02:33 2024 -0400 RFC2677-Add xvrlw support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/alt

[gcc(refs/users/mikael/heads/refactor_descriptor_v02)] Mise à jour class_allocatable_14

https://gcc.gnu.org/g:8606cd4157647d6859c6aaf99796894e2524e439 commit 8606cd4157647d6859c6aaf99796894e2524e439 Author: Mikael Morin Date: Tue Dec 10 21:48:16 2024 +0100 Mise à jour class_allocatable_14 Diff: --- gcc/testsuite/gfortran.dg/class_allocate_14.f90 | 2 +- 1 file changed, 1 in

[gcc r15-6094] contrib: add 'libgdiagnostics' and 'sarif-replay' to bug_components

https://gcc.gnu.org/g:5fba71a88f3826ffbdd7fab0116b154b1af22ace commit r15-6094-g5fba71a88f3826ffbdd7fab0116b154b1af22ace Author: David Malcolm Date: Tue Dec 10 17:36:30 2024 -0500 contrib: add 'libgdiagnostics' and 'sarif-replay' to bug_components contrib/ChangeLog: *

[gcc(refs/users/mikael/heads/refactor_descriptor_v02)] Correction assertions

https://gcc.gnu.org/g:6dde8e01ba25432fd6719a47495e0cee5da55e12 commit 6dde8e01ba25432fd6719a47495e0cee5da55e12 Author: Mikael Morin Date: Tue Dec 10 20:40:56 2024 +0100 Correction assertions Diff: --- gcc/fortran/trans-array.cc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)

[gcc r15-6074] aarch64: Add support for fp8 convert and scale

https://gcc.gnu.org/g:ab52d6dc29a8798e40e201d160594a2b6218b553 commit r15-6074-gab52d6dc29a8798e40e201d160594a2b6218b553 Author: Saurabh Jha Date: Tue Dec 10 13:21:20 2024 + aarch64: Add support for fp8 convert and scale The AArch64 FEAT_FP8 extension introduces instructions f

[gcc r15-6076] aarch64: Add support for fp8fma instructions

https://gcc.gnu.org/g:d71bb2c0c8b4bbf7fce5581932673fb67b58e8bb commit r15-6076-gd71bb2c0c8b4bbf7fce5581932673fb67b58e8bb Author: Saurabh Jha Date: Tue Dec 10 13:21:21 2024 + aarch64: Add support for fp8fma instructions The AArch64 FEAT_FP8FMA extension introduces instructions

[gcc r15-6077] aarch64: Remove vcond{,u} optabs

https://gcc.gnu.org/g:164e3e66a61ce2ca30f78e9129c8f9592a9fe0fa commit r15-6077-g164e3e66a61ce2ca30f78e9129c8f9592a9fe0fa Author: Richard Sandiford Date: Tue Dec 10 13:21:55 2024 + aarch64: Remove vcond{,u} optabs Prompted by Richard E's arm patch, this one removes the aarch64

[gcc r15-6079] testsuite: Mark gcc.c-torture/execute/memcpy-a?.c tests expensive

https://gcc.gnu.org/g:34dfb30ca8dba6bc184e563b0ddc26a5239294e3 commit r15-6079-g34dfb30ca8dba6bc184e563b0ddc26a5239294e3 Author: Maciej W. Rozycki Date: Tue Dec 10 14:24:18 2024 + testsuite: Mark gcc.c-torture/execute/memcpy-a?.c tests expensive These tests can take several se

[gcc(refs/users/mikael/heads/refactor_descriptor_v02)] Sauvegarde modifs

https://gcc.gnu.org/g:be9046fd848c961a87fa8e8b7b2ba7ec005a62bc commit be9046fd848c961a87fa8e8b7b2ba7ec005a62bc Author: Mikael Morin Date: Sat Dec 7 22:22:10 2024 +0100 Sauvegarde modifs Diff: --- gcc/fortran/trans-array.cc | 42 + gcc/fortran/trans-array.h |

[gcc] Created branch 'mikael/heads/refactor_descriptor_v02' in namespace 'refs/users'

The branch 'mikael/heads/refactor_descriptor_v02' was created in namespace 'refs/users' pointing to: be9046fd848c... Sauvegarde modifs

[gcc(refs/users/mikael/heads/refactor_descriptor_v01)] Creation méthode initialisation descripteur

https://gcc.gnu.org/g:ba6a926d488e29fc425aaa15133fafbe29c970ce commit ba6a926d488e29fc425aaa15133fafbe29c970ce Author: Mikael Morin Date: Thu Dec 5 20:30:08 2024 +0100 Creation méthode initialisation descripteur Utilisation méthode initialisation descripteur gfc_trans_deferred_arr

[gcc] Deleted branch 'mikael/heads/refactor_descriptor_v01' in namespace 'refs/users'

The branch 'mikael/heads/refactor_descriptor_v01' in namespace 'refs/users' was deleted. It previously pointed to: 4bfd0a376ddc... Initialisation descripteur champ par champ Diff: !!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST): --

[gcc] Created branch 'mikael/heads/refactor_descriptor_v01' in namespace 'refs/users'

The branch 'mikael/heads/refactor_descriptor_v01' was created in namespace 'refs/users' pointing to: fa1fb48661ff... Silence uninitialized warning.

[gcc(refs/users/mikael/heads/refactor_descriptor_v01)] Silence uninitialized warning.

https://gcc.gnu.org/g:fa1fb48661ffbd82a79298a1da263b3e96f4eb31 commit fa1fb48661ffbd82a79298a1da263b3e96f4eb31 Author: Mikael Morin Date: Fri Dec 6 22:27:47 2024 +0100 Silence uninitialized warning. Diff: --- gcc/fortran/trans-intrinsic.cc | 2 +- 1 file changed, 1 insertion(+), 1 deleti

[gcc r15-6086] AArch64: Cleanup alignment macros

https://gcc.gnu.org/g:bf6efbbad14e46f97bcc36c531000d8d4740c863 commit r15-6086-gbf6efbbad14e46f97bcc36c531000d8d4740c863 Author: Wilco Dijkstra Date: Tue Oct 1 16:51:14 2024 + AArch64: Cleanup alignment macros Change the AARCH64_EXPAND_ALIGNMENT macro into proper function call

[gcc r15-6088] arm: Fix LDRD register overlap [PR117675]

https://gcc.gnu.org/g:21fbfae2e55e1a153820acc6fbd922e66f67e65b commit r15-6088-g21fbfae2e55e1a153820acc6fbd922e66f67e65b Author: Wilco Dijkstra Date: Tue Dec 10 14:22:48 2024 + arm: Fix LDRD register overlap [PR117675] The register indexed variants of LDRD have complex registe

[gcc r15-6085] AArch64: Use LDP/STP for large struct types

https://gcc.gnu.org/g:27d9b6d312678c7b9b09104eb0f48dc46e0f8ca2 commit r15-6085-g27d9b6d312678c7b9b09104eb0f48dc46e0f8ca2 Author: Wilco Dijkstra Date: Fri May 10 17:13:40 2024 + AArch64: Use LDP/STP for large struct types Use LDP/STP for large struct types as they have useful i

[gcc r15-6087] AArch64: Add baseline tune

https://gcc.gnu.org/g:132025a5fe6a9ba59d62126ecba21887f7ac0f98 commit r15-6087-g132025a5fe6a9ba59d62126ecba21887f7ac0f98 Author: Wilco Dijkstra Date: Thu Nov 14 14:28:10 2024 + AArch64: Add baseline tune Cleanup the extra tune defines by introducing AARCH64_EXTRA_TUNE_BASE as

[gcc(refs/users/aoliva/heads/testme)] ifcombine field-merge: saturate align at load size

https://gcc.gnu.org/g:ec8f7c2cd7b3c59b31534be945f3b89eb130df94 commit ec8f7c2cd7b3c59b31534be945f3b89eb130df94 Author: Alexandre Oliva Date: Tue Dec 10 06:49:32 2024 -0300 ifcombine field-merge: saturate align at load size Diff: --- gcc/gimple-fold.cc | 11 --- 1 file changed, 8

[gcc(refs/users/aoliva/heads/testme)] ifcombine field-merge: saturate align at load size

https://gcc.gnu.org/g:94ef5ce0a23707d5e9097a8f1c1d1fd54af9c58f commit 94ef5ce0a23707d5e9097a8f1c1d1fd54af9c58f Author: Alexandre Oliva Date: Tue Dec 10 06:49:32 2024 -0300 ifcombine field-merge: saturate align at load size Diff: --- gcc/gimple-fold.cc | 11 --- 1 file changed, 8

[gcc/aoliva/heads/testme] ifcombine field-merge: saturate align at load size

The branch 'aoliva/heads/testme' was updated to point to: 94ef5ce0a237... ifcombine field-merge: saturate align at load size It previously pointed to: ec8f7c2cd7b3... ifcombine field-merge: saturate align at load size Diff: !!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):

[gcc r15-6091] [PR117946][LRA]: When assigning hard reg use biggest mode to check ira_prohibited_class_mode_regs

https://gcc.gnu.org/g:6fc3da8fa2af1d4ee154ea803636eabde358b553 commit r15-6091-g6fc3da8fa2af1d4ee154ea803636eabde358b553 Author: Vladimir N. Makarov Date: Tue Dec 10 12:50:27 2024 -0500 [PR117946][LRA]: When assigning hard reg use biggest mode to check ira_prohibited_class_mode_regs

[gcc(refs/users/mikael/heads/refactor_descriptor_v02)] Annulation suppression else

https://gcc.gnu.org/g:bebab4cd13ba1c1fa9447b4cb20e84cc3d8cacb1 commit bebab4cd13ba1c1fa9447b4cb20e84cc3d8cacb1 Author: Mikael Morin Date: Tue Dec 10 20:08:37 2024 +0100 Annulation suppression else Diff: --- gcc/fortran/trans-decl.cc | 13 - 1 file changed, 12 insertions(+), 1

[gcc r15-6083] c++: P2865R5, Remove Deprecated Array Comparisons from C++26 [PR117788]

https://gcc.gnu.org/g:c628def52c87b40b6270618252488bcd731e1843 commit r15-6083-gc628def52c87b40b6270618252488bcd731e1843 Author: Marek Polacek Date: Wed Nov 27 18:00:24 2024 -0500 c++: P2865R5, Remove Deprecated Array Comparisons from C++26 [PR117788] This patch implements P2865R5

[gcc r15-6082] plugin/plugin-gcn.c: Fix error handling of GOMP_OFFLOAD_openacc_async_construct

https://gcc.gnu.org/g:7a12dc695b1ae70f9fc99baf95b7188af6515ed3 commit r15-6082-g7a12dc695b1ae70f9fc99baf95b7188af6515ed3 Author: Tobias Burnus Date: Tue Dec 10 16:16:04 2024 +0100 plugin/plugin-gcn.c: Fix error handling of GOMP_OFFLOAD_openacc_async_construct Follow up to r15-539

[gcc r15-6081] testsuite/gcc.dg/tree-ssa/pr117973-1.c: New test

https://gcc.gnu.org/g:0703e7491e06c09f2a37c9275d92dc32ae10015d commit r15-6081-g0703e7491e06c09f2a37c9275d92dc32ae10015d Author: Hans-Peter Nilsson Date: Mon Dec 9 20:15:52 2024 +0100 testsuite/gcc.dg/tree-ssa/pr117973-1.c: New test PR117973 covers the aspect of non-LOGICAL_OP

[gcc r15-6080] testsuite: Fix cpp0x/trivial1.C for std::is_trivial deprecation in C++26

https://gcc.gnu.org/g:7aab1271b4afb6f3e9e8a01825fcb14750b29312 commit r15-6080-g7aab1271b4afb6f3e9e8a01825fcb14750b29312 Author: Jonathan Wakely Date: Tue Dec 10 14:58:18 2024 + testsuite: Fix cpp0x/trivial1.C for std::is_trivial deprecation in C++26 std::is_trivial is depreca

[gcc r15-6072] tree-optimization/117912 - bogus address equivalences for __builtin_object_size

https://gcc.gnu.org/g:233972ab3b5338d7a5d1d7af9108c1f366170e44 commit r15-6072-g233972ab3b5338d7a5d1d7af9108c1f366170e44 Author: Richard Biener Date: Thu Dec 5 10:47:13 2024 +0100 tree-optimization/117912 - bogus address equivalences for __builtin_object_size VN again is the culp

[gcc/aoliva/heads/testme] ifcombine field-merge: saturate align at load size

The branch 'aoliva/heads/testme' was updated to point to: 8391a5d0a61e... ifcombine field-merge: saturate align at load size It previously pointed to: 94ef5ce0a237... ifcombine field-merge: saturate align at load size Diff: !!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):

[gcc(refs/users/aoliva/heads/testme)] ifcombine field-merge: saturate align at load size

https://gcc.gnu.org/g:8391a5d0a61edff16fea15599d28837a0c7da840 commit 8391a5d0a61edff16fea15599d28837a0c7da840 Author: Alexandre Oliva Date: Tue Dec 10 06:49:32 2024 -0300 ifcombine field-merge: saturate align at load size Diff: --- gcc/gimple-fold.cc | 13 ++--- 1 file changed,

[gcc r15-6073] libstdc++: Revert change to __bitwise_relocatable

https://gcc.gnu.org/g:4b9e1db1a14dbfc0b9a3cf9321fda4c041553b3a commit r15-6073-g4b9e1db1a14dbfc0b9a3cf9321fda4c041553b3a Author: Jonathan Wakely Date: Tue Dec 10 09:48:57 2024 + libstdc++: Revert change to __bitwise_relocatable This reverts r15-6060-ge4a0157c2397c9 so that __i

[gcc(refs/users/mikael/heads/refactor_descriptor_v01)] Initialisation descripteur champ par champ

https://gcc.gnu.org/g:4bfd0a376ddc50aaf04af11401c4e89a3baebb6e commit 4bfd0a376ddc50aaf04af11401c4e89a3baebb6e Author: Mikael Morin Date: Tue Dec 10 13:48:42 2024 +0100 Initialisation descripteur champ par champ Diff: --- gcc/fortran/trans-array.cc | 32 +++-

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add dense math test for new instruction names.

https://gcc.gnu.org/g:8ae1c5a877c240fcec1c0217e687e316394103d3 commit 8ae1c5a877c240fcec1c0217e687e316394103d3 Author: Michael Meissner Date: Tue Oct 22 16:57:52 2024 -0400 RFC2653-Add dense math test for new instruction names. 2024-10-22 Michael Meissner gcc/testsuit

[gcc(refs/vendors/ibm/heads/mmaplus)] Update ChangeLog.*

https://gcc.gnu.org/g:93f4f03f35b1c37ee6618d7907e90b66c0bc0c88 commit 93f4f03f35b1c37ee6618d7907e90b66c0bc0c88 Author: Michael Meissner Date: Tue Oct 22 17:55:58 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.mmaplus | 814 ++ 1 file

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-PowerPC: Add support for 1, 024 bit DMR registers.

https://gcc.gnu.org/g:cfffa0fc9c76e930d507a549527ede03862f81ad commit cfffa0fc9c76e930d507a549527ede03862f81ad Author: Michael Meissner Date: Tue Oct 22 16:58:33 2024 -0400 RFC2653-PowerPC: Add support for 1,024 bit DMR registers. This patch is a prelimianry patch to add the full

[gcc r15-6097] Fix inaccuracy in cunroll/cunrolli when considering what's innermost loop.

https://gcc.gnu.org/g:ee2f19b0937b5efc0b23c4319cbd4a38b27eac6e commit r15-6097-gee2f19b0937b5efc0b23c4319cbd4a38b27eac6e Author: liuhongt Date: Mon Dec 2 01:54:59 2024 -0800 Fix inaccuracy in cunroll/cunrolli when considering what's innermost loop. r15-919-gef27b91b62c3aa removed

[gcc(refs/users/mikael/heads/refactor_descriptor_v02)] Initialisation vptr

https://gcc.gnu.org/g:f4efb9f8aea997bc7ca88a86bcc968c3266a5d49 commit f4efb9f8aea997bc7ca88a86bcc968c3266a5d49 Author: Mikael Morin Date: Tue Dec 10 21:27:51 2024 +0100 Initialisation vptr Diff: --- gcc/fortran/trans-array.cc | 11 ++- 1 file changed, 10 insertions(+), 1 deletion

[gcc(refs/users/mikael/heads/refactor_descriptor_v02)] Non initialisation elem_len pour les conteneurs de classe

https://gcc.gnu.org/g:6324a650227a3ef1df7f6e07e651181e700a1f95 commit 6324a650227a3ef1df7f6e07e651181e700a1f95 Author: Mikael Morin Date: Tue Dec 10 21:34:06 2024 +0100 Non initialisation elem_len pour les conteneurs de classe Diff: --- gcc/fortran/trans-array.cc | 2 +- 1 file changed,

[gcc r15-6092] libstdc++: Use feature test macro for pmr::polymorphic_allocator<>

https://gcc.gnu.org/g:b26d92f4f71594206385d6f645ff626c0bf9b59c commit r15-6092-gb26d92f4f71594206385d6f645ff626c0bf9b59c Author: Jonathan Wakely Date: Tue Dec 10 14:35:07 2024 + libstdc++: Use feature test macro for pmr::polymorphic_allocator<> Check the __glibcxx_polymorphic_