[gcc r16-811] aarch64: Carry over zeroness in aarch64_evpc_reencode

2025-05-21 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:84c6988c026114727693cd7cd74b8cd5cdcdeb74 commit r16-811-g84c6988c026114727693cd7cd74b8cd5cdcdeb74 Author: Pengxuan Zheng Date: Tue May 20 17:58:23 2025 -0700 aarch64: Carry over zeroness in aarch64_evpc_reencode There was a bug in aarch64_evpc_reencode which

[gcc r16-704] aarch64: Add more vector permute tests for the FMOV optimization [PR100165]

2025-05-16 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:265fdb3fa91346f1be40111a9f3e8a0838f7d7fd commit r16-704-g265fdb3fa91346f1be40111a9f3e8a0838f7d7fd Author: Pengxuan Zheng Date: Mon May 12 10:21:49 2025 -0700 aarch64: Add more vector permute tests for the FMOV optimization [PR100165] This patch adds more test

[gcc r16-703] aarch64: Optimize AND with certain vector of immediates as FMOV [PR100165]

2025-05-16 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:0417a630811404c2362060b7e15f99e5a4a0d76a commit r16-703-g0417a630811404c2362060b7e15f99e5a4a0d76a Author: Pengxuan Zheng Date: Mon May 12 10:12:11 2025 -0700 aarch64: Optimize AND with certain vector of immediates as FMOV [PR100165] We can optimize AND with c

[gcc r16-702] aarch64: Recognize vector permute patterns which can be interpreted as AND [PR100165]

2025-05-16 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:dc501cb0dc857663f7fa762f3dbf0ae60973d2c3 commit r16-702-gdc501cb0dc857663f7fa762f3dbf0ae60973d2c3 Author: Pengxuan Zheng Date: Wed May 7 10:47:37 2025 -0700 aarch64: Recognize vector permute patterns which can be interpreted as AND [PR100165] Certain permute

[gcc r16-701] aarch64: Fix an oversight in aarch64_evpc_reencode

2025-05-16 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:d77c3bc1c35e3032b91648dbef4e0ef1f6020017 commit r16-701-gd77c3bc1c35e3032b91648dbef4e0ef1f6020017 Author: Pengxuan Zheng Date: Thu May 15 17:52:29 2025 -0700 aarch64: Fix an oversight in aarch64_evpc_reencode Some fields (e.g., zero_op0_p and zero_op1_p) of t

[gcc r16-459] Canonicalize vec_merge in simplify_ternary_operation

2025-05-07 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:9b13bea07706a7cae0185f8a860d67209308c050 commit r16-459-g9b13bea07706a7cae0185f8a860d67209308c050 Author: Pengxuan Zheng Date: Thu Feb 6 16:16:32 2025 -0800 Canonicalize vec_merge in simplify_ternary_operation Similar to the canonicalization done in combine,

[gcc r15-4579] aarch64: Improve scalar mode popcount expansion by using SVE [PR113860]

2024-10-23 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:9ffcf1f193b477f417a4c1960cd32696a23b99b4 commit r15-4579-g9ffcf1f193b477f417a4c1960cd32696a23b99b4 Author: Pengxuan Zheng Date: Mon Oct 14 05:37:49 2024 -0700 aarch64: Improve scalar mode popcount expansion by using SVE [PR113860] This is similar to the recen

[gcc r15-3669] aarch64: Improve vector constant generation using SVE INDEX instruction [PR113328]

2024-09-16 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:a92f54f580c37732a5de01e47aed56882231f196 commit r15-3669-ga92f54f580c37732a5de01e47aed56882231f196 Author: Pengxuan Zheng Date: Tue Sep 10 17:59:46 2024 -0700 aarch64: Improve vector constant generation using SVE INDEX instruction [PR113328] SVE's INDEX inst

[gcc r15-2659] aarch64: Improve Advanced SIMD popcount expansion by using SVE [PR113860]

2024-08-01 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:e4b8db26de35239bd621aad9c0361f25d957122b commit r15-2659-ge4b8db26de35239bd621aad9c0361f25d957122b Author: Pengxuan Zheng Date: Wed Jul 31 17:00:01 2024 -0700 aarch64: Improve Advanced SIMD popcount expansion by using SVE [PR113860] This patch improves the Ad

[gcc r15-1801] aarch64: Add vector popcount besides QImode [PR113859]

2024-07-02 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:895bbc08d38c2aca3cbbab273a247021fea73930 commit r15-1801-g895bbc08d38c2aca3cbbab273a247021fea73930 Author: Pengxuan Zheng Date: Wed Jun 12 18:23:13 2024 -0700 aarch64: Add vector popcount besides QImode [PR113859] This patch improves GCC’s vectorization of __

[gcc r15-1182] aarch64: Add vector floating point trunc pattern

2024-06-11 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:e7cd8ea1fa3e48404954bb7c06e9bcd603f132dd commit r15-1182-ge7cd8ea1fa3e48404954bb7c06e9bcd603f132dd Author: Pengxuan Zheng Date: Fri Jun 7 19:52:00 2024 -0700 aarch64: Add vector floating point trunc pattern This patch is a follow-up of r15-1079-g230d62a2cdd16

[gcc r15-1079] aarch64: Add vector floating point extend pattern [PR113880, PR113869]

2024-06-06 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:230d62a2cdd16c1ec8fe87998ec01081503f010d commit r15-1079-g230d62a2cdd16c1ec8fe87998ec01081503f010d Author: Pengxuan Zheng Date: Thu May 30 17:53:23 2024 -0700 aarch64: Add vector floating point extend pattern [PR113880, PR113869] This patch adds vector floati

[gcc r15-950] aarch64: testsuite: Explicitly add -mlittle-endian to vget_low_2.c

2024-05-31 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:7fb62627cfb3e03811bb667fa7159bbc7f972f00 commit r15-950-g7fb62627cfb3e03811bb667fa7159bbc7f972f00 Author: Pengxuan Zheng Date: Wed May 22 17:38:43 2024 -0700 aarch64: testsuite: Explicitly add -mlittle-endian to vget_low_2.c vget_low_2.c is a test case for li

[gcc r15-949] MAINTAINERS: Add myself to Write After Approval and DCO

2024-05-31 Thread Pengxuan Zheng via Gcc-cvs
https://gcc.gnu.org/g:96ec186d1dbeaa87453c3703e25fae7ce3ddbbb7 commit r15-949-g96ec186d1dbeaa87453c3703e25fae7ce3ddbbb7 Author: Pengxuan Zheng Date: Fri May 31 11:07:05 2024 -0700 MAINTAINERS: Add myself to Write After Approval and DCO ChangeLog: * MAINTAINERS: Ad