[gcc r16-2282] Fortran: Fix ICE in ASSOCIATE with user defined operator [PR121060]

https://gcc.gnu.org/g:82e912344d28cf1a69e5f8e047203ea7eb625302 commit r16-2282-g82e912344d28cf1a69e5f8e047203ea7eb625302 Author: Paul Thomas Date: Wed Jul 16 06:16:57 2025 +0100 Fortran: Fix ICE in ASSOCIATE with user defined operator [PR121060] 2025-07-16 Paul Thomas

[gcc r16-2281] Fortran: Fix ICE in F2018 IMPORT statements.

https://gcc.gnu.org/g:200bfefd3d8bce5b9097470c8a4fba01afbd4ad8 commit r16-2281-g200bfefd3d8bce5b9097470c8a4fba01afbd4ad8 Author: Paul Thomas Date: Wed Jul 16 06:11:25 2025 +0100 Fortran: Fix ICE in F2018 IMPORT statements. 2025-07-16 Steve Kargl gcc/fortran

[gcc r16-2280] c, c++: Fix unused result for empty types [PR82134]

https://gcc.gnu.org/g:32ff6f4728e4021ff33fb1da6eb3bafe3ea5a15e commit r16-2280-g32ff6f4728e4021ff33fb1da6eb3bafe3ea5a15e Author: Jeremy Rifkin Date: Tue Jul 15 18:17:01 2025 -0400 c, c++: Fix unused result for empty types [PR82134] Hi, This fixes PR c/82134 which concerns gcc

[gcc r15-9982] i386: Decouple AMX-AVX512 from AVX10.2 and imply AVX512F

https://gcc.gnu.org/g:426e9cf512f439d3b97ee450a87f67f65c545c50 commit r15-9982-g426e9cf512f439d3b97ee450a87f67f65c545c50 Author: Haochen Jiang Date: Tue Jul 15 10:44:54 2025 +0800 i386: Decouple AMX-AVX512 from AVX10.2 and imply AVX512F In ISE058, the AVX10.2 imply is removed from

[gcc r16-2279] i386: Decouple AMX-AVX512 from AVX10.2 and imply AVX512F

https://gcc.gnu.org/g:6b9c7da05d43db854e7ae0ee69299d4f290d8dbd commit r16-2279-g6b9c7da05d43db854e7ae0ee69299d4f290d8dbd Author: Haochen Jiang Date: Tue Jul 15 10:44:54 2025 +0800 i386: Decouple AMX-AVX512 from AVX10.2 and imply AVX512F In ISE058, the AVX10.2 imply is removed from

[gcc r16-2277] RISC-V: Support RVVDImode for avg3_floor auto vect

https://gcc.gnu.org/g:430be3b933bfac1f1caace4f0ef393a4d434ea0f commit r16-2277-g430be3b933bfac1f1caace4f0ef393a4d434ea0f Author: Pan Li Date: Tue Jul 15 09:45:05 2025 +0800 RISC-V: Support RVVDImode for avg3_floor auto vect The avg3_floor pattern leverage the add and shift rtl

[gcc r16-2275] spellcheck.{cc,h}: modernization

https://gcc.gnu.org/g:1f0d76d61b94acc8a207c656dfe8f0fa7a38d742 commit r16-2275-g1f0d76d61b94acc8a207c656dfe8f0fa7a38d742 Author: David Malcolm Date: Tue Jul 15 16:19:53 2025 -0400 spellcheck.{cc,h}: modernization No functional change intended. gcc/ChangeLog: *

[gcc r16-2274] libgdiagnostics: add diagnostic_message_buffer [PR120792]

https://gcc.gnu.org/g:2a521eee58da7c0d0f2262181b804aa148e60aaf commit r16-2274-g2a521eee58da7c0d0f2262181b804aa148e60aaf Author: David Malcolm Date: Tue Jul 15 16:19:42 2025 -0400 libgdiagnostics: add diagnostic_message_buffer [PR120792] This patch extends libgdiagnostics to provi

[gcc r16-2273] libstdc++: Constrain std::swap using concepts in C++20

https://gcc.gnu.org/g:178dc3367643bf8a0611c7e218240d807a8d82df commit r16-2273-g178dc3367643bf8a0611c7e218240d807a8d82df Author: Jonathan Wakely Date: Mon Jul 14 11:13:54 2025 +0100 libstdc++: Constrain std::swap using concepts in C++20 This is a minor compile-time optimization fo

[gcc r16-2272] libstdc++: Make ranges::advance(it, n, bound) follow standard more strictly

https://gcc.gnu.org/g:72d9ed607f4c4a1dd29331b8c80805c6485f61ed commit r16-2272-g72d9ed607f4c4a1dd29331b8c80805c6485f61ed Author: Jonathan Wakely Date: Mon Jul 14 11:21:24 2025 +0100 libstdc++: Make ranges::advance(it, n, bound) follow standard more strictly The standard specifies

[gcc r16-2271] libstdc++: Add missing initializers for __maybe_present_t members [PR119962]

https://gcc.gnu.org/g:0828600f586e75a2056a4fc7eb0a340c363d6c66 commit r16-2271-g0828600f586e75a2056a4fc7eb0a340c363d6c66 Author: Patrick Palka Date: Tue Jul 15 15:17:23 2025 -0400 libstdc++: Add missing initializers for __maybe_present_t members [PR119962] Data members of type __m

[gcc r16-2270] c++: don't mark void exprs as read [PR44677]

https://gcc.gnu.org/g:35b19980046fc57d9d6851b8f4349bd22de3fa03 commit r16-2270-g35b19980046fc57d9d6851b8f4349bd22de3fa03 Author: Jason Merrill Date: Mon Jul 14 18:29:17 2025 -0400 c++: don't mark void exprs as read [PR44677] In Jakub's patch for PR44677 he added code to prevent ma

[gcc r15-9980] [PATCH] PR modula2/120389 ICE if assigning a constant char to an integer array

https://gcc.gnu.org/g:7dcb64479e0cc590641a505b8fe1fd542f22a38f commit r15-9980-g7dcb64479e0cc590641a505b8fe1fd542f22a38f Author: Gaius Mulley Date: Tue Jul 15 19:38:04 2025 +0100 [PATCH] PR modula2/120389 ICE if assigning a constant char to an integer array This patch fixes an IC

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Disable uint128_t testcase of SAT_MUL when rv32

https://gcc.gnu.org/g:f8a92eb289e64c25f5b1d5e72609c9a079c2ae78 commit f8a92eb289e64c25f5b1d5e72609c9a079c2ae78 Author: Pan Li Date: Tue Jul 8 10:46:29 2025 +0800 RISC-V: Disable uint128_t testcase of SAT_MUL when rv32 The rv32 doesn't support __uint128, and then we will have e

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v5] RISC-V: Mips P8700 Conditional Move Support.

https://gcc.gnu.org/g:6ae24e5065ec89dd2e760be7fd536ed13df1564a commit 6ae24e5065ec89dd2e760be7fd536ed13df1564a Author: Umesh Kalappa Date: Tue Jul 15 10:35:44 2025 -0600 [PATCH v5] RISC-V: Mips P8700 Conditional Move Support. Updated the test for rv32 accordingly and no regress fo

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcase for rv32 SAT_MUL from uint64

https://gcc.gnu.org/g:9f3ebf291ef456b06916321b37121302a9c75fbd commit 9f3ebf291ef456b06916321b37121302a9c75fbd Author: Pan Li Date: Fri Jul 11 08:58:31 2025 +0800 RISC-V: Add testcase for rv32 SAT_MUL from uint64 Add the run and asm testcase for rv32 SAT_MUL, widen mul from ui

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISCV: Remove the v extension requirement for sat scalar run test

https://gcc.gnu.org/g:e24b66b97872557cd6838d68b4e248287ebfb415 commit e24b66b97872557cd6838d68b4e248287ebfb415 Author: Pan Li Date: Wed Jul 9 10:40:52 2025 +0800 RISCV: Remove the v extension requirement for sat scalar run test The sat scalar run test should not require the v exte

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Make zero-stride load broadcast a tunable.

https://gcc.gnu.org/g:ee2202e41d5a7527bbbeae9b5e8d56510aed3b57 commit ee2202e41d5a7527bbbeae9b5e8d56510aed3b57 Author: Robin Dapp Date: Thu Jul 10 09:41:48 2025 +0200 RISC-V: Make zero-stride load broadcast a tunable. This patch makes the zero-stride load broadcast idiom dependent

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v2] RISC-V: Vector-scalar widening multiply-(subtract-)accumulate [PR119100]

https://gcc.gnu.org/g:8a0241b80551c06210b3157eee2cb337b97c893c commit 8a0241b80551c06210b3157eee2cb337b97c893c Author: Paul-Antoine Arras Date: Mon Jul 14 06:10:44 2025 -0600 [PATCH v2] RISC-V: Vector-scalar widening multiply-(subtract-)accumulate [PR119100] This pattern enables

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add testcases for unsigned vector SAT_SUB form 11 and form 12

https://gcc.gnu.org/g:64c0c045836d71452f5fbea309b637b99ba8bc32 commit 64c0c045836d71452f5fbea309b637b99ba8bc32 Author: panciyan Date: Thu Jul 10 06:54:26 2025 + RISC-V: Add testcases for unsigned vector SAT_SUB form 11 and form 12 This patch adds testcase for form11 and form12

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Detect new fusions for RISC-V

https://gcc.gnu.org/g:907baff96653a0c513f250de3280eca25060567b commit 907baff96653a0c513f250de3280eca25060567b Author: Daniel Barboza Date: Thu Jul 10 07:28:38 2025 -0600 [RISC-V] Detect new fusions for RISC-V This is primarily Daniel's work... He's chasing things in QEMU & LLVM

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssub.vv combine case 0 with GR2VR cost 0, 2 and 15

https://gcc.gnu.org/g:4ee8f05c7f1085fe5364ebb58f74e2d42523faae commit 4ee8f05c7f1085fe5364ebb58f74e2d42523faae Author: Pan Li Date: Mon Jul 7 11:13:15 2025 +0800 RISC-V: Add test for vec_duplicate + vssub.vv combine case 0 with GR2VR cost 0, 2 and 15 Add asm dump check and run te

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssub.vv combine case 1 with GR2VR cost 0, 1 and 2

https://gcc.gnu.org/g:aeae7c6f03d3f45288ee30344d84d7e131db951c commit aeae7c6f03d3f45288ee30344d84d7e131db951c Author: Pan Li Date: Mon Jul 7 11:17:00 2025 +0800 RISC-V: Add test for vec_duplicate + vssub.vv combine case 1 with GR2VR cost 0, 1 and 2 Add asm dump check test for ve

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vssub.vv to vssub.vx on GR2VR cost

https://gcc.gnu.org/g:374083a73d9a878dc6b626b97fe1fe9c50e521bc commit 374083a73d9a878dc6b626b97fe1fe9c50e521bc Author: Pan Li Date: Mon Jul 7 11:07:11 2025 +0800 RISC-V: Combine vec_duplicate + vssub.vv to vssub.vx on GR2VR cost This patch would like to combine the vec_duplicate +

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Adjust testdata for unsigned vector SAT_SUB

https://gcc.gnu.org/g:decbd287699d9914862c9bb3bd9ea8a933a7174f commit decbd287699d9914862c9bb3bd9ea8a933a7174f Author: Ciyan Pan Date: Wed Jul 9 08:31:25 2025 -0600 [PATCH] RISC-V: Adjust testdata for unsigned vector SAT_SUB This patch adjust test data for unsigned vector SAT_SUB

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Enable zvfh for vector-scalar half-float run tests

https://gcc.gnu.org/g:7735ae76a1402a569242bfffb2c3ff1aaeb60551 commit 7735ae76a1402a569242bfffb2c3ff1aaeb60551 Author: Paul-Antoine Arras Date: Wed Jul 9 08:36:24 2025 -0600 [PATCH] RISC-V: Enable zvfh for vector-scalar half-float run tests zvfh is not enabled at the testsuite lev

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/120642] Avoid propagating constant AVL for theadvector

https://gcc.gnu.org/g:16b14d2666f7fd55c51093b05455f922e816389b commit 16b14d2666f7fd55c51093b05455f922e816389b Author: Jeff Law Date: Wed Jul 9 05:23:34 2025 -0600 [RISC-V][PR target/120642] Avoid propagating constant AVL for theadvector AVL propagation currently assumes that it c

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Do not use vsetivli for THeadVector.

https://gcc.gnu.org/g:e88c4159232d1f69f5c939e06dd6878b7e5bc472 commit e88c4159232d1f69f5c939e06dd6878b7e5bc472 Author: Robin Dapp Date: Tue Jul 8 11:35:12 2025 +0200 RISC-V: Do not use vsetivli for THeadVector. In emit_vlmax_insn_lra we use a vsetivli for an immediate AVL. XTH

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Ignore non-types in builtin function hash.

https://gcc.gnu.org/g:fbe8a3fda1677ef823772dacd86a1a5e95a47386 commit fbe8a3fda1677ef823772dacd86a1a5e95a47386 Author: Robin Dapp Date: Tue Jul 8 11:17:41 2025 +0200 RISC-V: Ignore non-types in builtin function hash. If a user passes a string that doesn't represent a variable we s

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] riscv: allow zero in zacas subword atomic cas

https://gcc.gnu.org/g:07f75a579f31e037a311cfb388c40ef6e70646ad commit 07f75a579f31e037a311cfb388c40ef6e70646ad Author: Andreas Schwab Date: Tue Jul 8 07:32:17 2025 -0600 [PATCH] riscv: allow zero in zacas subword atomic cas gcc: PR target/120995 * config/ri

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed][RISC-V] Fix testsuite fallout from check-function-bodies change

https://gcc.gnu.org/g:045d0c6f9efa44fd6ba4a3a144f0881a0a4de1ad commit 045d0c6f9efa44fd6ba4a3a144f0881a0a4de1ad Author: Jeff Law Date: Mon Jul 7 20:42:04 2025 -0600 [committed][RISC-V] Fix testsuite fallout from check-function-bodies change Minor fallout from HJ's recent change to

[gcc r16-2269] [PATCH v5] RISC-V: Mips P8700 Conditional Move Support.

https://gcc.gnu.org/g:3fbed69502770851c8a5bfece99e9ee8c6d9e4b0 commit r16-2269-g3fbed69502770851c8a5bfece99e9ee8c6d9e4b0 Author: Umesh Kalappa Date: Tue Jul 15 10:35:44 2025 -0600 [PATCH v5] RISC-V: Mips P8700 Conditional Move Support. Updated the test for rv32 accordingly and no

[gcc] Created branch 'meissner/heads/work215-test' in namespace 'refs/users'

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[gcc(refs/users/meissner/heads/work215-submit)] Add ChangeLog.submit and update REVISION.

https://gcc.gnu.org/g:d0fae3ec50c9c171b0e15d431f85307d3370d0d9 commit d0fae3ec50c9c171b0e15d431f85307d3370d0d9 Author: Michael Meissner Date: Tue Jul 15 12:23:56 2025 -0400 Add ChangeLog.submit and update REVISION. 2025-07-15 Michael Meissner gcc/ * Ch

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https://gcc.gnu.org/g:0fe416b12a0da30e8cf4ae9c0c83929b545e6370 commit 0fe416b12a0da30e8cf4ae9c0c83929b545e6370 Author: Michael Meissner Date: Tue Jul 15 12:22:45 2025 -0400 Add ChangeLog.test and update REVISION. 2025-07-15 Michael Meissner gcc/ * Chan

[gcc(refs/users/meissner/heads/work215-sha)] Add ChangeLog.sha and update REVISION.

https://gcc.gnu.org/g:2ef77e998a3df8df9bb8989b1e0f64d7deddafb5 commit 2ef77e998a3df8df9bb8989b1e0f64d7deddafb5 Author: Michael Meissner Date: Tue Jul 15 12:21:31 2025 -0400 Add ChangeLog.sha and update REVISION. 2025-07-15 Michael Meissner gcc/ * Chang

[gcc] Created branch 'meissner/heads/work215-sha' in namespace 'refs/users'

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https://gcc.gnu.org/g:5066e913a77955ad720303ec6ed0448044d6000a commit 5066e913a77955ad720303ec6ed0448044d6000a Author: Michael Meissner Date: Tue Jul 15 12:20:22 2025 -0400 Add ChangeLog.dmf and update REVISION. 2025-07-15 Michael Meissner gcc/ * Chang

[gcc] Created branch 'meissner/heads/work215-dmf' in namespace 'refs/users'

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https://gcc.gnu.org/g:567f7dbe3f30d9c6e4ea327af4e4f94728066f10 commit 567f7dbe3f30d9c6e4ea327af4e4f94728066f10 Author: Michael Meissner Date: Tue Jul 15 12:19:03 2025 -0400 Add ChangeLog.bugs and update REVISION. 2025-07-15 Michael Meissner gcc/ * Chan

[gcc] Created branch 'meissner/heads/work215-bugs' in namespace 'refs/users'

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https://gcc.gnu.org/g:19fe65743a9069acedeccdbe945cf8f148e582e1 commit 19fe65743a9069acedeccdbe945cf8f148e582e1 Author: Michael Meissner Date: Tue Jul 15 12:18:04 2025 -0400 Add REVISION. 2025-07-15 Michael Meissner gcc/ * REVISION: New file for branch.

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[gcc(refs/users/meissner/heads/work215)] Add ChangeLog.meissner and REVISION.

https://gcc.gnu.org/g:a4a0aab108e8e94215b07aaafd6e1584bbb86ad5 commit a4a0aab108e8e94215b07aaafd6e1584bbb86ad5 Author: Michael Meissner Date: Tue Jul 15 12:17:14 2025 -0400 Add ChangeLog.meissner and REVISION. 2025-07-15 Michael Meissner gcc/ * REVISIO

[gcc] Created branch 'meissner/heads/work215' in namespace 'refs/users'

The branch 'meissner/heads/work215' was created in namespace 'refs/users' pointing to: f307ab8b18c7... libgcc: Fix aarch64 build

[gcc r16-2268] libgcc: Fix aarch64 build

https://gcc.gnu.org/g:f307ab8b18c7b5623344b01f24af593594319196 commit r16-2268-gf307ab8b18c7b5623344b01f24af593594319196 Author: Andrew Pinski Date: Tue Jul 15 08:56:31 2025 -0700 libgcc: Fix aarch64 build For aarch64, libgcc is built with -Werror, after the latest -Wunused-bu

[gcc r15-9979] openmp, fortran: Fix ICE when the procedure name cannot be found in declare variant directives [PR10

https://gcc.gnu.org/g:c9965c37cd153b7764f147a77489db9827071ad0 commit r15-9979-gc9965c37cd153b7764f147a77489db9827071ad0 Author: Kwok Cheung Yeung Date: Tue Jul 15 15:26:26 2025 +0100 openmp, fortran: Fix ICE when the procedure name cannot be found in declare variant directives [PR104428]

[gcc r16-2267] libstdc++: Implement std::chrono::current_zone() for Windows [PR108409]

https://gcc.gnu.org/g:e28494e08092c4096a015563c0ba0494ce1edf81 commit r16-2267-ge28494e08092c4096a015563c0ba0494ce1edf81 Author: Björn Schäpers Date: Thu Jul 10 09:48:19 2025 +0200 libstdc++: Implement std::chrono::current_zone() for Windows [PR108409] On Windows there is no API t

[gcc r16-2266] libstdc++: Search for tzdata on Windows (msys)

https://gcc.gnu.org/g:724f36504aa8573883e1919c6968665f8af28aef commit r16-2266-g724f36504aa8573883e1919c6968665f8af28aef Author: Björn Schäpers Date: Tue Jul 8 00:43:34 2025 +0200 libstdc++: Search for tzdata on Windows (msys) Windows does not provide a tzdata.zi, but msys does. U

[gcc r16-2263] openmp, fortran: Fix ICE when the procedure name cannot be found in declare variant directives [PR10

https://gcc.gnu.org/g:a05c4f4ee48f76e518dbd2a96e5083f4df833df7 commit r16-2263-ga05c4f4ee48f76e518dbd2a96e5083f4df833df7 Author: Kwok Cheung Yeung Date: Tue Jul 15 15:26:26 2025 +0100 openmp, fortran: Fix ICE when the procedure name cannot be found in declare variant directives [PR104428]

[gcc r16-2264] c++: decomp25 vs -fimplicit-constexpr [PR117784]

https://gcc.gnu.org/g:9956dc37cb3d71c1fc7a89b45cc291645c11817b commit r16-2264-g9956dc37cb3d71c1fc7a89b45cc291645c11817b Author: Jason Merrill Date: Tue Jul 15 10:46:41 2025 -0400 c++: decomp25 vs -fimplicit-constexpr [PR117784] Avoid diagnostic changes from -fimplicit-constexpr.

[gcc r16-2265] c++: constexpr uninitialized union [PR120577]

https://gcc.gnu.org/g:f23b5df56e237df9f66b615ca4babc564d5f75de commit r16-2265-gf23b5df56e237df9f66b615ca4babc564d5f75de Author: Jason Merrill Date: Sat Jul 12 05:15:01 2025 -0400 c++: constexpr uninitialized union [PR120577] This was failing for two reasons: 1) We were w

[gcc r16-2262] asf: Fix offset check in base reg initialization for big-endian targets

https://gcc.gnu.org/g:60e99b5703051115220ef2b186979d4c416de530 commit r16-2262-g60e99b5703051115220ef2b186979d4c416de530 Author: Konstantinos Eleftheriou Date: Tue Jun 3 09:16:17 2025 +0200 asf: Fix offset check in base reg initialization for big-endian targets During the base reg

[gcc r16-2261] aarch64: Enable selective LDAPUR generation for cores with RCPC2

https://gcc.gnu.org/g:6b76dfad9b2c80a43b2e775d0027ba4b636d6022 commit r16-2261-g6b76dfad9b2c80a43b2e775d0027ba4b636d6022 Author: Soumya AR Date: Tue Jul 15 19:28:44 2025 +0530 aarch64: Enable selective LDAPUR generation for cores with RCPC2 This patch adds the ability to fold the

[gcc r16-2260] libstdc++: Tweak dg-error patterns for C++26 constexpr changes

https://gcc.gnu.org/g:c743c1cc0ab9f188c2723815591420040727cf54 commit r16-2260-gc743c1cc0ab9f188c2723815591420040727cf54 Author: Jonathan Wakely Date: Fri Jul 11 23:49:05 2025 +0100 libstdc++: Tweak dg-error patterns for C++26 constexpr changes libstdc++-v3/ChangeLog:

[gcc r16-2259] tree-optimization/121059 - fixup loop mask query

https://gcc.gnu.org/g:71be87055548cf942c7bc56d10ffd479db8569e4 commit r16-2259-g71be87055548cf942c7bc56d10ffd479db8569e4 Author: Richard Biener Date: Mon Jul 14 14:09:28 2025 +0200 tree-optimization/121059 - fixup loop mask query When we opportunistically mask an operand of a AND

[gcc r16-2258] c, c++: Extend -Wunused-but-set-* warnings [PR44677]

https://gcc.gnu.org/g:0eac9cfee8cb0b21de866a04d5d59685ab35208f commit r16-2258-g0eac9cfee8cb0b21de866a04d5d59685ab35208f Author: Jakub Jelinek Date: Tue Jul 15 15:00:33 2025 +0200 c, c++: Extend -Wunused-but-set-* warnings [PR44677] The -Wunused-but-set-* warnings work by using 2

[gcc r16-2257] aarch64: fixup: Implement sme2+faminmax extension.

https://gcc.gnu.org/g:365ffdc172c3683a84455de8c437bbe29f5aba46 commit r16-2257-g365ffdc172c3683a84455de8c437bbe29f5aba46 Author: Alfie Richards Date: Fri Jul 4 15:37:10 2025 + aarch64: fixup: Implement sme2+faminmax extension. Fixup to the SME2+FAMINMAX intrinsics commit.

[gcc r15-9978] Fortran: Ensure finalizers are created correctly [PR120637]

https://gcc.gnu.org/g:1cb95b3006dd615a03d3e4bade5605532c4ab65e commit r15-9978-g1cb95b3006dd615a03d3e4bade5605532c4ab65e Author: Andre Vehreschild Date: Wed Jun 25 14:46:16 2025 +0200 Fortran: Ensure finalizers are created correctly [PR120637] Finalize_component freeed an expressi

[gcc r16-2256] libstdc++: Ensure that ranges::destroy destroys in constexpr [PR121024]

https://gcc.gnu.org/g:a63b663c7bf77e38d90cebe993a3de8a548f8d66 commit r16-2256-ga63b663c7bf77e38d90cebe993a3de8a548f8d66 Author: Jonathan Wakely Date: Thu Jul 10 14:12:44 2025 +0100 libstdc++: Ensure that ranges::destroy destroys in constexpr [PR121024] The new test is currently m

[gcc r16-2255] libstdc++: Make all experimental::observer_ptr functions constexpr

https://gcc.gnu.org/g:aef39689cceefbea6b383a3da78e3de016b0 commit r16-2255-gaef39689cceefbea6b383a3da78e3de016b0 Author: Jonathan Wakely Date: Mon Jul 14 11:11:28 2025 +0100 libstdc++: Make all experimental::observer_ptr functions constexpr I've just created LWG 4295 propo

[gcc r16-2254] libstdc++: Ensure std::make_unsigned works for 128-bit enum

https://gcc.gnu.org/g:59f6328034385e2861c3f3115380f2f098e99f37 commit r16-2254-g59f6328034385e2861c3f3115380f2f098e99f37 Author: Jonathan Wakely Date: Sun Jul 13 15:05:52 2025 +0100 libstdc++: Ensure std::make_unsigned works for 128-bit enum Another follow-up to r16-2190-g4faa42ac

[gcc r16-2253] libstdc++: Ensure std::hash<__int128> is defined [PR96710]

https://gcc.gnu.org/g:57b9afc9dad76f529969c548214b65dfe43652a7 commit r16-2253-g57b9afc9dad76f529969c548214b65dfe43652a7 Author: Jonathan Wakely Date: Fri May 16 13:33:23 2025 +0100 libstdc++: Ensure std::hash<__int128> is defined [PR96710] This is a follow-up to r16-2190-g4faa42a

[gcc r16-2252] Revert "aarch64: Use EOR3 for DImode values"

https://gcc.gnu.org/g:c386f9ffbfbcc9317d998557a588df6e03b69b7b commit r16-2252-gc386f9ffbfbcc9317d998557a588df6e03b69b7b Author: Kyrylo Tkachov Date: Tue Jul 15 10:49:15 2025 +0200 Revert "aarch64: Use EOR3 for DImode values" This reverts commit cfa827188dc236ba905b12ef06ccc517b9f

[gcc r16-2251] libstdc++: Format %a/%A/%b/%h/%B/%p without using locale::classic [PR110739]

https://gcc.gnu.org/g:b2b7276a7e114d2e9f76e02b8567b6ce387a2234 commit r16-2251-gb2b7276a7e114d2e9f76e02b8567b6ce387a2234 Author: Tomasz Kamiński Date: Fri Jun 27 15:04:19 2025 +0200 libstdc++: Format %a/%A/%b/%h/%B/%p without using locale::classic [PR110739] With changes r16-2063-

[gcc r16-2250] aarch64: AND/BIC combines for unpacked SVE FP comparisons

https://gcc.gnu.org/g:1dffa305c50f28726d7a3323e1006fc1addad726 commit r16-2250-g1dffa305c50f28726d7a3323e1006fc1addad726 Author: Spencer Abson Date: Wed Jul 2 21:31:40 2025 + aarch64: AND/BIC combines for unpacked SVE FP comparisons This patch extends the splitting patterns fo

[gcc] Deleted branch 'mikael/heads/realloc_assign_tweaks_v04' in namespace 'refs/users'

The branch 'mikael/heads/realloc_assign_tweaks_v04' in namespace 'refs/users' was deleted. It previously pointed to: 3c26783bf6fd... fortran: Amend descriptor bounds init if unallocated

[gcc r16-2249] fortran: Amend descriptor bounds init if unallocated

https://gcc.gnu.org/g:3c26783bf6fd15a134a424e8c108d1dc8df3fc44 commit r16-2249-g3c26783bf6fd15a134a424e8c108d1dc8df3fc44 Author: Mikael Morin Date: Tue Jul 15 09:58:44 2025 +0200 fortran: Amend descriptor bounds init if unallocated Always generate the conditional initialization of

[gcc r16-2247] fortran: Generate array reallocation out of loops

https://gcc.gnu.org/g:ade677dbb747dce1103a9f80070f7b0c329b865d commit r16-2247-gade677dbb747dce1103a9f80070f7b0c329b865d Author: Mikael Morin Date: Tue Jul 15 09:58:26 2025 +0200 fortran: Generate array reallocation out of loops Generate the array reallocation on assignment code b

[gcc r16-2248] fortran: Delay evaluation of array bounds after reallocation

https://gcc.gnu.org/g:ac8e536526393580bc9a4339bab2f8603eff8a47 commit r16-2248-gac8e536526393580bc9a4339bab2f8603eff8a47 Author: Mikael Morin Date: Tue Jul 15 09:58:35 2025 +0200 fortran: Delay evaluation of array bounds after reallocation Delay the evaluation of bounds, offset, e

[gcc(refs/users/mikael/heads/realloc_assign_tweaks_v04)] fortran: Delay evaluation of array bounds after reallocation

https://gcc.gnu.org/g:ac8e536526393580bc9a4339bab2f8603eff8a47 commit ac8e536526393580bc9a4339bab2f8603eff8a47 Author: Mikael Morin Date: Tue Jul 15 09:58:35 2025 +0200 fortran: Delay evaluation of array bounds after reallocation Delay the evaluation of bounds, offset, etc after t

[gcc(refs/users/mikael/heads/realloc_assign_tweaks_v04)] fortran: Amend descriptor bounds init if unallocated

https://gcc.gnu.org/g:3c26783bf6fd15a134a424e8c108d1dc8df3fc44 commit 3c26783bf6fd15a134a424e8c108d1dc8df3fc44 Author: Mikael Morin Date: Tue Jul 15 09:58:44 2025 +0200 fortran: Amend descriptor bounds init if unallocated Always generate the conditional initialization of unallocat

[gcc(refs/users/mikael/heads/realloc_assign_tweaks_v04)] fortran: Generate array reallocation out of loops

https://gcc.gnu.org/g:ade677dbb747dce1103a9f80070f7b0c329b865d commit ade677dbb747dce1103a9f80070f7b0c329b865d Author: Mikael Morin Date: Tue Jul 15 09:58:26 2025 +0200 fortran: Generate array reallocation out of loops Generate the array reallocation on assignment code before ente

[gcc] Created branch 'mikael/heads/realloc_assign_tweaks_v04' in namespace 'refs/users'

The branch 'mikael/heads/realloc_assign_tweaks_v04' was created in namespace 'refs/users' pointing to: 3c26783bf6fd... fortran: Amend descriptor bounds init if unallocated

[gcc r16-2246] Fix tree.cc compilation on SPARC

https://gcc.gnu.org/g:8cb151ef432f0051a2fce56ff65a45e4db06d88b commit r16-2246-g8cb151ef432f0051a2fce56ff65a45e4db06d88b Author: Rainer Orth Date: Tue Jul 15 09:49:52 2025 +0200 Fix tree.cc compilation on SPARC commit 4d7baa94a48c27030c8ffcfaf3dd187be09903a9 Author: Andrew Pin