[gcc r16-2001] tree-optimization/120927 - 510.parest_r segfault with masked epilog

https://gcc.gnu.org/g:918f4517564c2cf7e5bb907428d5413742bee56f commit r16-2001-g918f4517564c2cf7e5bb907428d5413742bee56f Author: Richard Biener Date: Thu Jul 3 14:39:22 2025 +0200 tree-optimization/120927 - 510.parest_r segfault with masked epilog The following fixes bad alignment

[gcc r16-2000] c-family: Tweak ptr +- (expr +- cst) FE optimization [PR120837]

https://gcc.gnu.org/g:e16820d4f7ab1d8a40f70beef722e6f8a4c2392c commit r16-2000-ge16820d4f7ab1d8a40f70beef722e6f8a4c2392c Author: Jakub Jelinek Date: Fri Jul 4 07:50:12 2025 +0200 c-family: Tweak ptr +- (expr +- cst) FE optimization [PR120837] The following testcase is miscompiled

[gcc r12-11250] configure, Darwin: Recognise new naming for Xcode ld.

https://gcc.gnu.org/g:b71ac987cd149928d1eecd498a721d4377505da8 commit r12-11250-gb71ac987cd149928d1eecd498a721d4377505da8 Author: Iain Sandoe Date: Tue Apr 15 14:02:21 2025 +0100 configure, Darwin: Recognise new naming for Xcode ld. The latest editions of XCode have altered the id

[gcc r12-11249] Darwin: Pass -macos_version_min to the linker [PR119172].

https://gcc.gnu.org/g:6d57ab56981cf085480df21f602dacb7f3cf3e49 commit r12-11249-g6d57ab56981cf085480df21f602dacb7f3cf3e49 Author: Iain Sandoe Date: Sun Mar 9 09:24:34 2025 + Darwin: Pass -macos_version_min to the linker [PR119172]. For binaries to be notarised, the SDK version

[gcc r12-11248] fixincludes: adjust stdio fix for macOS 15 headers

https://gcc.gnu.org/g:8b89889c1f9329b52989f0036e49816b063a6d92 commit r12-11248-g8b89889c1f9329b52989f0036e49816b063a6d92 Author: Francois-Xavier Coudert Date: Thu Jun 27 18:55:22 2024 +0200 fixincludes: adjust stdio fix for macOS 15 headers fixincludes/ChangeLog:

[gcc r12-11247] libgcc, Darwin: Drop the legacy library build for macOS >= 10.12 [PR116809].

https://gcc.gnu.org/g:4c4135438a6b100f27968a3fda41e580dba61b52 commit r12-11247-g4c4135438a6b100f27968a3fda41e580dba61b52 Author: Mark Mentovai Date: Tue Sep 24 16:11:14 2024 -0400 libgcc, Darwin: Drop the legacy library build for macOS >= 10.12 [PR116809]. From macOSX15 SDK, the

[gcc r16-1999] testsuite: Rename a test

https://gcc.gnu.org/g:1c24213ec117b889342913482faad2c7ba0fe7fd commit r16-1999-g1c24213ec117b889342913482faad2c7ba0fe7fd Author: Xi Ruoyao Date: Fri Jul 4 11:27:04 2025 +0800 testsuite: Rename a test I mistyped the file name :(. gcc/testsuite/ChangeLog: P

[gcc r16-1998] LoongArch: Prevent subreg of subreg in CRC

https://gcc.gnu.org/g:113ed3adc03f79f09ffe00d429d18f89f335b188 commit r16-1998-g113ed3adc03f79f09ffe00d429d18f89f335b188 Author: Xi Ruoyao Date: Wed Jul 2 15:28:33 2025 +0800 LoongArch: Prevent subreg of subreg in CRC The register_operand predicate can match subreg, then we'd have

[gcc r16-1997] [RISC-V] Add basic instrumentation to fusion detection

https://gcc.gnu.org/g:053a678cc59a0c8adbdbb78802ff33a619b57b41 commit r16-1997-g053a678cc59a0c8adbdbb78802ff33a619b57b41 Author: Shreya Munnangi Date: Thu Jul 3 21:03:03 2025 -0600 [RISC-V] Add basic instrumentation to fusion detection We were looking to evaluate some changes from

[gcc r16-1996] RISC-V: Add testcases for signed scalar SAT_ADD IMM form 2

https://gcc.gnu.org/g:d6ed12ed5ebac8e50da9defea6af832039782cbf commit r16-1996-gd6ed12ed5ebac8e50da9defea6af832039782cbf Author: panciyan Date: Tue Jun 24 09:58:14 2025 +0800 RISC-V: Add testcases for signed scalar SAT_ADD IMM form 2 This patch adds testcase for form2, as shown be

[gcc r16-1995] Match: Support for signed scalar SAT_ADD IMM form 2

https://gcc.gnu.org/g:0662d721cfbe162a06645d94640a146d3912f554 commit r16-1995-g0662d721cfbe162a06645d94640a146d3912f554 Author: panciyan Date: Tue Jun 24 09:28:49 2025 +0800 Match: Support for signed scalar SAT_ADD IMM form 2 This patch would like to support signed scalar SAT_ADD

[gcc r16-1993] libstdc++: fix bits/version.def typo

https://gcc.gnu.org/g:062f217f41d1e53c4f101caebfd9aabd3f8afe03 commit r16-1993-g062f217f41d1e53c4f101caebfd9aabd3f8afe03 Author: Nathan Myers Date: Thu Jul 3 19:45:27 2025 -0400 libstdc++: fix bits/version.def typo bits/version.def was missing a ';'. libstdc++-v3/Changelo

[gcc r16-1992] c++: trivial lambda pruning [PR120716]

https://gcc.gnu.org/g:387cc9f80fcfd8b7d3fc142ef01bb05a46f0f244 commit r16-1992-g387cc9f80fcfd8b7d3fc142ef01bb05a46f0f244 Author: Jason Merrill Date: Thu Jul 3 16:52:56 2025 -0400 c++: trivial lambda pruning [PR120716] In this testcase there is nothing in the lambda except a static

[gcc r16-1991] c++: ICE with 'this' in lambda signature [PR120748]

https://gcc.gnu.org/g:e9549b5ee8496af12bac3ebfa3ec0aa8487fb725 commit r16-1991-ge9549b5ee8496af12bac3ebfa3ec0aa8487fb725 Author: Jason Merrill Date: Thu Jul 3 12:05:12 2025 -0400 c++: ICE with 'this' in lambda signature [PR120748] This testcase was crashing from infinite recursion

[gcc r12-11245] c++: Fix a pasto in the PR120471 fix [PR120940]

https://gcc.gnu.org/g:ed950a9ed384389ff07ac793b7065abe31bcae3f commit r12-11245-ged950a9ed384389ff07ac793b7065abe31bcae3f Author: Jakub Jelinek Date: Thu Jul 3 22:39:39 2025 +0200 c++: Fix a pasto in the PR120471 fix [PR120940] No idea how this slipped in, I'm terribly sorry.

[gcc r13-9783] c++: Fix a pasto in the PR120471 fix [PR120940]

https://gcc.gnu.org/g:f3689dc2061481fa789dbf7b6ab55a8e5f52f198 commit r13-9783-gf3689dc2061481fa789dbf7b6ab55a8e5f52f198 Author: Jakub Jelinek Date: Thu Jul 3 22:39:39 2025 +0200 c++: Fix a pasto in the PR120471 fix [PR120940] No idea how this slipped in, I'm terribly sorry. S

[gcc r14-11876] c++: Fix a pasto in the PR120471 fix [PR120940]

https://gcc.gnu.org/g:f3db50e3a41af53f87e94cd31e86f63126b8 commit r14-11876-gf3db50e3a41af53f87e94cd31e86f63126b8 Author: Jakub Jelinek Date: Thu Jul 3 22:39:39 2025 +0200 c++: Fix a pasto in the PR120471 fix [PR120940] No idea how this slipped in, I'm terribly sorry.

[gcc r15-9920] c++: Fix a pasto in the PR120471 fix [PR120940]

https://gcc.gnu.org/g:f9c43140bee94587cd60c8476db8c0e699206841 commit r15-9920-gf9c43140bee94587cd60c8476db8c0e699206841 Author: Jakub Jelinek Date: Thu Jul 3 22:39:39 2025 +0200 c++: Fix a pasto in the PR120471 fix [PR120940] No idea how this slipped in, I'm terribly sorry. S

[gcc r16-1990] c++: Fix a pasto in the PR120471 fix [PR120940]

https://gcc.gnu.org/g:dc90649466a54ab61926d88500a05f59a55cb055 commit r16-1990-gdc90649466a54ab61926d88500a05f59a55cb055 Author: Jakub Jelinek Date: Thu Jul 3 22:39:39 2025 +0200 c++: Fix a pasto in the PR120471 fix [PR120940] No idea how this slipped in, I'm terribly sorry. S

[gcc r14-11875] Ada: Remove left-overs of front-end exception mechanism

https://gcc.gnu.org/g:a9b70e4c95c8881520b789c76169e5f8a7f385cc commit r14-11875-ga9b70e4c95c8881520b789c76169e5f8a7f385cc Author: Eric Botcazou Date: Thu Jul 3 20:02:43 2025 +0200 Ada: Remove left-overs of front-end exception mechanism It was removed from the compiler a few releas

[gcc r15-9919] Ada: Remove left-overs of front-end exception mechanism

https://gcc.gnu.org/g:733cd21cfdd82d11798512cc5c4af29b9fb3adb7 commit r15-9919-g733cd21cfdd82d11798512cc5c4af29b9fb3adb7 Author: Eric Botcazou Date: Thu Jul 3 20:02:43 2025 +0200 Ada: Remove left-overs of front-end exception mechanism It was removed from the compiler a few release

[gcc r16-1989] Ada: Remove left-overs of front-end exception mechanism

https://gcc.gnu.org/g:ddab5cf206903f947f969562eb15d799891b0f47 commit r16-1989-gddab5cf206903f947f969562eb15d799891b0f47 Author: Eric Botcazou Date: Thu Jul 3 20:02:43 2025 +0200 Ada: Remove left-overs of front-end exception mechanism It was removed from the compiler a few release

[gcc(refs/users/mikael/heads/move_alloc_pre_post_v02)] fortran: Add preliminary code of MOVE_ALLOC arguments

https://gcc.gnu.org/g:5ae9342ba36fc7f7639b28997b73f3e356979768 commit 5ae9342ba36fc7f7639b28997b73f3e356979768 Author: Mikael Morin Date: Thu Jul 3 16:27:14 2025 +0200 fortran: Add preliminary code of MOVE_ALLOC arguments Add the preliminary code produced for the evaluation of arg

[gcc] Created branch 'mikael/heads/move_alloc_pre_post_v02' in namespace 'refs/users'

The branch 'mikael/heads/move_alloc_pre_post_v02' was created in namespace 'refs/users' pointing to: 5ae9342ba36f... fortran: Add preliminary code of MOVE_ALLOC arguments

[gcc r15-9918] middle-end: Fix complex lowering of cabs with no LHS [PR120369]

https://gcc.gnu.org/g:2cb1108c0929311f73fc9210d29681ba49607b8d commit r15-9918-g2cb1108c0929311f73fc9210d29681ba49607b8d Author: Andrew Pinski Date: Tue May 20 13:21:28 2025 -0700 middle-end: Fix complex lowering of cabs with no LHS [PR120369] This was introduced by r15-1797-gd8fe

[gcc r16-1988] s390: More vec-perm-const cases.

https://gcc.gnu.org/g:680ee33e1dfc24345f0a881eb96cf4431db335a9 commit r16-1988-g680ee33e1dfc24345f0a881eb96cf4431db335a9 Author: Juergen Christ Date: Fri Jun 27 12:20:04 2025 +0200 s390: More vec-perm-const cases. s390 missed constant vector permutation cases based on the vector p

[gcc r16-1987] Add myself as an aarch64 port reviewer

https://gcc.gnu.org/g:f00023fa81e657bc7019384ec4cd773f58415d82 commit r16-1987-gf00023fa81e657bc7019384ec4cd773f58415d82 Author: Andrew Pinski Date: Thu Jul 3 09:13:59 2025 -0700 Add myself as an aarch64 port reviewer As mentioned in https://inbox.sourceware.org/gcc/ea828262-8f8f

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Refactor record_function_versions.

https://gcc.gnu.org/g:1d5cfe644cd2047badb9e247dba2d3d9596e273e commit 1d5cfe644cd2047badb9e247dba2d3d9596e273e Author: Alfie Richards Date: Thu Mar 27 14:12:06 2025 + Refactor record_function_versions. Renames record_function_versions to add_function_version, and make it e

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/118886] Refine when two insns are signaled as fusion candidates

https://gcc.gnu.org/g:f7d3710a20c4cd56c09defc2dc65c4732154 commit f7d3710a20c4cd56c09defc2dc65c4732154 Author: Jeff Law Date: Thu Jul 3 06:44:31 2025 -0600 [RISC-V][PR target/118886] Refine when two insns are signaled as fusion candidates A number of folks have had their

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: testsuite: Skip tests providing -march/-mcpu for ILP32E/ILP64E ABIs

https://gcc.gnu.org/g:ef87b0d2cae7cef0cc7e80c557258af0039e5d8d commit ef87b0d2cae7cef0cc7e80c557258af0039e5d8d Author: Dimitar Dimitrov Date: Fri Jun 20 20:57:15 2025 +0300 RISC-V: testsuite: Skip tests providing -march/-mcpu for ILP32E/ILP64E ABIs Some test cases explicitly set -

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] [RISC-V] Fix shift type for RVV interleaved stepped patterns [PR120356]

https://gcc.gnu.org/g:218279a4653032325cbe13c98f8ea38a5d36 commit 218279a4653032325cbe13c98f8ea38a5d36 Author: Alexey Merzlyakov Date: Wed Jul 2 11:29:00 2025 -0600 [PATCH] [RISC-V] Fix shift type for RVV interleaved stepped patterns [PR120356] It corrects the shift type

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed] [PR rtl-optimization/120242] Fix SUBREG_PROMOTED_VAR_P after ext-dce's actions

https://gcc.gnu.org/g:c09ee710d2fe89169946e1d2909d9fa27da47b8b commit c09ee710d2fe89169946e1d2909d9fa27da47b8b Author: Jeff Law Date: Mon Jun 30 14:38:33 2025 -0600 [committed] [PR rtl-optimization/120242] Fix SUBREG_PROMOTED_VAR_P after ext-dce's actions I've gone back and forth

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Correct CFA notes for stack-clash protection [PR120714]

https://gcc.gnu.org/g:9576acb2f212389cdfb74eee325905b072a77063 commit 9576acb2f212389cdfb74eee325905b072a77063 Author: Alexey Merzlyakov Date: Mon Jun 30 13:58:29 2025 -0600 [RISC-V] Correct CFA notes for stack-clash protection [PR120714] Fixes incorrect SP-addresses used in CFA n

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] ext-dce: Don't refine live width with SUBREG mode if !TRULY_NOOP_TRUNCATION_MODES_P [PR 120050]

https://gcc.gnu.org/g:82b78b6bce0687e55834ebb8c9ec9d2a200dae0c commit 82b78b6bce0687e55834ebb8c9ec9d2a200dae0c Author: Xi Ruoyao Date: Sun May 11 16:44:31 2025 +0800 ext-dce: Don't refine live width with SUBREG mode if !TRULY_NOOP_TRUNCATION_MODES_P [PR 120050] If we see a promot

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssubu.vv combine case 1 with GR2VR cost 0, 1 and 2

https://gcc.gnu.org/g:d96b59c82b4185b29c82dddfd1adf0035a3b723e commit d96b59c82b4185b29c82dddfd1adf0035a3b723e Author: Pan Li Date: Fri Jun 27 09:09:08 2025 +0800 RISC-V: Add test for vec_duplicate + vssubu.vv combine case 1 with GR2VR cost 0, 1 and 2 Add asm dump check test for

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vssubu.vv combine case 0 with GR2VR cost 0, 2 and 15

https://gcc.gnu.org/g:780792d78294406c43acef3352bd93a35a37cbd3 commit 780792d78294406c43acef3352bd93a35a37cbd3 Author: Pan Li Date: Fri Jun 27 09:06:38 2025 +0800 RISC-V: Add test for vec_duplicate + vssubu.vv combine case 0 with GR2VR cost 0, 2 and 15 Add asm dump check and run

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Reconcile the existing test due to cost model change

https://gcc.gnu.org/g:fdc172e631327111c4ab8768c5c38fdeb3475753 commit fdc172e631327111c4ab8768c5c38fdeb3475753 Author: Pan Li Date: Fri Jun 27 11:35:18 2025 +0800 RISC-V: Reconcile the existing test due to cost model change The cost model change will make the default cost of vx to

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vssubu.vv to vssubu.vx on GR2VR cost

https://gcc.gnu.org/g:076b6cec4d441d628c31e1525fdc80821c63ccb9 commit 076b6cec4d441d628c31e1525fdc80821c63ccb9 Author: Pan Li Date: Fri Jun 27 09:02:03 2025 +0800 RISC-V: Combine vec_duplicate + vssubu.vv to vssubu.vx on GR2VR cost This patch would like to combine the vec_duplicat

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Ignore -Oz for most rvv testcase [NFC]

https://gcc.gnu.org/g:1c66ca29f0727fa749d80b2504ecf99d289dd5e2 commit 1c66ca29f0727fa749d80b2504ecf99d289dd5e2 Author: Kito Cheng Date: Mon Jun 30 14:18:07 2025 +0800 RISC-V: Ignore -Oz for most rvv testcase [NFC] Most testcase in rvv folder already ignore -Oz, but some of them

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adding B ext, fp16 and missing scalar instruction type for sifive-7 pipeline model [PR120659

https://gcc.gnu.org/g:a91fa2ad1f3f3ee4f1ee2e1b6071bf464de1b55e commit a91fa2ad1f3f3ee4f1ee2e1b6071bf464de1b55e Author: Kito Cheng Date: Tue Jun 17 16:20:19 2025 +0800 RISC-V: Adding B ext, fp16 and missing scalar instruction type for sifive-7 pipeline model [PR120659] gcc/ChangeL

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Primary vector pipeline model for sifive 7 series

https://gcc.gnu.org/g:6f0e70e339cd2f2d87d766dbcce190f464bc429c commit 6f0e70e339cd2f2d87d766dbcce190f464bc429c Author: Kito Cheng Date: Thu Jun 19 14:31:42 2025 +0800 RISC-V: Primary vector pipeline model for sifive 7 series This commit introduces a primary vector pipeline model f

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/119971] Avoid losing shift count masking

https://gcc.gnu.org/g:e520ad3e70ce45682d1f47682dee2c1e4a93f558 commit e520ad3e70ce45682d1f47682dee2c1e4a93f558 Author: Jeff Law Date: Fri Jun 27 07:00:15 2025 -0600 [RISC-V][PR target/119971] Avoid losing shift count masking Fix typo spotted by Bernhard Reutner-Fischer.

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Vector-scalar negate-multiply-(subtract-)accumulate [PR119100]

https://gcc.gnu.org/g:302682829c254743170b11680231cf1023306776 commit 302682829c254743170b11680231cf1023306776 Author: Paul-Antoine Arras Date: Thu Jun 26 13:20:49 2025 + RISC-V: Vector-scalar negate-multiply-(subtract-)accumulate [PR119100] This pattern enables the combine pa

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] Fixup dropping REG_EQUAL note in ext-dce

https://gcc.gnu.org/g:21c82c47b2c7dff14bba9e75a1e8a5a3cbbed725 commit 21c82c47b2c7dff14bba9e75a1e8a5a3cbbed725 Author: Sam James Date: Mon Jun 23 23:28:01 2025 +0100 Fixup dropping REG_EQUAL note in ext-dce Followup to r16-1613-g34e1e5e33ec3eb. remove_reg_equal_equiv_notes's 2

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add pipeline-checker script

https://gcc.gnu.org/g:ce4e56eb6e8b6ffeb0ea353b4283e5ec0a8024c5 commit ce4e56eb6e8b6ffeb0ea353b4283e5ec0a8024c5 Author: Kito Cheng Date: Thu Jun 26 17:21:27 2025 +0800 RISC-V: Add pipeline-checker script Pipeline checker utility for RISC-V architecture that validates processor

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refactor the function bitmap_union_of_preds_with_entry

https://gcc.gnu.org/g:e67bd2944d99dc1f1da4594da5075691149f7cb7 commit e67bd2944d99dc1f1da4594da5075691149f7cb7 Author: Jin Ma Date: Sat Jun 28 19:55:00 2025 +0800 RISC-V: Refactor the function bitmap_union_of_preds_with_entry The current implementation of this function is somewhat

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [sanitizer_common] Fix build on ppc64+musl (#120036)

https://gcc.gnu.org/g:040d02cb21f928c77ac8b976d69f1f6c8fa26683 commit 040d02cb21f928c77ac8b976d69f1f6c8fa26683 Author: Jeff Law Date: Fri Jun 27 15:11:41 2025 -0600 [sanitizer_common] Fix build on ppc64+musl (#120036) Cherry picked from LLVM commit 801b519dfd01e21da0be17aa8f8dc2ce

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix build issue

https://gcc.gnu.org/g:eef3fd51a8c4a612fb627e386d0bc80dbb66f506 commit eef3fd51a8c4a612fb627e386d0bc80dbb66f506 Author: Kito Cheng Date: Thu Jun 26 14:35:47 2025 +0800 RISC-V: Fix build issue Apparently I forgot to squash this fix into the previous commit before I push...

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: update prepare_ternary_operands to handle vector-scalar case [PR120828]

https://gcc.gnu.org/g:20e57a6541e283186ec5e26552149f454af27cc7 commit 20e57a6541e283186ec5e26552149f454af27cc7 Author: Paul-Antoine Arras Date: Wed Jun 25 16:42:00 2025 + RISC-V: update prepare_ternary_operands to handle vector-scalar case [PR120828] This is a followup to 92e

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add comment and reorder the the include files in riscv.md [NFC]

https://gcc.gnu.org/g:64af55c82a125e3fc6b0a601e0e50bbe78f6f6fc commit 64af55c82a125e3fc6b0a601e0e50bbe78f6f6fc Author: Kito Cheng Date: Thu Jun 26 14:26:57 2025 +0800 RISC-V: Add comment and reorder the the include files in riscv.md [NFC] This patch adds a comment to the riscv.md

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add Profiles RVA/B23S64 support.

https://gcc.gnu.org/g:95c6127a2b69e654688072cc6d758a3778f45726 commit 95c6127a2b69e654688072cc6d758a3778f45726 Author: Jiawei Date: Tue Jun 24 17:34:05 2025 +0800 RISC-V: Add Profiles RVA/B23S64 support. This patch adds support for the RISC-V Profiles RVA23S64 and RVB23S64.

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V

https://gcc.gnu.org/g:4e8970b53e39c6589119e505873e6f994e97201f commit 4e8970b53e39c6589119e505873e6f994e97201f Author: Jeff Law Date: Sat Jun 21 08:24:58 2025 -0600 [RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V The RISC-V prefetch support is broken i

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add patterns for vector-scalar multiply-(subtract-)accumulate [PR119100]

https://gcc.gnu.org/g:cbdf7944671243ff85bcda589fc138146ad8e4d7 commit cbdf7944671243ff85bcda589fc138146ad8e4d7 Author: Paul-Antoine Arras Date: Tue Jun 24 15:42:50 2025 -0600 RISC-V: Add patterns for vector-scalar multiply-(subtract-)accumulate [PR119100] This pattern enables the

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V

https://gcc.gnu.org/g:d08eceb84cca404dc0417ea69cd7ef9d7bae1ced commit d08eceb84cca404dc0417ea69cd7ef9d7bae1ced Author: Jeff Law Date: Mon Jun 23 18:27:49 2025 -0600 [RISC-V][PR target/118241] Fix data prefetch predicate/constraint for RISC-V Fix typo in comment spotted by Peter B.

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsaddu.vv combine case 1 with GR2VR cost 0, 1 and 2

https://gcc.gnu.org/g:8712876f6c44061432fb81540e13c9f7f91c6ac7 commit 8712876f6c44061432fb81540e13c9f7f91c6ac7 Author: Pan Li Date: Sat Jun 21 10:07:38 2025 +0800 RISC-V: Add test for vec_duplicate + vsaddu.vv combine case 1 with GR2VR cost 0, 1 and 2 Add asm dump check test for

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vsaddu.vv combine case 0 with GR2VR cost 0, 2 and 15

https://gcc.gnu.org/g:68deb26b4f661a13c3e489ef8079ac885d194cf4 commit 68deb26b4f661a13c3e489ef8079ac885d194cf4 Author: Pan Li Date: Sat Jun 21 09:10:07 2025 +0800 RISC-V: Add test for vec_duplicate + vsaddu.vv combine case 0 with GR2VR cost 0, 2 and 15 Add asm dump check and run

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V][PR target/119830] Fix RISC-V codegen on 32bit hosts

https://gcc.gnu.org/g:2e8d2d138d795cd8e1b7899e560701cf20201a47 commit 2e8d2d138d795cd8e1b7899e560701cf20201a47 Author: Andrew Pinski Date: Sun Jun 22 12:35:19 2025 -0600 [RISC-V][PR target/119830] Fix RISC-V codegen on 32bit hosts So this is Andrew's patch from the PR. We weren't

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vsaddu.vv to vsaddu.vx on GR2VR cost

https://gcc.gnu.org/g:fe2c046f055e14646f7e2908c135e6a3cf1973c7 commit fe2c046f055e14646f7e2908c135e6a3cf1973c7 Author: Pan Li Date: Sat Jun 21 09:00:16 2025 +0800 RISC-V: Combine vec_duplicate + vsaddu.vv to vsaddu.vx on GR2VR cost This patch would like to combine the vec_duplicat

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [committed][PR rtl-optimization/120550] Drop REG_EQUAL note after ext-dce transformation

https://gcc.gnu.org/g:4e879da55a35790c1c75fa71328bc0425fd5898c commit 4e879da55a35790c1c75fa71328bc0425fd5898c Author: Jeff Law Date: Sun Jun 22 12:06:08 2025 -0600 [committed][PR rtl-optimization/120550] Drop REG_EQUAL note after ext-dce transformation This bug was found by Edwi

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Fix ICE for expand_select_vldi [PR120652]

https://gcc.gnu.org/g:44ac6ec10ded179bc9794fb019b8280658c4e7fb commit 44ac6ec10ded179bc9794fb019b8280658c4e7fb Author: Pan Li Date: Thu Jun 19 18:58:17 2025 +0800 RISC-V: Fix ICE for expand_select_vldi [PR120652] The will be one ICE when expand pass, the bt similar as below.

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Force several tests to use rocket tuning

https://gcc.gnu.org/g:1db0924426c7e2f1c2692079855a1999179a3f6b commit 1db0924426c7e2f1c2692079855a1999179a3f6b Author: Jeff Law Date: Thu Jun 19 20:58:56 2025 -0600 [RISC-V] Force several tests to use rocket tuning My tester has been flagging these regressions since the default co

[gcc r15-9917] libstdc++: Update LWG 4166 changes to concat_view::end() [PR120934]

https://gcc.gnu.org/g:612690936f5ddd122b60cf843cb4f40ae7ede436 commit r15-9917-g612690936f5ddd122b60cf843cb4f40ae7ede436 Author: Patrick Palka Date: Thu Jul 3 10:55:17 2025 -0400 libstdc++: Update LWG 4166 changes to concat_view::end() [PR120934] In r15-4555-gf191c830154565 we pro

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH] RISC-V: Use builtin clz/ctz when count_leading_zeros and count_trailing_zeros is used

https://gcc.gnu.org/g:ac124f4a0405aa34a04943d8d55dedd02233258c commit ac124f4a0405aa34a04943d8d55dedd02233258c Author: Sosutha Sethuramapandian Date: Thu Jun 19 20:53:56 2025 -0600 [PATCH] RISC-V: Use builtin clz/ctz when count_leading_zeros and count_trailing_zeros is used longl

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vminu.vv combine case 1 with GR2VR cost 0, 1 and 2

https://gcc.gnu.org/g:b319ccfa4f8fb971baf62fac46e39bf7158d15a9 commit b319ccfa4f8fb971baf62fac46e39bf7158d15a9 Author: Pan Li Date: Thu Jun 19 10:49:07 2025 +0800 RISC-V: Add test for vec_duplicate + vminu.vv combine case 1 with GR2VR cost 0, 1 and 2 Add asm dump check test for v

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vminu.vv combine case 0 with GR2VR cost 0, 2 and 15

https://gcc.gnu.org/g:dddb4eaa80d2500c920e58b80d7aa0bbba9107f8 commit dddb4eaa80d2500c920e58b80d7aa0bbba9107f8 Author: Pan Li Date: Thu Jun 19 10:47:33 2025 +0800 RISC-V: Add test for vec_duplicate + vminu.vv combine case 0 with GR2VR cost 0, 2 and 15 Add asm dump check and run t

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vminu.vv to vminu.vx on GR2VR cost

https://gcc.gnu.org/g:d384bfb5ecc16e2d25adc43a6ef451c983dac7df commit d384bfb5ecc16e2d25adc43a6ef451c983dac7df Author: Pan Li Date: Thu Jun 19 10:44:14 2025 +0800 RISC-V: Combine vec_duplicate + vminu.vv to vminu.vx on GR2VR cost This patch would like to combine the vec_duplicate

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add generic tune as default.

https://gcc.gnu.org/g:209297cd3530972b8ad2e5d14c6dc96bb5d8b2ac commit 209297cd3530972b8ad2e5d14c6dc96bb5d8b2ac Author: Dongyan Chen Date: Wed Jun 18 19:47:28 2025 +0800 RISC-V: Add generic tune as default. According to the discussion in https://gcc.gnu.org/pipermail/gcc-patche

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Use riscv_2x_xlen_mode_p [NFC]

https://gcc.gnu.org/g:bff5289ba64ac8785ef1f73d3f4b30b447801da8 commit bff5289ba64ac8785ef1f73d3f4b30b447801da8 Author: Kito Cheng Date: Tue Jun 17 13:01:01 2025 +0800 RISC-V: Use riscv_2x_xlen_mode_p [NFC] Use riscv_v_ext_mode_p to check the mode size is 2x XLEN, instead of us

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Adding cost model for zilsd

https://gcc.gnu.org/g:f6691d5f69ae5928bc6f9452fd4122101debfd41 commit f6691d5f69ae5928bc6f9452fd4122101debfd41 Author: Kito Cheng Date: Tue Jun 17 12:56:17 2025 +0800 RISC-V: Adding cost model for zilsd Motivation of this patch is we want to use ld/sd if possible when zilsd is

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmin.vv combine case 1 with GR2VR cost 0, 1 and 2

https://gcc.gnu.org/g:f2192cd50d57966da1a538862de5b9cdc123c35b commit f2192cd50d57966da1a538862de5b9cdc123c35b Author: Pan Li Date: Tue Jun 17 10:08:44 2025 +0800 RISC-V: Add test for vec_duplicate + vmin.vv combine case 1 with GR2VR cost 0, 1 and 2 Add asm dump check test for ve

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add test for vec_duplicate + vmin.vv combine case 0 with GR2VR cost 0, 2 and 15

https://gcc.gnu.org/g:0b1f5033411fa875ac2a5438dc939fcbdfbf6f7d commit 0b1f5033411fa875ac2a5438dc939fcbdfbf6f7d Author: Pan Li Date: Tue Jun 17 10:05:33 2025 +0800 RISC-V: Add test for vec_duplicate + vmin.vv combine case 0 with GR2VR cost 0, 2 and 15 Add asm dump check and run te

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Combine vec_duplicate + vmin.vv to vmin.vx on GR2VR cost

https://gcc.gnu.org/g:105cb2db4ae6a5baa71a7d97fe3a011d3e0298a0 commit 105cb2db4ae6a5baa71a7d97fe3a011d3e0298a0 Author: Pan Li Date: Tue Jun 17 10:00:54 2025 +0800 RISC-V: Combine vec_duplicate + vmin.vv to vmin.vx on GR2VR cost This patch would like to combine the vec_duplicate +

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [PATCH v1] RISC-V: Use scratch reg for loop control

https://gcc.gnu.org/g:e2f93299f84df050dfcd9a644eb6faed87c79fc6 commit e2f93299f84df050dfcd9a644eb6faed87c79fc6 Author: Umesh Kalappa Date: Tue Jun 17 07:23:41 2025 -0600 [PATCH v1] RISC-V: Use scratch reg for loop control By using the scratch register for loop control rather than

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add -fno-pie flags to testcases

https://gcc.gnu.org/g:b11a59c708d6b35aeb5995695e2bd53f8b341461 commit b11a59c708d6b35aeb5995695e2bd53f8b341461 Author: Kito Cheng Date: Tue Jun 17 12:52:00 2025 +0800 RISC-V: Add -fno-pie flags to testcases PIE may cause some code gen difference in the testcases, that will cause

[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refine VX combine test case 0 to avoid code duplication

https://gcc.gnu.org/g:d683e1237df906abaa3de70896f07ef7ecd07b7a commit d683e1237df906abaa3de70896f07ef7ecd07b7a Author: Pan Li Date: Sun Jun 15 16:28:38 2025 +0800 RISC-V: Refine VX combine test case 0 to avoid code duplication The case 0 for vx combine def functions are most the s

[gcc/devel/omp/gcc-15] ChangeLog.omp bump

/ChangeLog.omp | 11 +++ 3 files changed, 20 insertions(+), 1 deletion(-) diff --git a/gcc/DATESTAMP.omp b/gcc/DATESTAMP.omp index aaa22e3d56a0..695297928f69 100644 --- a/gcc/DATESTAMP.omp +++ b/gcc/DATESTAMP.omp @@ -1 +1 @@ -20250617 +20250703 diff --git a/gcc/testsuite/ChangeLog.omp

[gcc/devel/omp/gcc-15] OpenMP: Add omp_get_initial_device/omp_get_num_devices builtins: Fix test cases

https://gcc.gnu.org/g:7abb8d05c3a7ef3df5a8a477bda72ceaf0b1cd42 commit 7abb8d05c3a7ef3df5a8a477bda72ceaf0b1cd42 Author: Thomas Schwinge Date: Thu Jul 3 14:44:21 2025 +0200 OpenMP: Add omp_get_initial_device/omp_get_num_devices builtins: Fix test cases With this fix-up for commit 3

[gcc/devel/omp/gcc-15] libgomp: Fix up omp_target_memset-3.c test for C++ [PR120444]

https://gcc.gnu.org/g:78c6033c44731e5fcb4d5453bab2f180ef7fc5d7 commit 78c6033c44731e5fcb4d5453bab2f180ef7fc5d7 Author: Jakub Jelinek Date: Tue Jun 3 07:54:37 2025 +0200 libgomp: Fix up omp_target_memset-3.c test for C++ [PR120444] The test PASSes for C, but FAILs for C++: .../

[gcc r16-1986] libstdc++: Update LWG 4166 changes to concat_view::end() [PR120934]

https://gcc.gnu.org/g:c5a17e92ebf0c6f3887fb5698a1114a3fdf50576 commit r16-1986-gc5a17e92ebf0c6f3887fb5698a1114a3fdf50576 Author: Patrick Palka Date: Thu Jul 3 10:55:17 2025 -0400 libstdc++: Update LWG 4166 changes to concat_view::end() [PR120934] In r15-4555-gf191c830154565 we pro

[gcc r15-9916] c++: uninitialized TARGET_EXPR and constexpr [PR120684]

https://gcc.gnu.org/g:6b19e40f982829c460439d270d34c5c848d90c6e commit r15-9916-g6b19e40f982829c460439d270d34c5c848d90c6e Author: Jason Merrill Date: Wed Jul 2 18:03:57 2025 -0400 c++: uninitialized TARGET_EXPR and constexpr [PR120684] In r15-7532 for PR118856 I introduced a TARGET

[gcc r15-9915] libstdc++: Fix regression in std::uninitialized_fill for C++98 [PR120931]

https://gcc.gnu.org/g:c612c500de3804b330090fe478b5e055944ff8b2 commit r15-9915-gc612c500de3804b330090fe478b5e055944ff8b2 Author: Jonathan Wakely Date: Wed Jul 2 21:54:06 2025 +0100 libstdc++: Fix regression in std::uninitialized_fill for C++98 [PR120931] A typo in r15-4473-g3abe75

[gcc r16-1985] OpenMP: Add omp_get_initial_device/omp_get_num_devices builtins: Fix test cases

https://gcc.gnu.org/g:13c766066e23eb6ddf6bad7a5664b9d3ca8c1974 commit r16-1985-g13c766066e23eb6ddf6bad7a5664b9d3ca8c1974 Author: Thomas Schwinge Date: Thu Jul 3 14:44:21 2025 +0200 OpenMP: Add omp_get_initial_device/omp_get_num_devices builtins: Fix test cases With this fix-up fo

[gcc r16-1984] [RISC-V][PR target/118886] Refine when two insns are signaled as fusion candidates

https://gcc.gnu.org/g:83d19b5d842dadc1720b57486d4675a238966ba4 commit r16-1984-g83d19b5d842dadc1720b57486d4675a238966ba4 Author: Jeff Law Date: Thu Jul 3 06:44:31 2025 -0600 [RISC-V][PR target/118886] Refine when two insns are signaled as fusion candidates A number of folks have

[gcc r16-1983] testsuite: Fix gcc.dg/ipa/pr120295.c on Solaris

https://gcc.gnu.org/g:22edba0d9c932f48545ccf60c278dd7ce299cc53 commit r16-1983-g22edba0d9c932f48545ccf60c278dd7ce299cc53 Author: Rainer Orth Date: Thu Jul 3 14:05:59 2025 +0200 testsuite: Fix gcc.dg/ipa/pr120295.c on Solaris gcc.dg/ipa/pr120295.c FAILs on Solaris: FAIL: g

[gcc r15-9914] Fortran: Fix out of bounds access in structure constructor's clean up [PR120711]

https://gcc.gnu.org/g:8b7a779b85df65a29fe3820886cbd72663b6dba4 commit r15-9914-g8b7a779b85df65a29fe3820886cbd72663b6dba4 Author: Andre Vehreschild Date: Wed Jun 25 09:12:35 2025 +0200 Fortran: Fix out of bounds access in structure constructor's clean up [PR120711] A structure con

[gcc r16-1981] AArch64: rules for CMPBR instructions

https://gcc.gnu.org/g:2e95ef6ca3e97b8d66110b3d0cdc144dec56fb3b commit r16-1981-g2e95ef6ca3e97b8d66110b3d0cdc144dec56fb3b Author: Karl Meakin Date: Thu Jul 3 12:48:33 2025 +0100 AArch64: rules for CMPBR instructions Add rules for lowering `cbranch4` to CBB/CBH/CB when CMPBR ext

[gcc r16-1982] AArch64: make rules for CBZ/TBZ higher priority

https://gcc.gnu.org/g:44b9769593ac8bb01f869e0505f447d9dfe8add5 commit r16-1982-g44b9769593ac8bb01f869e0505f447d9dfe8add5 Author: Karl Meakin Date: Thu Jul 3 12:48:34 2025 +0100 AArch64: make rules for CBZ/TBZ higher priority Move the rules for CBZ/TBZ to be above the rules for

[gcc r16-1980] AArch64: precommit test for CMPBR instructions

https://gcc.gnu.org/g:bda03ce9125af8910e77b407a701a76b93b5ba57 commit r16-1980-gbda03ce9125af8910e77b407a701a76b93b5ba57 Author: Karl Meakin Date: Thu Jul 3 12:48:32 2025 +0100 AArch64: precommit test for CMPBR instructions Commit the test file `cmpbr.c` before rules for generatin

[gcc r16-1978] AArch64: make `far_branch` attribute a boolean

https://gcc.gnu.org/g:6cc3cdddeb362b827b5d1f97a21291623cb1bd3a commit r16-1978-g6cc3cdddeb362b827b5d1f97a21291623cb1bd3a Author: Karl Meakin Date: Thu Jul 3 12:48:30 2025 +0100 AArch64: make `far_branch` attribute a boolean The `far_branch` attribute only ever takes the values 0 o

[gcc r16-1979] AArch64: recognize `+cmpbr` option

https://gcc.gnu.org/g:2e021e34ea18d88fde8ae3b7400828d054d6d4af commit r16-1979-g2e021e34ea18d88fde8ae3b7400828d054d6d4af Author: Karl Meakin Date: Thu Jul 3 12:48:31 2025 +0100 AArch64: recognize `+cmpbr` option Add the `+cmpbr` option to enable the FEAT_CMPBR architectural ex

[gcc r16-1977] AArch64: add constants for branch displacements

https://gcc.gnu.org/g:70905bad8ea7e9e5f807b54ad3fe183f643cdbf2 commit r16-1977-g70905bad8ea7e9e5f807b54ad3fe183f643cdbf2 Author: Karl Meakin Date: Thu Jul 3 12:48:29 2025 +0100 AArch64: add constants for branch displacements Extract the hardcoded values for the minimum PC-relative

[gcc r16-1975] AArch64: reformat branch instruction rules

https://gcc.gnu.org/g:cfb1a083e16507feb8bbb85903611aac3772aaef commit r16-1975-gcfb1a083e16507feb8bbb85903611aac3772aaef Author: Karl Meakin Date: Thu Jul 3 12:48:28 2025 +0100 AArch64: reformat branch instruction rules Make the formatting of the RTL templates in the rules for bra

[gcc r16-1976] AArch64: rename branch instruction rules

https://gcc.gnu.org/g:2cc9b03a84601b7951e5e0a24f5174387f564f27 commit r16-1976-g2cc9b03a84601b7951e5e0a24f5174387f564f27 Author: Karl Meakin Date: Thu Jul 3 12:48:28 2025 +0100 AArch64: rename branch instruction rules Give the `define_insn` rules used in lowering `cbranch4` to RTL

[gcc r16-1974] AArch64: place branch instruction rules together

https://gcc.gnu.org/g:53242a56844e484e8694dc073be607f16ebbd8d4 commit r16-1974-g53242a56844e484e8694dc073be607f16ebbd8d4 Author: Karl Meakin Date: Thu Jul 3 12:48:27 2025 +0100 AArch64: place branch instruction rules together The rules for conditional branches were spread througho

[gcc r16-1973] libstdc++: construct bitset from string_view (P2697) [PR119742]

https://gcc.gnu.org/g:9930876ed788a7da18ccef0c91f4f12749da1df7 commit r16-1973-g9930876ed788a7da18ccef0c91f4f12749da1df7 Author: Nathan Myers Date: Mon Jun 30 18:55:48 2025 -0400 libstdc++: construct bitset from string_view (P2697) [PR119742] Add a bitset constructor from string_v

[gcc r16-1972] tree-optimization/120780: Support object size for containing objects

https://gcc.gnu.org/g:72e85d46472716e670cbe6e967109473b8d12d38 commit r16-1972-g72e85d46472716e670cbe6e967109473b8d12d38 Author: Siddhesh Poyarekar Date: Thu Jun 26 17:46:00 2025 -0400 tree-optimization/120780: Support object size for containing objects MEM_REF cast of a subobject

[gcc r16-1971] x86: Emit label only for __mcount_loc section

https://gcc.gnu.org/g:349da53f13de274864d01b6ccc466961c472dbe1 commit r16-1971-g349da53f13de274864d01b6ccc466961c472dbe1 Author: H.J. Lu Date: Thu Jul 3 10:13:48 2025 +0800 x86: Emit label only for __mcount_loc section commit ecc81e33123d7ac9c11742161e128858d844b99d Author: An

[gcc r16-1970] Add -Wauto-profile warning

https://gcc.gnu.org/g:99f9e90160cb83b09ec7421e9b53e4fffe3ee5ec commit r16-1970-g99f9e90160cb83b09ec7421e9b53e4fffe3ee5ec Author: Jan Hubicka Date: Thu Jul 3 12:05:45 2025 +0200 Add -Wauto-profile warning this patch adds new warning -Wauto-profile which warns about mismatches betw

[gcc r15-9911] ada: Fix missing error on too large Component_Size not multiple of storage unit

https://gcc.gnu.org/g:a30e425255a3bde94b4669624903bee3f1f1662f commit r15-9911-ga30e425255a3bde94b4669624903bee3f1f1662f Author: Eric Botcazou Date: Fri May 2 01:30:56 2025 +0200 ada: Fix missing error on too large Component_Size not multiple of storage unit This is a small regre

[gcc r15-9913] ada: Fix alignment violation for mix of aligned and misaligned composite types

https://gcc.gnu.org/g:22b8806a627d83ccd65dd84668098c954d1f9597 commit r15-9913-g22b8806a627d83ccd65dd84668098c954d1f9597 Author: Eric Botcazou Date: Mon May 26 09:25:57 2025 +0200 ada: Fix alignment violation for mix of aligned and misaligned composite types This happens when the

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