[gcc r15-5666] Optimize 128-bit vector permutation with pand, pandn and por.

https://gcc.gnu.org/g:60b708a9c878aff9a76ec0d446ae63e6527327a6 commit r15-5666-g60b708a9c878aff9a76ec0d446ae63e6527327a6 Author: Cui, Lili Date: Tue Nov 26 15:10:23 2024 +0800 Optimize 128-bit vector permutation with pand, pandn and por. This patch introduces a new subroutine in i

[gcc r15-5665] i386/testsuite: Correct AVX10.2 FP8 test mask usage

https://gcc.gnu.org/g:efb1d2e2368e60da3c691ee3cb510ee690d1fa2a commit r15-5665-gefb1d2e2368e60da3c691ee3cb510ee690d1fa2a Author: Haochen Jiang Date: Fri Nov 22 15:57:47 2024 +0800 i386/testsuite: Correct AVX10.2 FP8 test mask usage Under FP8, we should not use AVX512F_LEN_HALF to

[gcc r15-5664] c: Fix ICEs from invalid atomic compound assignment [PR98195, PR117755]

https://gcc.gnu.org/g:980929bdb80f1a1490caab5acc6d9740e0f9b539 commit r15-5664-g980929bdb80f1a1490caab5acc6d9740e0f9b539 Author: Joseph Myers Date: Tue Nov 26 03:25:44 2024 + c: Fix ICEs from invalid atomic compound assignment [PR98195, PR117755] As reported in bug 98195, ther

[gcc r12-10832] Fix uninitialized operands[2] in vec_unpacks_hi_v4sf.

https://gcc.gnu.org/g:89a27cf6b1354cc80d834d71f7a3aa137d605e94 commit r12-10832-g89a27cf6b1354cc80d834d71f7a3aa137d605e94 Author: liuhongt Date: Thu Nov 21 23:57:38 2024 -0800 Fix uninitialized operands[2] in vec_unpacks_hi_v4sf. It could cause weired spill in RA when register pre

[gcc r13-9216] Fix uninitialized operands[2] in vec_unpacks_hi_v4sf.

https://gcc.gnu.org/g:0eb8c19cb45fc004b7039fa22ff9021604d80dbc commit r13-9216-g0eb8c19cb45fc004b7039fa22ff9021604d80dbc Author: liuhongt Date: Thu Nov 21 23:57:38 2024 -0800 Fix uninitialized operands[2] in vec_unpacks_hi_v4sf. It could cause weired spill in RA when register pres

[gcc r15-5662] PR modula2/117777: m2 does not allow single const string in asm volatile

https://gcc.gnu.org/g:e6d26a21e0369081491941552900ab3cbfdd18a4 commit r15-5662-ge6d26a21e0369081491941552900ab3cbfdd18a4 Author: Gaius Mulley Date: Mon Nov 25 22:46:16 2024 + PR modula2/11: m2 does not allow single const string in asm volatile gm2 does not allow single con

[gcc r15-5661] build: Move sstream include above safe-ctype.h {PR117771]

https://gcc.gnu.org/g:f6e00226a4ca63e76e3e0b3a09a4ce6223980981 commit r15-5661-gf6e00226a4ca63e76e3e0b3a09a4ce6223980981 Author: Andrew Pinski Date: Mon Nov 25 14:03:27 2024 -0800 build: Move sstream include above safe-ctype.h {PR117771] sstream in some versions of libstdc++ inclu

[gcc r13-9214] libcpp: Fix ICE lexing invalid raw string in a deferred pragma [PR117118]

https://gcc.gnu.org/g:9f0c207d4534a909ec04f9ffa306718154e67d70 commit r13-9214-g9f0c207d4534a909ec04f9ffa306718154e67d70 Author: Lewis Hyatt Date: Mon Oct 14 17:59:46 2024 -0400 libcpp: Fix ICE lexing invalid raw string in a deferred pragma [PR117118] The PR shows that we ICE afte

[gcc r15-5660] sibcall: Check partial != 0 for BLKmode argument

https://gcc.gnu.org/g:c61576d89eb0fead37be39fcf0764bb915ea201f commit r15-5660-gc61576d89eb0fead37be39fcf0764bb915ea201f Author: H.J. Lu Date: Sun Oct 13 04:53:14 2024 +0800 sibcall: Check partial != 0 for BLKmode argument The outgoing stack slot size may be different from the BLK

[gcc r15-5659] hppa: Revise TImode aritmetic patterns to support arith11_operands

https://gcc.gnu.org/g:22b13b1d4e3dce6bbc8792ffa08cefeb5e125a03 commit r15-5659-g22b13b1d4e3dce6bbc8792ffa08cefeb5e125a03 Author: John David Anglin Date: Mon Nov 25 16:40:29 2024 -0500 hppa: Revise TImode aritmetic patterns to support arith11_operands 2024-11-25 John David Anglin

[gcc r14-10980] libcpp: Fix ICE lexing invalid raw string in a deferred pragma [PR117118]

https://gcc.gnu.org/g:9214e3fdf914dd2b687f13980c39ac2db7b1565f commit r14-10980-g9214e3fdf914dd2b687f13980c39ac2db7b1565f Author: Lewis Hyatt Date: Mon Oct 14 17:59:46 2024 -0400 libcpp: Fix ICE lexing invalid raw string in a deferred pragma [PR117118] The PR shows that we ICE aft

[gcc r15-5658] [PR117105][LRA]: Use unique value reload pseudo for early clobber operand

https://gcc.gnu.org/g:4b09e2c67ef593db171b0755b46378964421782b commit r15-5658-g4b09e2c67ef593db171b0755b46378964421782b Author: Vladimir N. Makarov Date: Mon Nov 25 16:09:00 2024 -0500 [PR117105][LRA]: Use unique value reload pseudo for early clobber operand LRA did not generate

[gcc r15-5657] i386: Generalize x >> 32-y to x >> -y conversion with multiples of 32

https://gcc.gnu.org/g:551fd4d5c98859522dd21db6fbb39fceac3936b2 commit r15-5657-g551fd4d5c98859522dd21db6fbb39fceac3936b2 Author: Uros Bizjak Date: Mon Nov 25 20:04:38 2024 +0100 i386: Generalize x >> 32-y to x >> -y conversion with multiples of 32 Optimize also cases where immedia

[gcc r15-5656] Regeernate .opt.urls after nios2 removal

https://gcc.gnu.org/g:9afcbc2dd3cd2dfe90c91ddfa71a49e571ad5e61 commit r15-5656-g9afcbc2dd3cd2dfe90c91ddfa71a49e571ad5e61 Author: Andrew Pinski Date: Mon Nov 25 10:29:07 2024 -0800 Regeernate .opt.urls after nios2 removal The index markers changed slightly when nios2 were removed.

[gcc r15-5654] Fortran: Check IMPURE in BLOCK inside DO CONCURRENT.

https://gcc.gnu.org/g:7d92901c878c6c00ada7f9cee8825f03ad4722f1 commit r15-5654-g7d92901c878c6c00ada7f9cee8825f03ad4722f1 Author: Steve Kargl Date: Sun Nov 24 18:26:03 2024 -0800 Fortran: Check IMPURE in BLOCK inside DO CONCURRENT. PR fortran/117765 gcc/fortran/Cha

[gcc r15-5653] RISC-V: Ensure vtype for full-register moves [PR117544].

https://gcc.gnu.org/g:b82a5810e7bcc82b933e16f9067879b9d22b85c7 commit r15-5653-gb82a5810e7bcc82b933e16f9067879b9d22b85c7 Author: Robin Dapp Date: Thu Nov 21 14:49:53 2024 +0100 RISC-V: Ensure vtype for full-register moves [PR117544]. As discussed in PR117544 the VTYPE register is

[gcc r15-5652] genemit: Distribute evenly to files [PR111600].

https://gcc.gnu.org/g:2e6b3308af6ddf87925321ddd2d387bfd352e410 commit r15-5652-g2e6b3308af6ddf87925321ddd2d387bfd352e410 Author: Robin Dapp Date: Thu Nov 21 15:34:37 2024 +0100 genemit: Distribute evenly to files [PR111600]. currently we distribute insn patterns in genemit, partit

[gcc r15-5651] target/116760 - 416.gamess slowdown with SLP

https://gcc.gnu.org/g:cd8db107b9bef73fd822ffb420f96ed2bc622a19 commit r15-5651-gcd8db107b9bef73fd822ffb420f96ed2bc622a19 Author: Richard Biener Date: Mon Nov 25 13:32:15 2024 +0100 target/116760 - 416.gamess slowdown with SLP For the TWOTFF loop vectorization the backend scales co

[gcc r15-5650] Add extra 64bit SSE vector epilogue in some cases

https://gcc.gnu.org/g:d9c908b75039653f2b7717b4b7cdffdc4f0fcc7d commit r15-5650-gd9c908b75039653f2b7717b4b7cdffdc4f0fcc7d Author: Richard Biener Date: Fri Nov 22 13:58:08 2024 +0100 Add extra 64bit SSE vector epilogue in some cases Similar to the X86_TUNE_AVX512_TWO_EPILOGUES tunin

[gcc r15-5649] tree-optimization/117767 - VMAT_STRIDED_SLP and alignment

https://gcc.gnu.org/g:0b47d7579e84daa4dfa16baef1133ab73adc502d commit r15-5649-g0b47d7579e84daa4dfa16baef1133ab73adc502d Author: Richard Biener Date: Mon Nov 25 09:46:28 2024 +0100 tree-optimization/117767 - VMAT_STRIDED_SLP and alignment This plugs another hole in alignment check

[gcc r14-10979] Fix uninitialized operands[2] in vec_unpacks_hi_v4sf.

https://gcc.gnu.org/g:4a63cc6de77481878ec31e1e6ac30e22c50b063a commit r14-10979-g4a63cc6de77481878ec31e1e6ac30e22c50b063a Author: liuhongt Date: Thu Nov 21 23:57:38 2024 -0800 Fix uninitialized operands[2] in vec_unpacks_hi_v4sf. It could cause weired spill in RA when register pre

[gcc r15-5648] libsanitizer: Remove -pedantic from AM_CXXFLAGS [PR117732]

https://gcc.gnu.org/g:e984ba40aa0c1fa3460e0266deb59b9036ba8454 commit r15-5648-ge984ba40aa0c1fa3460e0266deb59b9036ba8454 Author: Jakub Jelinek Date: Mon Nov 25 09:36:41 2024 +0100 libsanitizer: Remove -pedantic from AM_CXXFLAGS [PR117732] We aren't the master repository for the sa

[gcc r15-5647] testsuite: Fix up various powerpc tests after -std=gnu23 by default switch [PR117663]

https://gcc.gnu.org/g:a51dbaefdd93b3bcce6e1d7b49f01a1cabf6f39b commit r15-5647-ga51dbaefdd93b3bcce6e1d7b49f01a1cabf6f39b Author: Jakub Jelinek Date: Mon Nov 25 09:31:23 2024 +0100 testsuite: Fix up various powerpc tests after -std=gnu23 by default switch [PR117663] These tests us