[gcc r15-5054] Update gcc-auto-profile / gen_autofdo_event.py

2024-11-08 Thread Andi Kleen via Gcc-cvs
https://gcc.gnu.org/g:9c8f3d5e7d5ee64ffe5c50a72b087227f2e8f957 commit r15-5054-g9c8f3d5e7d5ee64ffe5c50a72b087227f2e8f957 Author: Andi Kleen Date: Thu Oct 31 16:31:02 2024 -0700 Update gcc-auto-profile / gen_autofdo_event.py - Fix warnings with newer python versions about bad escap

[gcc r15-5053] c: Implement C2y N3356, if declarations [PR117019]

2024-11-08 Thread Marek Polacek via Gcc-cvs
https://gcc.gnu.org/g:440be01b07941506d1c8819448bd17c8717d55f5 commit r15-5053-g440be01b07941506d1c8819448bd17c8717d55f5 Author: Marek Polacek Date: Thu Oct 31 09:28:15 2024 -0400 c: Implement C2y N3356, if declarations [PR117019] This patch implements C2y N3356, if declarations a

[gcc r15-5052] hppa: Don't allow mode size 32 in hard registers

2024-11-08 Thread John David Anglin via Gcc-cvs
https://gcc.gnu.org/g:7175fece7df50326703e4ca8b49d7cc93a5e8dfe commit r15-5052-g7175fece7df50326703e4ca8b49d7cc93a5e8dfe Author: John David Anglin Date: Fri Nov 8 16:58:49 2024 -0500 hppa: Don't allow mode size 32 in hard registers LRA has problems handling spills for OI mode. Th

[gcc r14-10911] hppa: Don't use '%' operator in base14_operand

2024-11-08 Thread John David Anglin via Gcc-cvs
https://gcc.gnu.org/g:3bc7af0e2b06131465b8de560692c7011b45cf22 commit r14-10911-g3bc7af0e2b06131465b8de560692c7011b45cf22 Author: John David Anglin Date: Fri Nov 8 16:54:48 2024 -0500 hppa: Don't use '%' operator in base14_operand Division is slow on hppa and mode sizes are powers

[gcc r15-5051] hppa: Don't use '%' operator in base14_operand

2024-11-08 Thread John David Anglin via Gcc-cvs
https://gcc.gnu.org/g:c9db5322ae39a49db0728a0a4cb5003efb6ae668 commit r15-5051-gc9db5322ae39a49db0728a0a4cb5003efb6ae668 Author: John David Anglin Date: Fri Nov 8 16:54:48 2024 -0500 hppa: Don't use '%' operator in base14_operand Division is slow on hppa and mode sizes are powers

[gcc r15-5050] hppa: Don't allow large modes in hard registers

2024-11-08 Thread John David Anglin via Gcc-cvs
https://gcc.gnu.org/g:3a1da8ffb71af1005c5a035d0eb5f956056adf32 commit r15-5050-g3a1da8ffb71af1005c5a035d0eb5f956056adf32 Author: John David Anglin Date: Fri Nov 8 16:49:34 2024 -0500 hppa: Don't allow large modes in hard registers LRA has problems handling spills for OI and TI mod

[gcc r14-10910] hppa: Fix handling of secondary reloads involving a SUBREG

2024-11-08 Thread John David Anglin via Gcc-cvs
https://gcc.gnu.org/g:4b30972e5171093c472ef344297994dd00bf5e97 commit r14-10910-g4b30972e5171093c472ef344297994dd00bf5e97 Author: John David Anglin Date: Fri Nov 8 16:34:41 2024 -0500 hppa: Fix handling of secondary reloads involving a SUBREG This is fairly subtle. When h

[gcc r15-5049] hppa: Fix handling of secondary reloads involving a SUBREG

2024-11-08 Thread John David Anglin via Gcc-cvs
https://gcc.gnu.org/g:1ea45291af0bc8f7b6dff67a0f23be662b2f9908 commit r15-5049-g1ea45291af0bc8f7b6dff67a0f23be662b2f9908 Author: John David Anglin Date: Fri Nov 8 16:34:41 2024 -0500 hppa: Fix handling of secondary reloads involving a SUBREG This is fairly subtle. When ha

[gcc r15-5048] ibstdc++: Add some further attributes to ::operator new in

2024-11-08 Thread Jakub Jelinek via Libstdc++-cvs
https://gcc.gnu.org/g:80e5be0c7f388cf8b8b321dca436ff529ac76867 commit r15-5048-g80e5be0c7f388cf8b8b321dca436ff529ac76867 Author: Jakub Jelinek Date: Fri Nov 8 22:07:33 2024 +0100 ibstdc++: Add some further attributes to ::operator new in I've noticed alloc_align attribute is miss

[gcc(refs/users/meissner/heads/work182-test)] Update ChangeLog.*

2024-11-08 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:7a5058cbdd02116e30108c55cc18b21c7071c3fb commit 7a5058cbdd02116e30108c55cc18b21c7071c3fb Author: Michael Meissner Date: Fri Nov 8 13:19:50 2024 -0500 Update ChangeLog.* Diff: --- gcc/ChangeLog.test | 14 ++ 1 file changed, 14 insertions(+) diff --git a/

[gcc(refs/users/meissner/heads/work182-test)] Update ChangeLog.*

2024-11-08 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:43b639f4215a5f556a3967366bb6c76cd3aeb140 commit 43b639f4215a5f556a3967366bb6c76cd3aeb140 Author: Michael Meissner Date: Fri Nov 8 13:34:01 2024 -0500 Update ChangeLog.* Diff: --- gcc/ChangeLog.test | 13 + 1 file changed, 13 insertions(+) diff --git a/g

[gcc(refs/users/meissner/heads/work182-test)] Add power9 and power10 float to logical optimizations.

2024-11-08 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:db5b49248a7afd5f1bc3c4c9928a7e97d6a22aca commit db5b49248a7afd5f1bc3c4c9928a7e97d6a22aca Author: Michael Meissner Date: Fri Nov 8 13:32:34 2024 -0500 Add power9 and power10 float to logical optimizations. 2024-11-08 Michael Meissner gcc/

[gcc(refs/users/meissner/heads/work182-test)] Revert changes

2024-11-08 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:68ebb5004c2f7248658d737e2105401e8c910a6c commit 68ebb5004c2f7248658d737e2105401e8c910a6c Author: Michael Meissner Date: Fri Nov 8 13:31:58 2024 -0500 Revert changes Diff: --- gcc/config/rs6000/rs6000.h | 1 - gcc/config/rs6000/vsx.md | 142 ++

[gcc(refs/users/meissner/heads/work182-test)] Add power9 and power10 float to logical optimizations.

2024-11-08 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:bb578a879fdc41a34f471dde426c973a3c3d30bc commit bb578a879fdc41a34f471dde426c973a3c3d30bc Author: Michael Meissner Date: Fri Nov 8 13:28:39 2024 -0500 Add power9 and power10 float to logical optimizations. 2024-11-08 Michael Meissner gcc/

[gcc(refs/users/meissner/heads/work182-test)] Revert changes

2024-11-08 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:d47e62860e33f96f0bc22aa0c1d60609b96fa4f9 commit d47e62860e33f96f0bc22aa0c1d60609b96fa4f9 Author: Michael Meissner Date: Fri Nov 8 13:21:21 2024 -0500 Revert changes Diff: --- gcc/ChangeLog.test | 28 + gcc/config/rs6000/rs6000.h | 1 - gcc/config/

[gcc(refs/users/meissner/heads/work182-test)] Add power9 and power10 float to logical optimizations.

2024-11-08 Thread Michael Meissner via Gcc-cvs
https://gcc.gnu.org/g:b6cef51eaf142eb14e32544d982db0d186f348d9 commit b6cef51eaf142eb14e32544d982db0d186f348d9 Author: Michael Meissner Date: Fri Nov 8 13:17:45 2024 -0500 Add power9 and power10 float to logical optimizations. 2024-11-08 Michael Meissner gcc/

[gcc r14-10909] AArch64: backport Neoverse and Cortex CPU definitions

2024-11-08 Thread Tamar Christina via Gcc-cvs
https://gcc.gnu.org/g:05d54bcdc5395a9d3df36c8b640579a0558c89f0 commit r14-10909-g05d54bcdc5395a9d3df36c8b640579a0558c89f0 Author: Tamar Christina Date: Fri Nov 8 18:12:32 2024 + AArch64: backport Neoverse and Cortex CPU definitions This is a conservative backport of a few core

[gcc r15-5047] libstdc++: Make some _Hashtable members inline

2024-11-08 Thread Jonathan Wakely via Libstdc++-cvs
https://gcc.gnu.org/g:7e1d9f58858153bee4bcbab45aa862442859d958 commit r15-5047-g7e1d9f58858153bee4bcbab45aa862442859d958 Author: Jonathan Wakely Date: Fri Nov 1 14:26:38 2024 + libstdc++: Make some _Hashtable members inline libstdc++-v3/ChangeLog: * include/bi

[gcc r15-5046] libstdc++: Do not define _Insert_base::try_emplace before C++17

2024-11-08 Thread Jonathan Wakely via Libstdc++-cvs
https://gcc.gnu.org/g:b66a57c0ad300b293ebd366bc29f44f2ddb65c69 commit r15-5046-gb66a57c0ad300b293ebd366bc29f44f2ddb65c69 Author: Jonathan Wakely Date: Fri Nov 8 13:58:23 2024 + libstdc++: Do not define _Insert_base::try_emplace before C++17 This is not a reserved name in C++11

[gcc r15-5045] Fix gcc.dg/vect/bb-slp-77.c for x86

2024-11-08 Thread Richard Biener via Gcc-cvs
https://gcc.gnu.org/g:12383255fe4e82c31f5e42c72a8fbcb1b5dea35d commit r15-5045-g12383255fe4e82c31f5e42c72a8fbcb1b5dea35d Author: Richard Biener Date: Fri Nov 8 15:11:34 2024 +0100 Fix gcc.dg/vect/bb-slp-77.c for x86 x86 doesn't have .REDUC_PLUS for V2SImode - there's no effective

[gcc r14-10908] aarch64: Fix gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c

2024-11-08 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:998d05a7b650ae71f8a952e8503e8b5dbe6b4909 commit r14-10908-g998d05a7b650ae71f8a952e8503e8b5dbe6b4909 Author: Richard Sandiford Date: Fri Nov 8 14:07:47 2024 + aarch64: Fix gcc.target/aarch64/sme2/acle-asm/bfmlslb_f32.c I missed a search-and-replace on this

[gcc r14-10904] aarch64: Fix SVE ACLE gimple folds for C++ LTO [PR116629]

2024-11-08 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:ffe00a011720c76f06d9fb2b59ba6f5ec509fab5 commit r14-10904-gffe00a011720c76f06d9fb2b59ba6f5ec509fab5 Author: Richard Sandiford Date: Fri Nov 8 14:07:45 2024 + aarch64: Fix SVE ACLE gimple folds for C++ LTO [PR116629] The SVE ACLE code has two ways of handl

[gcc r14-10906] aarch64: Restrict FCLAMP to SME2

2024-11-08 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:d228af5cbc2f635d0837ed67fe95641d6e567aff commit r14-10906-gd228af5cbc2f635d0837ed67fe95641d6e567aff Author: Richard Sandiford Date: Fri Nov 8 14:07:46 2024 + aarch64: Restrict FCLAMP to SME2 There are two sets of patterns for FCLAMP: one set for single re

[gcc r14-10905] aarch64: Fix folding of degenerate svwhilele case [PR117045]

2024-11-08 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:e49c265c59d7ba73e50fb7fe2784eb2874037642 commit r14-10905-ge49c265c59d7ba73e50fb7fe2784eb2874037642 Author: Richard Sandiford Date: Fri Nov 8 14:07:46 2024 + aarch64: Fix folding of degenerate svwhilele case [PR117045] The svwhilele folder mishandled the

[gcc r14-10907] aarch64: Make PSEL dependent on SME rather than SME2

2024-11-08 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:8681e1ed812e2a59c5512fe8cda383682bc648f1 commit r14-10907-g8681e1ed812e2a59c5512fe8cda383682bc648f1 Author: Richard Sandiford Date: Fri Nov 8 14:07:47 2024 + aarch64: Make PSEL dependent on SME rather than SME2 The svpsel_lane intrinsics were wrongly clas

[gcc r14-10903] aarch64: Rename svpext to svpext_lane [PR116371]

2024-11-08 Thread Richard Sandiford via Gcc-cvs
https://gcc.gnu.org/g:66e611619b39b8383bfeafb4b27ef8553c4aab01 commit r14-10903-g66e611619b39b8383bfeafb4b27ef8553c4aab01 Author: Richard Sandiford Date: Fri Nov 8 14:07:45 2024 + aarch64: Rename svpext to svpext_lane [PR116371] When implementing the SME2 ACLE, I somehow misse

[gcc r15-5044] arm: Improvements to arm_noce_conversion_profitable_p call [PR 116444]

2024-11-08 Thread Andre Simoes Dias Vieira via Gcc-cvs
https://gcc.gnu.org/g:1e8396464cb990d554c932cd959742b86660a25a commit r15-5044-g1e8396464cb990d554c932cd959742b86660a25a Author: Andre Simoes Dias Vieira Date: Fri Nov 8 13:34:57 2024 + arm: Improvements to arm_noce_conversion_profitable_p call [PR 116444] When not dealing wit

[gcc r15-5043] c++: Fix ICE on constexpr virtual function [PR117317]

2024-11-08 Thread Jakub Jelinek via Gcc-cvs
https://gcc.gnu.org/g:5ff9e21c1ec81f8288e74679547e56051e051975 commit r15-5043-g5ff9e21c1ec81f8288e74679547e56051e051975 Author: Jakub Jelinek Date: Fri Nov 8 13:36:05 2024 +0100 c++: Fix ICE on constexpr virtual function [PR117317] Since C++20 virtual methods can be constexpr, an

[gcc r14-10902] testsuite: arm: Use check-function-bodies in epilog-1.c test

2024-11-08 Thread Torbjorn Svensson via Gcc-cvs
https://gcc.gnu.org/g:724446556e5cf2686a12076d282214f02119beb4 commit r14-10902-g724446556e5cf2686a12076d282214f02119beb4 Author: Torbjörn SVENSSON Date: Thu Nov 7 20:09:48 2024 +0100 testsuite: arm: Use check-function-bodies in epilog-1.c test Update test case for armv8.1-m.main

[gcc r14-10901] testsuite: arm: Use effective-target arm_libc_fp_abi for pr68620.c test

2024-11-08 Thread Torbjorn Svensson via Gcc-cvs
https://gcc.gnu.org/g:29284becc5cbfdf3a474b75087e71812c1e70de1 commit r14-10901-g29284becc5cbfdf3a474b75087e71812c1e70de1 Author: Torbjörn SVENSSON Date: Wed Nov 6 07:12:14 2024 +0100 testsuite: arm: Use effective-target arm_libc_fp_abi for pr68620.c test This fixes reported regre

[gcc r14-10900] testsuite: arm: Allow vst1.32 instruction in pr40457-2.c

2024-11-08 Thread Torbjorn Svensson via Gcc-cvs
https://gcc.gnu.org/g:82191dec727fdc4740a7fffce01002a2dcfb3b6f commit r14-10900-g82191dec727fdc4740a7fffce01002a2dcfb3b6f Author: Torbjörn SVENSSON Date: Thu Nov 7 18:05:19 2024 +0100 testsuite: arm: Allow vst1.32 instruction in pr40457-2.c When building the test case with neon, t

[gcc r14-10899] testsuite: arm: Use effective-target for pr84556.cc test

2024-11-08 Thread Torbjorn Svensson via Gcc-cvs
https://gcc.gnu.org/g:8cf9b2657046421327956ff972e70d348c06ae1a commit r14-10899-g8cf9b2657046421327956ff972e70d348c06ae1a Author: Torbjörn SVENSSON Date: Wed Nov 6 10:28:34 2024 +0100 testsuite: arm: Use effective-target for pr84556.cc test Using "dg-do run" with a selector overri

[gcc r15-5042] testsuite: arm: Use check-function-bodies in epilog-1.c test

2024-11-08 Thread Torbjorn Svensson via Gcc-cvs
https://gcc.gnu.org/g:ec86e87439b4a5cf73da6f318757f3561f9f278a commit r15-5042-gec86e87439b4a5cf73da6f318757f3561f9f278a Author: Torbjörn SVENSSON Date: Thu Nov 7 20:09:48 2024 +0100 testsuite: arm: Use check-function-bodies in epilog-1.c test Update test case for armv8.1-m.main t

[gcc r15-5041] testsuite: arm: Use effective-target arm_libc_fp_abi for pr68620.c test

2024-11-08 Thread Torbjorn Svensson via Gcc-cvs
https://gcc.gnu.org/g:dc5d559494656c17c4faa99f398047b7d0c33adc commit r15-5041-gdc5d559494656c17c4faa99f398047b7d0c33adc Author: Torbjörn SVENSSON Date: Wed Nov 6 07:12:14 2024 +0100 testsuite: arm: Use effective-target arm_libc_fp_abi for pr68620.c test This fixes reported regres

[gcc r15-5040] testsuite: arm: Allow vst1.32 instruction in pr40457-2.c

2024-11-08 Thread Torbjorn Svensson via Gcc-cvs
https://gcc.gnu.org/g:636b8aeacd182351313381636ecbf8dcef1ee45a commit r15-5040-g636b8aeacd182351313381636ecbf8dcef1ee45a Author: Torbjörn SVENSSON Date: Thu Nov 7 18:05:19 2024 +0100 testsuite: arm: Allow vst1.32 instruction in pr40457-2.c When building the test case with neon, th

[gcc r15-5039] testsuite: arm: Use effective-target for pr84556.cc test

2024-11-08 Thread Torbjorn Svensson via Gcc-cvs
https://gcc.gnu.org/g:85c3d944800257248ab48cdc75c2c02fadf63c73 commit r15-5039-g85c3d944800257248ab48cdc75c2c02fadf63c73 Author: Torbjörn SVENSSON Date: Wed Nov 6 10:28:34 2024 +0100 testsuite: arm: Use effective-target for pr84556.cc test Using "dg-do run" with a selector overrid

[gcc r15-5038] Enable gcc.dg/vect/vect-early-break_21.c on x86_64

2024-11-08 Thread Richard Biener via Gcc-cvs
https://gcc.gnu.org/g:a9c31c2e76d9b63225448375a72a80591b43c7a6 commit r15-5038-ga9c31c2e76d9b63225448375a72a80591b43c7a6 Author: Richard Biener Date: Fri Nov 8 12:44:47 2024 +0100 Enable gcc.dg/vect/vect-early-break_21.c on x86_64 The following also enables the testcase on x86 as

[gcc r15-5037] libstdc++: Simplify __detail::__distance_fw using 'if constexpr'

2024-11-08 Thread Jonathan Wakely via Libstdc++-cvs
https://gcc.gnu.org/g:b907cde027dc65af5842c06c50cfa12e2f58133b commit r15-5037-gb907cde027dc65af5842c06c50cfa12e2f58133b Author: Jonathan Wakely Date: Fri Nov 1 12:38:29 2024 + libstdc++: Simplify __detail::__distance_fw using 'if constexpr' This uses 'if constexpr' instead of

[gcc r15-5036] aarch64: Extend support for the AE family of Cortex CPUs

2024-11-08 Thread Victor Do Nascimento via Gcc-cvs
https://gcc.gnu.org/g:775056616386b7d05f81a413a0ad72c63aa381bf commit r15-5036-g775056616386b7d05f81a413a0ad72c63aa381bf Author: Victor Do Nascimento Date: Fri Nov 8 11:09:54 2024 + aarch64: Extend support for the AE family of Cortex CPUs Implement -mcpu options for:

[gcc r14-10898] testsuite: arm: Use effective-target for nomve_fp_1 test

2024-11-08 Thread Torbjorn Svensson via Gcc-cvs
https://gcc.gnu.org/g:ef7719338423acd0bffc11895c8bb7c78e45c2f9 commit r14-10898-gef7719338423acd0bffc11895c8bb7c78e45c2f9 Author: Torbjörn SVENSSON Date: Thu Oct 31 19:11:57 2024 +0100 testsuite: arm: Use effective-target for nomve_fp_1 test Test uses MVE, so add effective-target

[gcc r15-5035] testsuite: arm: Use effective-target for nomve_fp_1 test

2024-11-08 Thread Torbjorn Svensson via Gcc-cvs
https://gcc.gnu.org/g:e8886406fac50f80a521a4100a80517e50e1c388 commit r15-5035-ge8886406fac50f80a521a4100a80517e50e1c388 Author: Torbjörn SVENSSON Date: Thu Oct 31 19:11:57 2024 +0100 testsuite: arm: Use effective-target for nomve_fp_1 test Test uses MVE, so add effective-target a