[gcc r15-4561] libstdc++: Always instantiate key_type to compute hash code [PR115285]

https://gcc.gnu.org/g:ee030b28004eade3da872e7ae62a526a2940a705 commit r15-4561-gee030b28004eade3da872e7ae62a526a2940a705 Author: François Dumont Date: Tue Oct 22 19:13:34 2024 +0200 libstdc++: Always instantiate key_type to compute hash code [PR115285] Even if it is possible to co

[gcc r15-4560] i386: Optimize EQ/NE comparison between avx512 kmask and -1.

https://gcc.gnu.org/g:ee7e77e9c121f5a6f27c92b6b24b2abf9cd66a4d commit r15-4560-gee7e77e9c121f5a6f27c92b6b24b2abf9cd66a4d Author: liuhongt Date: Mon Oct 21 02:22:08 2024 -0700 i386: Optimize EQ/NE comparison between avx512 kmask and -1. r15-974-gbf7745f887c765e06f2e75508f263debb60a

[gcc r15-4558] c: Restore "originally defined" struct redefinition messages for C23

https://gcc.gnu.org/g:ecb55d94738b1ed36fa76d02e3454cc4959a141d commit r15-4558-gecb55d94738b1ed36fa76d02e3454cc4959a141d Author: Joseph Myers Date: Wed Oct 23 00:10:01 2024 + c: Restore "originally defined" struct redefinition messages for C23 One failure with a -std=gnu23 def

[gcc(refs/users/meissner/heads/work182-sha)] Update ChangeLog.*

https://gcc.gnu.org/g:2d38f53953eed479f725446a4afd250a4232bbe7 commit 2d38f53953eed479f725446a4afd250a4232bbe7 Author: Michael Meissner Date: Tue Oct 22 19:37:19 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.sha | 35 +++ 1 file changed, 35 inserti

[gcc(refs/users/meissner/heads/work182-sha)] Initial support for adding xxeval fusion support.

https://gcc.gnu.org/g:ff6e5da72a686ab7faea3009010898d6c175938e commit ff6e5da72a686ab7faea3009010898d6c175938e Author: Michael Meissner Date: Tue Oct 22 19:35:27 2024 -0400 Initial support for adding xxeval fusion support. 2024-10-16 Michael Meissner gcc/

[gcc(refs/vendors/ibm/heads/mmaplus)] Revert changes

https://gcc.gnu.org/g:90229e4a4ee3a8cad121e70858241cfeba0d06f2 commit 90229e4a4ee3a8cad121e70858241cfeba0d06f2 Author: Michael Meissner Date: Tue Oct 22 17:51:04 2024 -0400 Revert changes Diff: --- gcc/config/rs6000/altivec.md | 14 gcc/config/rs6000/constraint

[gcc r15-4557] c++: non-dep structured binding decltype again [PR117107]

https://gcc.gnu.org/g:71e13ea134b04562f8f2cdd9c4a55dbb0905f96a commit r15-4557-g71e13ea134b04562f8f2cdd9c4a55dbb0905f96a Author: Jason Merrill Date: Tue Oct 22 16:37:49 2024 -0400 c++: non-dep structured binding decltype again [PR117107] The patch for PR92687 handled the usual cas

[gcc r14-10826] c++: non-dep structured binding decltype again [PR117107]

https://gcc.gnu.org/g:7de78f7353f125663a22f5514159ea966a120049 commit r14-10826-g7de78f7353f125663a22f5514159ea966a120049 Author: Jason Merrill Date: Tue Oct 22 16:37:49 2024 -0400 c++: non-dep structured binding decltype again [PR117107] The patch for PR92687 handled the usual ca

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add support for dense math registers.

https://gcc.gnu.org/g:178b44cfb3330dd02edc765da77e4d4fec8c4bca commit 178b44cfb3330dd02edc765da77e4d4fec8c4bca Author: Michael Meissner Date: Tue Oct 22 16:56:10 2024 -0400 RFC2653-Add support for dense math registers. The MMA subsystem added the notion of accumulator registers as

[gcc(refs/users/meissner/heads/work182-dmf)] Revert changes

https://gcc.gnu.org/g:663944a2b488201eccebbb78b9f55e70823aabbe commit 663944a2b488201eccebbb78b9f55e70823aabbe Author: Michael Meissner Date: Tue Oct 22 18:01:36 2024 -0400 Revert changes Diff: --- gcc/ChangeLog.dmf | 45 +- gcc/config/rs6000/alti

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2677-Add xvrlw support.

https://gcc.gnu.org/g:b8e0f4b85e2d684a191f26b81c26027e1b4fbba9 commit b8e0f4b85e2d684a191f26b81c26027e1b4fbba9 Author: Michael Meissner Date: Tue Oct 22 17:02:33 2024 -0400 RFC2677-Add xvrlw support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/alt

[gcc r15-4556] c++: add testcase [PR116929]

https://gcc.gnu.org/g:5c6c1aba338d1e563e3da2c5e255f490f0865994 commit r15-4556-g5c6c1aba338d1e563e3da2c5e255f490f0865994 Author: Jason Merrill Date: Tue Oct 22 11:23:34 2024 -0400 c++: add testcase [PR116929] This testcase was fixed by r15-822-g0173dcce92baa6 . PR

[gcc(refs/vendors/ibm/heads/mmaplus)] Update tests to work with architecture flags changes.

https://gcc.gnu.org/g:a6ea1410e993a2af6a5bf2ded03ae1d86ca4689f commit a6ea1410e993a2af6a5bf2ded03ae1d86ca4689f Author: Michael Meissner Date: Tue Oct 22 16:52:24 2024 -0400 Update tests to work with architecture flags changes. Two tests used -mvsx to raise the processor level to a

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add wD constraint.

https://gcc.gnu.org/g:9b13df320f59d8296c34bac97e9ba2e9643f9577 commit 9b13df320f59d8296c34bac97e9ba2e9643f9577 Author: Michael Meissner Date: Tue Oct 22 16:55:18 2024 -0400 RFC2653-Add wD constraint. This patch adds a new constraint ('wD') that matches the accumulator registers

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_CMPB to TARGET_POWER6

https://gcc.gnu.org/g:9158cccbf950145fc030c6d057f018f9c222df97 commit 9158cccbf950145fc030c6d057f018f9c222df97 Author: Michael Meissner Date: Tue Oct 22 16:49:52 2024 -0400 Change TARGET_CMPB to TARGET_POWER6 As part of the architecture flags patches, this patch changes the use of

[gcc(refs/vendors/ibm/heads/mmaplus)] Update ChangeLog.*

https://gcc.gnu.org/g:752de6965c0e013072aa38458764314e135fa34d commit 752de6965c0e013072aa38458764314e135fa34d Author: Michael Meissner Date: Tue Oct 22 17:55:58 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.mmaplus | 814 ++ 1 file

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-PowerPC: Add support for 1, 024 bit DMR registers.

https://gcc.gnu.org/g:8ab7dacdb1da147fff0ae85cb18243139a29bb9c commit 8ab7dacdb1da147fff0ae85cb18243139a29bb9c Author: Michael Meissner Date: Tue Oct 22 16:58:33 2024 -0400 RFC2653-PowerPC: Add support for 1,024 bit DMR registers. This patch is a prelimianry patch to add the full

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2686-Add paddis support.

https://gcc.gnu.org/g:f482ec2cbcfab9527c69f5c413b29c333b4c4b58 commit f482ec2cbcfab9527c69f5c413b29c333b4c4b58 Author: Michael Meissner Date: Tue Oct 22 17:01:20 2024 -0400 RFC2686-Add paddis support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/co

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2655-Add saturating subtract built-ins.

https://gcc.gnu.org/g:727669ff478fcb5b1227433fc9a02df6a9a8d4c4 commit 727669ff478fcb5b1227433fc9a02df6a9a8d4c4 Author: Michael Meissner Date: Tue Oct 22 17:00:35 2024 -0400 RFC2655-Add saturating subtract built-ins. This patch adds support for a saturating subtract built-in functi

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2656-Support load/store vector with right length.

https://gcc.gnu.org/g:1a52c135ae291d74cf632bdd153e253445db8987 commit 1a52c135ae291d74cf632bdd153e253445db8987 Author: Michael Meissner Date: Tue Oct 22 16:59:43 2024 -0400 RFC2656-Support load/store vector with right length. This patch adds support for new instructions that may b

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-Add dense math test for new instruction names.

https://gcc.gnu.org/g:0c9e8a5c7fb71a21d4c207d6811381712df6fc36 commit 0c9e8a5c7fb71a21d4c207d6811381712df6fc36 Author: Michael Meissner Date: Tue Oct 22 16:57:52 2024 -0400 RFC2653-Add dense math test for new instruction names. 2024-10-22 Michael Meissner gcc/testsuit

[gcc(refs/vendors/ibm/heads/mmaplus)] Add -mcpu=future tuning support.

https://gcc.gnu.org/g:6bde233a2673186e88f4437d390bd119515a9c6a commit 6bde233a2673186e88f4437d390bd119515a9c6a Author: Michael Meissner Date: Tue Oct 22 16:53:40 2024 -0400 Add -mcpu=future tuning support. This patch makes -mtune=future use the same tuning decision as -mtune=powe

[gcc(refs/vendors/ibm/heads/mmaplus)] RFC2653-PowerPC: Switch to dense math names for all MMA operations.

https://gcc.gnu.org/g:8d4c4905e05feef36fbd52f9a40d3422b57d2fdf commit 8d4c4905e05feef36fbd52f9a40d3422b57d2fdf Author: Michael Meissner Date: Tue Oct 22 16:57:05 2024 -0400 RFC2653-PowerPC: Switch to dense math names for all MMA operations. This patch changes the assembler instruc

[gcc(refs/vendors/ibm/heads/mmaplus)] Add support for -mcpu=future

https://gcc.gnu.org/g:66d13f6b37fcbc20ee9c8846b71eec2debed69ce commit 66d13f6b37fcbc20ee9c8846b71eec2debed69ce Author: Michael Meissner Date: Tue Oct 22 16:53:04 2024 -0400 Add support for -mcpu=future This patch adds the support that can be used in developing GCC support for

[gcc(refs/vendors/ibm/heads/mmaplus)] Use vector pair load/store for memcpy with -mcpu=future

https://gcc.gnu.org/g:10ef210dd78b7a8bc837c48f1d30eec3ed25492a commit 10ef210dd78b7a8bc837c48f1d30eec3ed25492a Author: Michael Meissner Date: Tue Oct 22 16:54:35 2024 -0400 Use vector pair load/store for memcpy with -mcpu=future In the development for the power10 processor, GCC di

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_MODULO to TARGET_POWER9

https://gcc.gnu.org/g:16e412edd28842a4410613b58d9cb2bc84d34ff1 commit 16e412edd28842a4410613b58d9cb2bc84d34ff1 Author: Michael Meissner Date: Tue Oct 22 16:51:43 2024 -0400 Change TARGET_MODULO to TARGET_POWER9 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_POPCNTD to TARGET_POWER7

https://gcc.gnu.org/g:d07b0896b5b514d17723d4b8e44ec71e8e6da74b commit d07b0896b5b514d17723d4b8e44ec71e8e6da74b Author: Michael Meissner Date: Tue Oct 22 16:50:48 2024 -0400 Change TARGET_POPCNTD to TARGET_POWER7 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Use architecture flags for defining _ARCH_PWR macros.

https://gcc.gnu.org/g:e2771ea8542bd20e1e870873b303554297b4c212 commit e2771ea8542bd20e1e870873b303554297b4c212 Author: Michael Meissner Date: Tue Oct 22 16:41:09 2024 -0400 Use architecture flags for defining _ARCH_PWR macros. For the newer architectures, this patch changes GCC to

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_FPRND to TARGET_POWER5X

https://gcc.gnu.org/g:6559400ffc6278ef00e01c9854987983ca150501 commit 6559400ffc6278ef00e01c9854987983ca150501 Author: Michael Meissner Date: Tue Oct 22 16:48:59 2024 -0400 Change TARGET_FPRND to TARGET_POWER5X As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Change TARGET_POPCNTB to TARGET_POWER5

https://gcc.gnu.org/g:1eabe2961bf21c2d31cda09f36af15cb5c94e4a3 commit 1eabe2961bf21c2d31cda09f36af15cb5c94e4a3 Author: Michael Meissner Date: Tue Oct 22 16:48:20 2024 -0400 Change TARGET_POPCNTB to TARGET_POWER5 As part of the architecture flags patches, this patch changes the use

[gcc(refs/vendors/ibm/heads/mmaplus)] Do not allow -mvsx to boost processor to power7.

https://gcc.gnu.org/g:5f1bebd71caf84b610986d493660b807b31cb0a2 commit 5f1bebd71caf84b610986d493660b807b31cb0a2 Author: Michael Meissner Date: Tue Oct 22 16:42:11 2024 -0400 Do not allow -mvsx to boost processor to power7. This patch restructures the code so that -mvsx for example

[gcc(refs/vendors/ibm/heads/mmaplus)] Add rs6000 architecture masks.

https://gcc.gnu.org/g:ae489dc354dcb53f2af2d022a792bd3c29f53f2c commit ae489dc354dcb53f2af2d022a792bd3c29f53f2c Author: Michael Meissner Date: Tue Oct 22 16:40:13 2024 -0400 Add rs6000 architecture masks. This patch begins the journey to move architecture bits that are not user IS

[gcc r15-4555] libstdc++: Implement LWG 4166 changes to concat_view::end()

https://gcc.gnu.org/g:f191c8301545658543773ba3d0e6f3f0927529e0 commit r15-4555-gf191c8301545658543773ba3d0e6f3f0927529e0 Author: Patrick Palka Date: Tue Oct 22 17:01:59 2024 -0400 libstdc++: Implement LWG 4166 changes to concat_view::end() This patch proactively implements the pro

[gcc(refs/vendors/ibm/heads/mmaplus)] Add ChangeLog.dmf and update REVISION.

https://gcc.gnu.org/g:79518d70cb5ad1be22f17fbab1bbec73c59f1566 commit 79518d70cb5ad1be22f17fbab1bbec73c59f1566 Author: Michael Meissner Date: Tue Oct 22 16:38:02 2024 -0400 Add ChangeLog.dmf and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc r15-4554] c: Better fix for speed up compilation of large char array initializers when not using #embed [PR117

https://gcc.gnu.org/g:a6db5908a55adbef0a0dc1eb2a22743064fe17b8 commit r15-4554-ga6db5908a55adbef0a0dc1eb2a22743064fe17b8 Author: Jakub Jelinek Date: Tue Oct 22 22:36:03 2024 +0200 c: Better fix for speed up compilation of large char array initializers when not using #embed [PR117190]

[gcc(refs/users/meissner/heads/work182-bugs)] Update ChangeLog.*

https://gcc.gnu.org/g:2db27caa81c21a5c877c67670b5e425b8d9f8239 commit 2db27caa81c21a5c877c67670b5e425b8d9f8239 Author: Michael Meissner Date: Tue Oct 22 16:32:40 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.bugs | 51 +++ 1 file ch

[gcc(refs/users/meissner/heads/work182-bugs)] PR 99293: Optimize splat of a V2DF/V2DI extract with constant element

https://gcc.gnu.org/g:fc15f761446c5051cb357c9f37b6d82e2d489623 commit fc15f761446c5051cb357c9f37b6d82e2d489623 Author: Michael Meissner Date: Tue Oct 22 16:31:04 2024 -0400 PR 99293: Optimize splat of a V2DF/V2DI extract with constant element We had optimizations for splat of a ve

[gcc(refs/users/meissner/heads/work182-dmf)] Update ChangeLog.*

https://gcc.gnu.org/g:285b3e8889275adfba477ea25fb150885f950837 commit 285b3e8889275adfba477ea25fb150885f950837 Author: Michael Meissner Date: Tue Oct 22 16:29:33 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.dmf | 450 ++ 1 file

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2656-Support load/store vector with right length.

https://gcc.gnu.org/g:6c3da6bb5c7ab7cd36c93ca2b14f64782edc5019 commit 6c3da6bb5c7ab7cd36c93ca2b14f64782edc5019 Author: Michael Meissner Date: Tue Oct 22 16:22:22 2024 -0400 RFC2656-Support load/store vector with right length. This patch adds support for new instructions that may b

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2686-Add paddis support.

https://gcc.gnu.org/g:2514d403f6ba525a8d5edd8b54271fe488e70f66 commit 2514d403f6ba525a8d5edd8b54271fe488e70f66 Author: Michael Meissner Date: Tue Oct 22 16:24:17 2024 -0400 RFC2686-Add paddis support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/co

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2677-Add xvrlw support.

https://gcc.gnu.org/g:87e19d52d51d7b1f8bd2242a1d175cc5497b8657 commit 87e19d52d51d7b1f8bd2242a1d175cc5497b8657 Author: Michael Meissner Date: Tue Oct 22 16:25:54 2024 -0400 RFC2677-Add xvrlw support. 2024-10-22 Michael Meissner gcc/ * config/rs6000/alt

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2655-Add saturating subtract built-ins.

https://gcc.gnu.org/g:52aa91617be6e435a5ad43fc1e09e8a01daf205c commit 52aa91617be6e435a5ad43fc1e09e8a01daf205c Author: Michael Meissner Date: Tue Oct 22 16:23:20 2024 -0400 RFC2655-Add saturating subtract built-ins. This patch adds support for a saturating subtract built-in functi

[gcc r14-10825] c++/modules: Fix treatment of unnamed types [PR116929]

https://gcc.gnu.org/g:01d3a974fe3474c37cd52b595c29dddafad954dc commit r14-10825-g01d3a974fe3474c37cd52b595c29dddafad954dc Author: Nathaniel Shead Date: Thu May 23 22:50:58 2024 +1000 c++/modules: Fix treatment of unnamed types [PR116929] In r14-9530 we relaxed "depending on type w

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2653-PowerPC: Add support for 1, 024 bit DMR registers.

https://gcc.gnu.org/g:3e8f69ebf67f5a9f420d3fed4864bd553d95eb89 commit 3e8f69ebf67f5a9f420d3fed4864bd553d95eb89 Author: Michael Meissner Date: Tue Oct 22 16:20:44 2024 -0400 RFC2653-PowerPC: Add support for 1,024 bit DMR registers. This patch is a prelimianry patch to add the full

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2653-Add dense math test for new instruction names.

https://gcc.gnu.org/g:a095bdcff7edd0750ceed7fe480362a8af0c389e commit a095bdcff7edd0750ceed7fe480362a8af0c389e Author: Michael Meissner Date: Tue Oct 22 16:19:55 2024 -0400 RFC2653-Add dense math test for new instruction names. 2024-10-22 Michael Meissner gcc/testsuit

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2653-PowerPC: Switch to dense math names for all MMA operations.

https://gcc.gnu.org/g:9ef39b556f57fcb9e497c3b07f0116fcfa5271fa commit 9ef39b556f57fcb9e497c3b07f0116fcfa5271fa Author: Michael Meissner Date: Tue Oct 22 16:18:43 2024 -0400 RFC2653-PowerPC: Switch to dense math names for all MMA operations. This patch changes the assembler instruc

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2653-Add support for dense math registers.

https://gcc.gnu.org/g:4429a6ccced47f7351f0835134cddb529a82395e commit 4429a6ccced47f7351f0835134cddb529a82395e Author: Michael Meissner Date: Tue Oct 22 16:17:41 2024 -0400 RFC2653-Add support for dense math registers. The MMA subsystem added the notion of accumulator registers as

[gcc(refs/users/meissner/heads/work182-dmf)] RFC2653-Add wD constraint.

https://gcc.gnu.org/g:2f6c9b8be76be4b6b4ce33e15703326bca28b77c commit 2f6c9b8be76be4b6b4ce33e15703326bca28b77c Author: Michael Meissner Date: Tue Oct 22 16:16:43 2024 -0400 RFC2653-Add wD constraint. This patch adds a new constraint ('wD') that matches the accumulator registers

[gcc(refs/users/meissner/heads/work182-dmf)] Use vector pair load/store for memcpy with -mcpu=future

https://gcc.gnu.org/g:61cba9696d41e2c30311a8a36c7c58fab7da1b01 commit 61cba9696d41e2c30311a8a36c7c58fab7da1b01 Author: Michael Meissner Date: Tue Oct 22 16:15:45 2024 -0400 Use vector pair load/store for memcpy with -mcpu=future In the development for the power10 processor, GCC di

[gcc(refs/users/meissner/heads/work182-vpair)] Add ChangeLog.vpair and update REVISION.

https://gcc.gnu.org/g:78961d641569f9b0fbe994bbb0ee59cdcac78d47 commit 78961d641569f9b0fbe994bbb0ee59cdcac78d47 Author: Michael Meissner Date: Tue Oct 22 15:33:05 2024 -0400 Add ChangeLog.vpair and update REVISION. 2024-10-22 Michael Meissner gcc/ * Cha

[gcc(refs/users/meissner/heads/work182-vpair)] Merge commit 'refs/users/meissner/heads/work182-vpair' of git+ssh://gcc.gnu.org/git/gcc into me/work

https://gcc.gnu.org/g:2b119a8db9222fa8851fb506e820a750b21a6b6b commit 2b119a8db9222fa8851fb506e820a750b21a6b6b Merge: 78961d641569 546a02c32179 Author: Michael Meissner Date: Tue Oct 22 16:03:39 2024 -0400 Merge commit 'refs/users/meissner/heads/work182-vpair' of git+ssh://gcc.gnu.org/git

[gcc/meissner/heads/work182-vpair] (14 commits) Merge commit 'refs/users/meissner/heads/work182-vpair' of g

The branch 'meissner/heads/work182-vpair' was updated to point to: 2b119a8db922... Merge commit 'refs/users/meissner/heads/work182-vpair' of g It previously pointed to: 546a02c32179... Add ChangeLog.vpair and update REVISION. Diff: Summary of changes (added commits):

[gcc(refs/users/meissner/heads/work182-test)] Merge commit 'refs/users/meissner/heads/work182-test' of git+ssh://gcc.gnu.org/git/gcc into me/work1

https://gcc.gnu.org/g:561a9c38658796d4c0ee1dde34a4cb99124b5c78 commit 561a9c38658796d4c0ee1dde34a4cb99124b5c78 Merge: a56fe7c0ad44 5668ff6d8d52 Author: Michael Meissner Date: Tue Oct 22 16:02:39 2024 -0400 Merge commit 'refs/users/meissner/heads/work182-test' of git+ssh://gcc.gnu.org/git/

[gcc(refs/users/meissner/heads/work182)] Update ChangeLog.*

https://gcc.gnu.org/g:608da797a3c981c87f56503c58c13cc38edbcd7e commit 608da797a3c981c87f56503c58c13cc38edbcd7e Author: Michael Meissner Date: Tue Oct 22 15:56:01 2024 -0400 Update ChangeLog.* Diff: --- gcc/ChangeLog.meissner | 448 + 1 file

[gcc(refs/users/meissner/heads/work182-test)] Add ChangeLog.test and update REVISION.

https://gcc.gnu.org/g:a56fe7c0ad44ab78f5ee63c914d7b6be1b9a2223 commit a56fe7c0ad44ab78f5ee63c914d7b6be1b9a2223 Author: Michael Meissner Date: Tue Oct 22 15:37:11 2024 -0400 Add ChangeLog.test and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chan

[gcc/meissner/heads/work182-test] (14 commits) Merge commit 'refs/users/meissner/heads/work182-test' of gi

The branch 'meissner/heads/work182-test' was updated to point to: 561a9c386587... Merge commit 'refs/users/meissner/heads/work182-test' of gi It previously pointed to: 5668ff6d8d52... Add ChangeLog.test and update REVISION. Diff: Summary of changes (added commits): --

[gcc(refs/users/meissner/heads/work182-tar)] Merge commit 'refs/users/meissner/heads/work182-tar' of git+ssh://gcc.gnu.org/git/gcc into me/work18

https://gcc.gnu.org/g:153f08510e13bb8d10cfac3ecabd8d10f61cb10a commit 153f08510e13bb8d10cfac3ecabd8d10f61cb10a Merge: 1c3275e8d850 587ce1e4fef7 Author: Michael Meissner Date: Tue Oct 22 16:01:34 2024 -0400 Merge commit 'refs/users/meissner/heads/work182-tar' of git+ssh://gcc.gnu.org/git/g

[gcc(refs/users/meissner/heads/work182-tar)] Add ChangeLog.tar and update REVISION.

https://gcc.gnu.org/g:1c3275e8d850650eca3cd4a48ddc415101d9b1c3 commit 1c3275e8d850650eca3cd4a48ddc415101d9b1c3 Author: Michael Meissner Date: Tue Oct 22 15:34:01 2024 -0400 Add ChangeLog.tar and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc/meissner/heads/work182-tar] (14 commits) Merge commit 'refs/users/meissner/heads/work182-tar' of git

The branch 'meissner/heads/work182-tar' was updated to point to: 153f08510e13... Merge commit 'refs/users/meissner/heads/work182-tar' of git It previously pointed to: 587ce1e4fef7... Add ChangeLog.tar and update REVISION. Diff: Summary of changes (added commits):

[gcc(refs/users/meissner/heads/work182-sha)] Merge commit 'refs/users/meissner/heads/work182-sha' of git+ssh://gcc.gnu.org/git/gcc into me/work18

https://gcc.gnu.org/g:68980d5b1c9beb268db2e636e08f2cae64546899 commit 68980d5b1c9beb268db2e636e08f2cae64546899 Merge: 7a8278896252 d1443c1ab5e3 Author: Michael Meissner Date: Tue Oct 22 16:00:33 2024 -0400 Merge commit 'refs/users/meissner/heads/work182-sha' of git+ssh://gcc.gnu.org/git/g

[gcc(refs/users/meissner/heads/work182-sha)] Add ChangeLog.sha and update REVISION.

https://gcc.gnu.org/g:7a827889625208cea3724720c785072950bb73e3 commit 7a827889625208cea3724720c785072950bb73e3 Author: Michael Meissner Date: Tue Oct 22 15:36:24 2024 -0400 Add ChangeLog.sha and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc/meissner/heads/work182-sha] (14 commits) Merge commit 'refs/users/meissner/heads/work182-sha' of git

The branch 'meissner/heads/work182-sha' was updated to point to: 68980d5b1c9b... Merge commit 'refs/users/meissner/heads/work182-sha' of git It previously pointed to: d1443c1ab5e3... Add ChangeLog.sha and update REVISION. Diff: Summary of changes (added commits):

[gcc(refs/users/meissner/heads/work182-libs)] Merge commit 'refs/users/meissner/heads/work182-libs' of git+ssh://gcc.gnu.org/git/gcc into me/work1

https://gcc.gnu.org/g:1fa6af582a1ab74e508802231f72a641854d21c6 commit 1fa6af582a1ab74e508802231f72a641854d21c6 Merge: 5bbb71d1ad3f 17018468383f Author: Michael Meissner Date: Tue Oct 22 15:59:10 2024 -0400 Merge commit 'refs/users/meissner/heads/work182-libs' of git+ssh://gcc.gnu.org/git/

[gcc/meissner/heads/work182-libs] (14 commits) Merge commit 'refs/users/meissner/heads/work182-libs' of gi

The branch 'meissner/heads/work182-libs' was updated to point to: 1fa6af582a1a... Merge commit 'refs/users/meissner/heads/work182-libs' of gi It previously pointed to: 17018468383f... Add ChangeLog.libs and update REVISION. Diff: Summary of changes (added commits): --

[gcc(refs/users/meissner/heads/work182-libs)] Add ChangeLog.libs and update REVISION.

https://gcc.gnu.org/g:5bbb71d1ad3f4e1c0d160b6728b6719482fb0d63 commit 5bbb71d1ad3f4e1c0d160b6728b6719482fb0d63 Author: Michael Meissner Date: Tue Oct 22 15:35:38 2024 -0400 Add ChangeLog.libs and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chan

[gcc(refs/users/meissner/heads/work182-dmf)] Merge commit 'refs/users/meissner/heads/work182-dmf' of git+ssh://gcc.gnu.org/git/gcc into me/work18

https://gcc.gnu.org/g:d6eeb26530c3db74fc8d191b916db7fb7ad7a31f commit d6eeb26530c3db74fc8d191b916db7fb7ad7a31f Merge: cf930f380334 d83d4ded1b6e Author: Michael Meissner Date: Tue Oct 22 15:58:04 2024 -0400 Merge commit 'refs/users/meissner/heads/work182-dmf' of git+ssh://gcc.gnu.org/git/g

[gcc(refs/users/meissner/heads/work182-dmf)] Add ChangeLog.dmf and update REVISION.

https://gcc.gnu.org/g:cf930f3803349e23fe264e796265c8ca2926f34a commit cf930f3803349e23fe264e796265c8ca2926f34a Author: Michael Meissner Date: Tue Oct 22 15:32:17 2024 -0400 Add ChangeLog.dmf and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc/meissner/heads/work182-dmf] (14 commits) Merge commit 'refs/users/meissner/heads/work182-dmf' of git

The branch 'meissner/heads/work182-dmf' was updated to point to: d6eeb26530c3... Merge commit 'refs/users/meissner/heads/work182-dmf' of git It previously pointed to: d83d4ded1b6e... Add ChangeLog.dmf and update REVISION. Diff: Summary of changes (added commits):

[gcc(refs/users/meissner/heads/work182-bugs)] Merge commit 'refs/users/meissner/heads/work182-bugs' of git+ssh://gcc.gnu.org/git/gcc into me/work1

https://gcc.gnu.org/g:9d31ee1466485c7887fcc2758e395fa617ba8b50 commit 9d31ee1466485c7887fcc2758e395fa617ba8b50 Merge: 0bf41f3d642e c08a14c463af Author: Michael Meissner Date: Tue Oct 22 15:56:44 2024 -0400 Merge commit 'refs/users/meissner/heads/work182-bugs' of git+ssh://gcc.gnu.org/git/

[gcc(refs/users/meissner/heads/work182-bugs)] Add ChangeLog.bugs and update REVISION.

https://gcc.gnu.org/g:0bf41f3d642e42e0a79848314225967f449eed16 commit 0bf41f3d642e42e0a79848314225967f449eed16 Author: Michael Meissner Date: Tue Oct 22 15:34:50 2024 -0400 Add ChangeLog.bugs and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chan

[gcc/meissner/heads/work182-bugs] (14 commits) Merge commit 'refs/users/meissner/heads/work182-bugs' of gi

The branch 'meissner/heads/work182-bugs' was updated to point to: 9d31ee146648... Merge commit 'refs/users/meissner/heads/work182-bugs' of gi It previously pointed to: c08a14c463af... Add ChangeLog.bugs and update REVISION. Diff: Summary of changes (added commits): --

[gcc] Created branch 'meissner/heads/work182-orig' in namespace 'refs/users'

The branch 'meissner/heads/work182-orig' was created in namespace 'refs/users' pointing to: 5fd1c0c1b696... c-family: Fix up -Wsizeof-pointer-memaccess ICEs [PR117230]

[gcc(refs/users/meissner/heads/work182)] Add -mcpu=future tuning support.

https://gcc.gnu.org/g:f40e3352b9bec2b3b50d5f6d5b2c78649ee42ec9 commit f40e3352b9bec2b3b50d5f6d5b2c78649ee42ec9 Author: Michael Meissner Date: Tue Oct 22 15:52:46 2024 -0400 Add -mcpu=future tuning support. This patch makes -mtune=future use the same tuning decision as -mtune=powe

[gcc(refs/users/meissner/heads/work182)] Add support for -mcpu=future

https://gcc.gnu.org/g:07464c2faa1ad2660b096e7d29b9b72bcd05c04f commit 07464c2faa1ad2660b096e7d29b9b72bcd05c04f Author: Michael Meissner Date: Tue Oct 22 15:51:43 2024 -0400 Add support for -mcpu=future This patch adds the support that can be used in developing GCC support for

[gcc] Created branch 'meissner/heads/work182-bugs' in namespace 'refs/users'

The branch 'meissner/heads/work182-bugs' was created in namespace 'refs/users' pointing to: 075d5a2fce41... Add ChangeLog.meissner and REVISION.

[gcc] Created branch 'meissner/heads/work182-test' in namespace 'refs/users'

The branch 'meissner/heads/work182-test' was created in namespace 'refs/users' pointing to: 075d5a2fce41... Add ChangeLog.meissner and REVISION.

[gcc(refs/users/meissner/heads/work182)] Update tests to work with architecture flags changes.

https://gcc.gnu.org/g:04fe9e9cc1704304e005a21d25f799226e097c4a commit 04fe9e9cc1704304e005a21d25f799226e097c4a Author: Michael Meissner Date: Tue Oct 22 15:49:31 2024 -0400 Update tests to work with architecture flags changes. Two tests used -mvsx to raise the processor level to a

[gcc(refs/users/meissner/heads/work182)] Change TARGET_POPCNTB to TARGET_POWER5

https://gcc.gnu.org/g:a7c0ba239be9aad2766fcf90b5c1df3105a059bc commit a7c0ba239be9aad2766fcf90b5c1df3105a059bc Author: Michael Meissner Date: Tue Oct 22 15:44:02 2024 -0400 Change TARGET_POPCNTB to TARGET_POWER5 As part of the architecture flags patches, this patch changes the use

[gcc(refs/users/meissner/heads/work182)] Change TARGET_MODULO to TARGET_POWER9

https://gcc.gnu.org/g:9b1297dd7cc1fce30c27462fe49c802ef2efd8ab commit 9b1297dd7cc1fce30c27462fe49c802ef2efd8ab Author: Michael Meissner Date: Tue Oct 22 15:48:14 2024 -0400 Change TARGET_MODULO to TARGET_POWER9 As part of the architecture flags patches, this patch changes the use

[gcc(refs/users/meissner/heads/work182)] Change TARGET_CMPB to TARGET_POWER6

https://gcc.gnu.org/g:b22bb166a4ba8e02b3902246e57cd380d1968f66 commit b22bb166a4ba8e02b3902246e57cd380d1968f66 Author: Michael Meissner Date: Tue Oct 22 15:46:09 2024 -0400 Change TARGET_CMPB to TARGET_POWER6 As part of the architecture flags patches, this patch changes the use of

[gcc(refs/users/meissner/heads/work182)] Change TARGET_POPCNTD to TARGET_POWER7

https://gcc.gnu.org/g:bd397649b76aedc594175eae11a72b494f48d228 commit bd397649b76aedc594175eae11a72b494f48d228 Author: Michael Meissner Date: Tue Oct 22 15:47:22 2024 -0400 Change TARGET_POPCNTD to TARGET_POWER7 As part of the architecture flags patches, this patch changes the use

[gcc(refs/users/meissner/heads/work182)] Change TARGET_FPRND to TARGET_POWER5X

https://gcc.gnu.org/g:544367d46c24080043043a5cefa0f0dc3e4bc13d commit 544367d46c24080043043a5cefa0f0dc3e4bc13d Author: Michael Meissner Date: Tue Oct 22 15:45:03 2024 -0400 Change TARGET_FPRND to TARGET_POWER5X As part of the architecture flags patches, this patch changes the use

[gcc(refs/users/meissner/heads/work182)] Do not allow -mvsx to boost processor to power7.

https://gcc.gnu.org/g:a6909ea126a721bd648698d9a56ea7716906dcbe commit a6909ea126a721bd648698d9a56ea7716906dcbe Author: Michael Meissner Date: Tue Oct 22 15:43:14 2024 -0400 Do not allow -mvsx to boost processor to power7. This patch restructures the code so that -mvsx for example

[gcc(refs/users/meissner/heads/work182)] Use architecture flags for defining _ARCH_PWR macros.

https://gcc.gnu.org/g:b4706ba081116e8baf102ec4dfe6d7de5b0a6562 commit b4706ba081116e8baf102ec4dfe6d7de5b0a6562 Author: Michael Meissner Date: Tue Oct 22 15:42:15 2024 -0400 Use architecture flags for defining _ARCH_PWR macros. For the newer architectures, this patch changes GCC to

[gcc(refs/users/meissner/heads/work182)] Add rs6000 architecture masks.

https://gcc.gnu.org/g:ba27b84b0a10164b35ac0aa3f646d2d8aed0ec18 commit ba27b84b0a10164b35ac0aa3f646d2d8aed0ec18 Author: Michael Meissner Date: Tue Oct 22 15:41:19 2024 -0400 Add rs6000 architecture masks. This patch begins the journey to move architecture bits that are not user IS

[gcc(refs/users/meissner/heads/work182-orig)] Add REVISION.

https://gcc.gnu.org/g:c993c85006da5b73790de3c66d45a5a6c2caaa02 commit c993c85006da5b73790de3c66d45a5a6c2caaa02 Author: Michael Meissner Date: Tue Oct 22 15:38:01 2024 -0400 Add REVISION. 2024-10-22 Michael Meissner gcc/ * REVISION: New file for branch.

[gcc(refs/users/meissner/heads/work182-test)] Add ChangeLog.test and update REVISION.

https://gcc.gnu.org/g:5668ff6d8d52bdebd5da0c373c731e8abf5e2e21 commit 5668ff6d8d52bdebd5da0c373c731e8abf5e2e21 Author: Michael Meissner Date: Tue Oct 22 15:37:11 2024 -0400 Add ChangeLog.test and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chan

[gcc(refs/users/meissner/heads/work182-sha)] Add ChangeLog.sha and update REVISION.

https://gcc.gnu.org/g:d1443c1ab5e3f5ee4b9b007389cf531a8c27a3fc commit d1443c1ab5e3f5ee4b9b007389cf531a8c27a3fc Author: Michael Meissner Date: Tue Oct 22 15:36:24 2024 -0400 Add ChangeLog.sha and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc] Created branch 'meissner/heads/work182-sha' in namespace 'refs/users'

The branch 'meissner/heads/work182-sha' was created in namespace 'refs/users' pointing to: 075d5a2fce41... Add ChangeLog.meissner and REVISION.

[gcc(refs/users/meissner/heads/work182-libs)] Add ChangeLog.libs and update REVISION.

https://gcc.gnu.org/g:17018468383f86151f6516f79133caa558b74f5d commit 17018468383f86151f6516f79133caa558b74f5d Author: Michael Meissner Date: Tue Oct 22 15:35:38 2024 -0400 Add ChangeLog.libs and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chan

[gcc] Created branch 'meissner/heads/work182-libs' in namespace 'refs/users'

The branch 'meissner/heads/work182-libs' was created in namespace 'refs/users' pointing to: 075d5a2fce41... Add ChangeLog.meissner and REVISION.

[gcc(refs/users/meissner/heads/work182-bugs)] Add ChangeLog.bugs and update REVISION.

https://gcc.gnu.org/g:c08a14c463afb6bd9ed2930a7395f86496a1970f commit c08a14c463afb6bd9ed2930a7395f86496a1970f Author: Michael Meissner Date: Tue Oct 22 15:34:50 2024 -0400 Add ChangeLog.bugs and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chan

[gcc(refs/users/meissner/heads/work182-tar)] Add ChangeLog.tar and update REVISION.

https://gcc.gnu.org/g:587ce1e4fef7ffc7bea1aa7f1af987bd6917f4c8 commit 587ce1e4fef7ffc7bea1aa7f1af987bd6917f4c8 Author: Michael Meissner Date: Tue Oct 22 15:34:01 2024 -0400 Add ChangeLog.tar and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc] Created branch 'meissner/heads/work182-tar' in namespace 'refs/users'

The branch 'meissner/heads/work182-tar' was created in namespace 'refs/users' pointing to: 075d5a2fce41... Add ChangeLog.meissner and REVISION.

[gcc(refs/users/meissner/heads/work182-vpair)] Add ChangeLog.vpair and update REVISION.

https://gcc.gnu.org/g:546a02c3217901888a67e8cd830bec2a1a4bd70c commit 546a02c3217901888a67e8cd830bec2a1a4bd70c Author: Michael Meissner Date: Tue Oct 22 15:33:05 2024 -0400 Add ChangeLog.vpair and update REVISION. 2024-10-22 Michael Meissner gcc/ * Cha

[gcc] Created branch 'meissner/heads/work182-vpair' in namespace 'refs/users'

The branch 'meissner/heads/work182-vpair' was created in namespace 'refs/users' pointing to: 075d5a2fce41... Add ChangeLog.meissner and REVISION.

[gcc(refs/users/meissner/heads/work182-dmf)] Add ChangeLog.dmf and update REVISION.

https://gcc.gnu.org/g:d83d4ded1b6e7694cfa9903d953d2932d5e34376 commit d83d4ded1b6e7694cfa9903d953d2932d5e34376 Author: Michael Meissner Date: Tue Oct 22 15:32:17 2024 -0400 Add ChangeLog.dmf and update REVISION. 2024-10-22 Michael Meissner gcc/ * Chang

[gcc] Created branch 'meissner/heads/work182-dmf' in namespace 'refs/users'

The branch 'meissner/heads/work182-dmf' was created in namespace 'refs/users' pointing to: 075d5a2fce41... Add ChangeLog.meissner and REVISION.

[gcc(refs/users/meissner/heads/work182)] Add ChangeLog.meissner and REVISION.

https://gcc.gnu.org/g:075d5a2fce41ddbdfc8299bcca3622994acd1a1d commit 075d5a2fce41ddbdfc8299bcca3622994acd1a1d Author: Michael Meissner Date: Tue Oct 22 15:31:19 2024 -0400 Add ChangeLog.meissner and REVISION. 2024-10-22 Michael Meissner gcc/ * REVISIO

[gcc] Created branch 'meissner/heads/work182' in namespace 'refs/users'

The branch 'meissner/heads/work182' was created in namespace 'refs/users' pointing to: 5fd1c0c1b696... c-family: Fix up -Wsizeof-pointer-memaccess ICEs [PR117230]

  1   2   >