[gcc r14-10396] RISC-V: Bugfix vfmv insn honor zvfhmin for FP16 SEW [PR115763]

https://gcc.gnu.org/g:505382ceee0b5e72dc5defa05aec77a97658feca commit r14-10396-g505382ceee0b5e72dc5defa05aec77a97658feca Author: Pan Li Date: Wed Jul 3 22:06:48 2024 +0800 RISC-V: Bugfix vfmv insn honor zvfhmin for FP16 SEW [PR115763] According to the ISA, the zvfhmin sub extens

[gcc r15-1905] Rename __{float, double}_u to __x86_{float, double}_u to avoid pulluting the namespace.

https://gcc.gnu.org/g:23ab7f632f4f5bae67fb53cf7b18fea7ba7242c4 commit r15-1905-g23ab7f632f4f5bae67fb53cf7b18fea7ba7242c4 Author: liuhongt Date: Mon Jul 8 10:35:35 2024 +0800 Rename __{float,double}_u to __x86_{float,double}_u to avoid pulluting the namespace. I have a build failu

[gcc r15-1904] RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form 2

https://gcc.gnu.org/g:ecde8d50bea3573194f21277666f83463cbbe9c9 commit r15-1904-gecde8d50bea3573194f21277666f83463cbbe9c9 Author: Pan Li Date: Mon Jul 8 21:58:59 2024 +0800 RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form 2 After the middle-end supported the vector mode

[gcc r15-1903] RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form 1

https://gcc.gnu.org/g:35b1096896a94a90d787f5ef402ba009dd4f0393 commit r15-1903-g35b1096896a94a90d787f5ef402ba009dd4f0393 Author: Pan Li Date: Mon Jul 8 20:31:31 2024 +0800 RISC-V: Add testcases for unsigned vector .SAT_ADD IMM form 1 After the middle-end supported the vector mode

[gcc r15-1901] [to-be-committed][RISC-V][V3] DCE analysis for extension elimination

https://gcc.gnu.org/g:98914f9eba5f19d3eb93fbce8726b5264631cba0 commit r15-1901-g98914f9eba5f19d3eb93fbce8726b5264631cba0 Author: Jeff Law Date: Mon Jul 8 17:06:55 2024 -0600 [to-be-committed][RISC-V][V3] DCE analysis for extension elimination The pre-commit testing showed that mak

[gcc r15-1900] c-format.cc: add ctors to format_check_results and format_check_context

https://gcc.gnu.org/g:113b5ce0610207717f651a3f8a3f1123d93f97af commit r15-1900-g113b5ce0610207717f651a3f8a3f1123d93f97af Author: David Malcolm Date: Mon Jul 8 18:55:28 2024 -0400 c-format.cc: add ctors to format_check_results and format_check_context This is a minor cleanup I spot

[gcc r15-1899] i386: Promote {QI, HI}mode x86_movcc_0_m1_neg to SImode

https://gcc.gnu.org/g:2b3027bea3f218599d36379d3d593841df7a1559 commit r15-1899-g2b3027bea3f218599d36379d3d593841df7a1559 Author: Uros Bizjak Date: Mon Jul 8 20:47:52 2024 +0200 i386: Promote {QI,HI}mode x86_movcc_0_m1_neg to SImode Promote HImode x86_movcc_0_m1_neg insn to SImode

[gcc r15-1898] libstdc++: Fix _Atomic(T) macro in [PR115807]

https://gcc.gnu.org/g:40d234dd6439e8c8cfbf3f375a61906aed35c80d commit r15-1898-g40d234dd6439e8c8cfbf3f375a61906aed35c80d Author: Jonathan Wakely Date: Sun Jul 7 12:22:42 2024 +0100 libstdc++: Fix _Atomic(T) macro in [PR115807] The definition of the _Atomic(T) macro needs to refer

[gcc r15-1897] Remove trailing whitespace from invoke.texi

https://gcc.gnu.org/g:a0e64a043ec498f959a214b5b02d6c7177984a0f commit r15-1897-ga0e64a043ec498f959a214b5b02d6c7177984a0f Author: Patrick O'Neill Date: Tue Jul 2 18:28:00 2024 -0700 Remove trailing whitespace from invoke.texi gcc/ChangeLog: * doc/invoke.texi: Remov

[gcc r15-1896] x86: Support bitwise and/andnot/abs/neg/copysign/xorsign op for V8BF/V16BF/V32BF

https://gcc.gnu.org/g:f3f9e4ee7642e5131f2d6607f764267df7d233d4 commit r15-1896-gf3f9e4ee7642e5131f2d6607f764267df7d233d4 Author: Levy Hsu Date: Mon Jul 8 14:59:35 2024 + x86: Support bitwise and/andnot/abs/neg/copysign/xorsign op for V8BF/V16BF/V32BF This patch extends suppor

[gcc r11-11562] c++: Add testcase for this PR [PR97990]

https://gcc.gnu.org/g:c2c216d0f85f861cc10529a455edfaf645aa393f commit r11-11562-gc2c216d0f85f861cc10529a455edfaf645aa393f Author: Andrew Pinski Date: Fri Feb 16 10:55:43 2024 -0800 c++: Add testcase for this PR [PR97990] This testcase was fixed by r14-5934-gf26d68d5d128c8 but we s

[gcc r11-11561] middle-end/112732 - stray TYPE_ALIAS_SET in type variant

https://gcc.gnu.org/g:e7879391bb2b86606d0ce35ed97eccc108970e36 commit r11-11561-ge7879391bb2b86606d0ce35ed97eccc108970e36 Author: Richard Biener Date: Tue Nov 28 12:36:21 2023 +0100 middle-end/112732 - stray TYPE_ALIAS_SET in type variant The following fixes a stray TYPE_ALIAS_SET

[gcc r14-10394] tree-optimization/115723 - ICE with .COND_ADD reduction

https://gcc.gnu.org/g:64a6c0d594c05f275de91df35047cffb3ccecf2f commit r14-10394-g64a6c0d594c05f275de91df35047cffb3ccecf2f Author: Richard Biener Date: Mon Jul 1 10:06:55 2024 +0200 tree-optimization/115723 - ICE with .COND_ADD reduction The following fixes an ICE with a .COND_ADD

[gcc r14-10392] tree-optimization/115669 - fix SLP reduction association

https://gcc.gnu.org/g:03844a2a15a85015506c0f187d0e9d526900cc2c commit r14-10392-g03844a2a15a85015506c0f187d0e9d526900cc2c Author: Richard Biener Date: Thu Jun 27 11:26:08 2024 +0200 tree-optimization/115669 - fix SLP reduction association The following avoids associating a reducti

[gcc r14-10393] tree-optimization/115694 - ICE with complex store rewrite

https://gcc.gnu.org/g:cde411950e91e0174a0134360d2eb138ca6821c6 commit r14-10393-gcde411950e91e0174a0134360d2eb138ca6821c6 Author: Richard Biener Date: Sun Jun 30 13:07:14 2024 +0200 tree-optimization/115694 - ICE with complex store rewrite The following adds a missed check when fo

[gcc r14-10391] tree-optimization/115646 - ICE with pow shrink-wrapping from bitfield

https://gcc.gnu.org/g:078cdccc849831b8f1ff74b9ad16ce3f5aa172be commit r14-10391-g078cdccc849831b8f1ff74b9ad16ce3f5aa172be Author: Richard Biener Date: Tue Jun 25 16:13:02 2024 +0200 tree-optimization/115646 - ICE with pow shrink-wrapping from bitfield The following makes analysis

[gcc r15-1895] rs6000: load high and low part of 128bit vector independently [PR110040]

https://gcc.gnu.org/g:5be97039aa6c27fdf5d5bd43ef393b307c5ecedd commit r15-1895-g5be97039aa6c27fdf5d5bd43ef393b307c5ecedd Author: Jeevitha Date: Mon Jul 8 06:09:49 2024 -0500 rs6000: load high and low part of 128bit vector independently [PR110040] PR110040 exposes an issue concerni

[gcc r15-1894] RISC-V: Implement .SAT_TRUNC for vector unsigned int

https://gcc.gnu.org/g:dafd63d7c5cddce1e00803606e742d75927b1a1e commit r15-1894-gdafd63d7c5cddce1e00803606e742d75927b1a1e Author: Pan Li Date: Fri Jul 5 09:02:47 2024 +0800 RISC-V: Implement .SAT_TRUNC for vector unsigned int This patch would like to implement the .SAT_TRUNC for th

[gcc r15-1893] fortran: Move definition of variable closer to its uses

https://gcc.gnu.org/g:7183a8ca18d5889a1f66ec1edbda00200d700c6c commit r15-1893-g7183a8ca18d5889a1f66ec1edbda00200d700c6c Author: Mikael Morin Date: Mon Jul 8 09:38:42 2024 +0200 fortran: Move definition of variable closer to its uses No change of behaviour, this makes a variable e