[Bug target/110061] libatomic: 128-bit atomics should be lock-free on AArch64

2023-05-31 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110061 Wilco changed: What|Removed |Added Resolution|DUPLICATE |--- Status|RESOLVED

[Bug rtl-optimization/109930] transform atomic exchange to unconditional store when old value is unused?

2023-05-31 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109930 Wilco changed: What|Removed |Added CC||wilco at gcc dot gnu.org --- Comment #4 from

[Bug target/110061] libatomic: 128-bit atomics should be lock-free on AArch64

2023-06-02 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110061 --- Comment #9 from Wilco --- (In reply to Xi Ruoyao from comment #8) > (In reply to Wilco from comment #7) > > I don't see the issue you have here. GCC for x86/x86_64 has been using > > compare exchange for atomic load (which always does a writ

[Bug target/110061] libatomic: 128-bit atomics should be lock-free on AArch64

2023-06-02 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110061 --- Comment #11 from Wilco --- (In reply to Xi Ruoyao from comment #10) > (In reply to Wilco from comment #9) > > (In reply to Xi Ruoyao from comment #8) > > > (In reply to Wilco from comment #7) > > > > I don't see the issue you have here. GCC

[Bug target/110061] libatomic: 128-bit atomics should be lock-free on AArch64

2023-06-02 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110061 --- Comment #13 from Wilco --- (In reply to Xi Ruoyao from comment #12) > (In reply to Wilco from comment #11) > > > > Then the compiler (and the standard) is not what they consider. Such > > > misunderstandings are everywhere and this has no

[Bug target/110061] libatomic: 128-bit atomics should be lock-free on AArch64

2023-06-02 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110061 --- Comment #14 from Wilco --- (In reply to Wilco from comment #13) > (In reply to Xi Ruoyao from comment #12) > > (In reply to Wilco from comment #11) > > > > > > Then the compiler (and the standard) is not what they consider. Such > > > > mi

[Bug target/110061] libatomic: 128-bit atomics should be lock-free on AArch64

2023-12-22 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110061 Wilco changed: What|Removed |Added Target Milestone|--- |14.0 --- Comment #16 from Wilco --- Fixed by h

[Bug target/113618] New: [14 Regression] AArch64: memmove idiom regression

2024-01-26 Thread wilco at gcc dot gnu.org via Gcc-bugs
Component: target Assignee: unassigned at gcc dot gnu.org Reporter: wilco at gcc dot gnu.org Target Milestone: --- The following is often used as an idiom for memmove since GCC mid-end and most back-ends have no support for inlining memmove: void move64 (char *a, char *b) { char

[Bug target/113618] [14 Regression] AArch64: memmove idiom regression

2024-01-29 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113618 --- Comment #3 from Wilco --- (In reply to Richard Biener from comment #2) > It might be good to recognize this pattern in strlenopt or a related pass. > > A purely local transform would turn it into > > memcpy (temp, a, 64); > memmove

[Bug target/113618] [14 Regression] AArch64: memmove idiom regression

2024-01-31 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113618 Wilco changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |wilco at gcc dot gnu.org --- Comment #4

[Bug middle-end/115388] [15 Regression] wrong code at -O3 on x86_64-linux-gnu since r15-571-g1e0ae1f52741f7

2024-06-10 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115388 Wilco changed: What|Removed |Added CC||wilco at gcc dot gnu.org --- Comment #7 from

[Bug target/115342] [14/15 Regression] AArch64: Function multiversioning initialization incorrect

2024-06-20 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115342 Wilco changed: What|Removed |Added Status|NEW |ASSIGNED --- Comment #3 from Wilco --- (In rep

[Bug target/115342] [14/15 Regression] AArch64: Function multiversioning initialization incorrect

2024-06-21 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115342 Wilco changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug ipa/114531] Feature proposal for an `-finline-functions-aggressive` compiler option

2024-06-25 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114531 Wilco changed: What|Removed |Added CC||wilco at gcc dot gnu.org --- Comment #10 from

[Bug target/115188] [14/15 regression] invalid Thumb assembly for atomic store in loop on ARMv6

2024-07-05 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115188 Wilco changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/105886] -mstrict-align is ignorning unalign in some cases

2024-07-05 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105886 Bug 105886 depends on bug 103100, which changed state. Bug 103100 Summary: [11 Regression] unaligned access generated with memset or {} and -O2 -mstrict-align https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103100 What|Removed

[Bug target/103100] [11 Regression] unaligned access generated with memset or {} and -O2 -mstrict-align

2024-07-05 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103100 Wilco changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/114890] [14/15 Regression] Big-endian addp intrinsics reorder operands

2024-07-09 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114890 Wilco changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug target/115153] [14/15 Regression] Error: bad immediate value for 8-bit offset - armv7ve

2024-07-09 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115153 Wilco changed: What|Removed |Added Resolution|--- |FIXED Status|ASSIGNED

[Bug middle-end/115954] New: Alignment of _Atomic structs incompatible between GCC and LLVM

2024-07-16 Thread wilco at gcc dot gnu.org via Gcc-bugs
Priority: P3 Component: middle-end Assignee: unassigned at gcc dot gnu.org Reporter: wilco at gcc dot gnu.org Target Milestone: --- The following code shows ABI inconsistencies between GCC and LLVM: #include #include #include _Atomic struct A3 { char a[3

[Bug middle-end/115954] Alignment of _Atomic structs incompatible between GCC and LLVM

2024-07-16 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115954 --- Comment #5 from Wilco --- (In reply to Richard Biener from comment #2) > (In reply to Richard Biener from comment #1) > > Not sure what the x86 psABI says here (possibly nothing for aggregate > > _Atomic). > > It doesn't consider _Atomic [i

[Bug target/115954] Alignment of _Atomic structs incompatible between GCC and LLVM

2024-07-16 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115954 --- Comment #7 from Wilco --- (In reply to Andrew Pinski from comment #6) > https://gitlab.com/x86-psABIs/i386-ABI/-/issues/1 for x86_64 abi. > > Aarch64 should most likely also do the same ... Yes, that's why I raised this - GCC only over ali

[Bug target/115954] Alignment of _Atomic structs incompatible between GCC and LLVM

2024-07-17 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115954 --- Comment #12 from Wilco --- This came out of the AArch64 Atomic ABI design work: https://github.com/ARM-software/abi-aa/pull/256

[Bug target/116032] [12/13/14/15 Regression] gcc.target/arm/pr40457-2.c produces larger code for armv7ve+neon

2024-07-23 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116032 Wilco changed: What|Removed |Added CC||wilco at gcc dot gnu.org --- Comment #3 from

[Bug target/117292] [15 Regression] ICE: in aarch64_output_simd_imm, at config/aarch64/aarch64.cc:25422 at -Os

2024-10-25 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117292 Wilco changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |wilco at gcc dot gnu.org --- Comment #4

[Bug target/117292] [15 Regression] ICE: in aarch64_output_simd_imm, at config/aarch64/aarch64.cc:25422 at -Os

2024-10-25 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117292 Wilco changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/117675] [14/15 regression] ARM Cortex 7-A ldrd register overlap

2024-11-27 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117675 Wilco changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |wilco at gcc dot gnu.org --- Comment #4

[Bug target/117675] [14/15 regression] ARM Cortex 7-A ldrd register overlap

2024-12-18 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117675 Wilco changed: What|Removed |Added Resolution|--- |FIXED Status|NEW

[Bug target/118351] [15 Regression] 6% regression in 470.lbm_r in SPECCPU 2006 on AArch64 since r15-6661-gc5db3f50bdf34e

2025-01-10 Thread wilco at gcc dot gnu.org via Gcc-bugs
gcc dot gnu.org |wilco at gcc dot gnu.org Status|UNCONFIRMED |NEW Ever confirmed|0 |1 --- Comment #4 from Wilco --- Confirmed. I had a quick look - performance counters suggest the increase in cycles is due to backend stalls, so early

[Bug target/118142] libatomic fails to build for AARCH64:ILP32

2025-01-10 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118142 Wilco changed: What|Removed |Added CC||wilco at gcc dot gnu.org --- Comment #9 from

[Bug target/118955] Fortran uses vector math functions without -ffast-math

2025-02-24 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118955 --- Comment #11 from Wilco --- (In reply to Andrew Pinski from comment #8) > Though accessing the errno from fortran is almost never done anyways so I > doubt that will matter here. The issue is that fast-math is the combination of many differ

[Bug target/118955] Fortran uses vector math functions without -ffast-math

2025-02-24 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118955 --- Comment #12 from Wilco --- (In reply to Richard Biener from comment #9) > I have also always wondered about that glibc guard, esp. it being the > kitchen-sink fast-math guard rather than sth more specific (yep, we don't > have anything for -

[Bug fortran/118955] New: Fortran uses vector math functions without -ffast-math

2025-02-20 Thread wilco at gcc dot gnu.org via Gcc-bugs
Component: fortran Assignee: unassigned at gcc dot gnu.org Reporter: wilco at gcc dot gnu.org Target Milestone: --- This example will use the vector cosf even with -O2: !GCC$ builtin (cosf) attributes simd (notinbranch) PARAMETER (NX=100, G=1.4) DIMENSION T(NX), P(NX) INTEGER

[Bug fortran/118955] Fortran uses vector math functions without -ffast-math

2025-02-20 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118955 Wilco changed: What|Removed |Added Target Milestone|--- |16.0 Target|

[Bug fortran/118955] Fortran uses vector math functions without -ffast-math

2025-02-20 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118955 --- Comment #2 from Wilco --- (In reply to Thomas Koenig from comment #1) > > Since vector > > functions can have much larger ULP errors, using them by default with -O2 > > seems excessive. > > "can have"? Is this indeed the case? I would consi

[Bug target/118955] Fortran uses vector math functions without -ffast-math

2025-02-20 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118955 --- Comment #6 from Wilco --- (In reply to Andrew Pinski from comment #5) > Or you could just do: > #define TARGET_F951_OPTIONS "%{Ofast|ffast-math|funsafe-math-optimizations: \ > %{!nostdinc: \ >%:fortran-preinclude-file(-fpre-include= mat

[Bug target/118999] [15 regression] AArch64: Switching off early scheduling (r15-6661-gc5db3f50bdf34e) causes regressions in Snappy workload for -mcpu=neoverse-v2

2025-03-06 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118999 Wilco changed: What|Removed |Added CC||wilco at gcc dot gnu.org Last reconfirmed

[Bug other/38768] -fschedule-insns documentation is wrong for x86 and some other targets

2025-03-06 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=38768 Wilco changed: What|Removed |Added CC||wilco at gcc dot gnu.org --- Comment #11 from

[Bug target/118999] [15 regression] AArch64: Switching off early scheduling (r15-6661-gc5db3f50bdf34e) causes regressions in Snappy workload for -mcpu=neoverse-v2

2025-03-06 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118999 --- Comment #1 from Wilco --- Thanks for the reproducer, confirmed. It is hard to blame this on scheduling since the difference is almost exclusively due to a huge increase of branch mispredictions. The basic block layout is oddly different in t

[Bug target/119131] [15 Regression] ICE: in get_attr_type, at config/aarch64/aarch64.md:17054 at -O2 since r15-6660

2025-03-11 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119131 --- Comment #10 from Wilco --- (In reply to Andrew Pinski from comment #6) > I am trying to understand why there were checks for DECIMAL_FLOAT_MODE_P in > the first place. Removing them allows the testcase to pass. That was because the origina

[Bug target/119131] [15 Regression] ICE: in get_attr_type, at config/aarch64/aarch64.md:17054 at -O2 since r15-6660

2025-03-05 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119131 --- Comment #3 from Wilco --- This is a latent issue with zero handling for decimal float, this looks wrong: /* Return TRUE if rtx X is immediate constant 0.0 (but not in Decimal Floating Point). */ bool aarch64_float_const_zero_rtx_p (rtx

[Bug middle-end/110773] [Aarch64] crash (SIGBUS) due to atomic instructions on under-aligned memory

2025-03-27 Thread wilco at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110773 Wilco changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

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