[Bug translation/79397] AltiVec spelled incorrectly in rs6000.opt

2017-02-08 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79397 Segher Boessenkool changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug testsuite/79356] XPASS in attr-alloc_size-11.c

2017-02-09 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Assignee|unassigned at gcc dot gnu.org |segher at gcc dot gnu.org --- Comment #4 from Segher Boessenkool --- I have a patch.

[Bug target/79439] Missing nop instruction after recursive call corrupts TOC register

2017-02-09 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79439 --- Comment #1 from Segher Boessenkool --- What command line options does this need? I get different assembly (also with GCC 6), since GCC recognises that rec can never return: .globl rec .type rec, @function rec: .LCF1: 0:

[Bug target/79439] Missing nop instruction after recursive call corrupts TOC register

2017-02-09 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79439 --- Comment #3 from Segher Boessenkool --- -fpic does the trick. Confirmed.

[Bug target/79439] Missing nop instruction after recursive call corrupts TOC register

2017-02-09 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79439 Segher Boessenkool changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug testsuite/79356] XPASS in attr-alloc_size-11.c

2017-02-10 Thread segher at gcc dot gnu.org
gcc dot gnu.org |unassigned at gcc dot gnu.org --- Comment #6 from Segher Boessenkool --- Patch withdrawn.

[Bug tree-optimization/66612] [6/7/8 regression] FAIL: gcc.target/powerpc/20050830-1.c scan-assembler bdn

2017-02-10 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66612 --- Comment #15 from Segher Boessenkool --- Author: segher Date: Fri Feb 10 16:58:14 2017 New Revision: 245337 URL: https://gcc.gnu.org/viewcvs?rev=245337&root=gcc&view=rev Log: testsuite, rs6000: Don't xfail 32-bit (PR66612) -m32 works fine, o

[Bug tree-optimization/79460] gcc fails to optimise out a trivial additive loop for seemingly arbitrary numbers of iterations

2017-02-11 Thread segher at gcc dot gnu.org
||2017-02-11 CC||segher at gcc dot gnu.org Ever confirmed|0 |1

[Bug middle-end/61225] [5/6/7 Regression] Several new failures after r210458 on x86_64-*-* with -m32

2017-02-11 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61225 --- Comment #30 from Segher Boessenkool --- Trying to combine the load+add+store, combine is trying insns like Failed to match this instruction: (parallel [ (set (mem:SI (reg/v/f:SI 90 [ x ]) [1 *x_5(D)+0 S4 A32]) (plus:SI (m

[Bug tree-optimization/79460] gcc fails to optimise out a trivial additive loop for seemingly arbitrary numbers of iterations

2017-02-14 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79460 --- Comment #12 from Segher Boessenkool --- (In reply to Jakub Jelinek from comment #7) > Shouldn't it (both in the vectorizer and in scev) be dependent not just on > flag_fp_contract_mode but also on some -ffast-math subflag? Doing several > ad

[Bug rtl-optimization/68664] [6 Regression] Speculative sqrt in c-ray main loop causes large slow down

2017-02-14 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68664 Segher Boessenkool changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug target/79140] gcc.target/powerpc/ssp-1.c fails starting with its introduction in r244562

2017-02-20 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79140 Segher Boessenkool changed: What|Removed |Added Known to work||7.0 --- Comment #4 from Segher Boes

[Bug target/79211] [7 Regression] ICE in extract_insn, at recog.c:2311

2017-02-22 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79211 --- Comment #6 from Segher Boessenkool --- Author: segher Date: Wed Feb 22 23:50:46 2017 New Revision: 245667 URL: https://gcc.gnu.org/viewcvs?rev=245667&root=gcc&view=rev Log: rs6000: Fix fsel pattern (PR79211) The fsel define_insn uses fpr_re

[Bug target/79211] [7 Regression] ICE in extract_insn, at recog.c:2311

2017-02-22 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79211 Segher Boessenkool changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug rtl-optimization/79150] ICE: in commit_one_edge_insertion, at cfgrtl.c:2077 for the gcc.dg/pr77834.c test

2017-02-24 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79150 --- Comment #6 from Segher Boessenkool --- Well, does that "end with a non-branch" work? Not ICE that is; the real problem will need to be dealt with as well, just probably not in stage 4.

[Bug target/57353] unrecognizable insn in decLibrary.c, ICE in extract_insn

2017-02-27 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |INVALID --- Comment #3 from Segher Boessenkool --- Closing then.

[Bug target/69617] PowerPC/e6500: Atomic byte/halfword operations not properly supported

2017-02-27 Thread segher at gcc dot gnu.org
||2017-02-27 CC||segher at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #3 from Segher Boessenkool --- rs6000.h has /* Byte/char syncs were added as phased in for ISA 2.06B, but are not present in

[Bug target/32110] vector "extract" and then vector "splat" is not optimized

2017-02-28 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |FIXED --- Comment #3 from Segher Boessenkool --- Works since (at least) 4.9; closing as fixed.

[Bug middle-end/32401] [PPC/Altivec] Non optimal code structure with -mabi=altivec

2017-03-01 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |FIXED --- Comment #2 from Segher Boessenkool --- This was fixed in GCC 5 or GCC 6. So, closing this PR.

[Bug target/34903] -Os does not use lmw/stmw for multiple ranges

2017-03-01 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=34903 --- Comment #11 from Segher Boessenkool --- lmw and stmw always restore/store r31, you cannot do multiple ranges. lswi/stwsi could help. Also, the current rs6000 code does not use lmw/stmw if that wouldn't cover all GPRs to restore.

[Bug middle-end/36770] PowerPC missed autoincrement opportunity

2017-03-01 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=36770 Segher Boessenkool changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/38939] MULLW on often faster than SLWI ADD SLWI ADD..

2017-03-02 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=38939 Segher Boessenkool changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug tree-optimization/40073] Vector short/char shifts generate sub-optimal code

2017-03-02 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=40073 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug middle-end/40375] redundant register move with scheduler before RA turned off

2017-03-02 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |FIXED --- Comment #10 from Segher Boessenkool --- This now works fine with trunk on both powerpc and arm thumb, with -O2 and -Os and with or without -fno-schedule-insns. Closing as fixed; please

[Bug other/16996] [meta-bug] code size improvements

2017-03-02 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=16996 Bug 16996 depends on bug 40375, which changed state. Bug 40375 Summary: redundant register move with scheduler before RA turned off https://gcc.gnu.org/bugzilla/show_bug.cgi?id=40375 What|Removed |Added

[Bug middle-end/41742] Unnecessary zero-extension at -O2 but not -O1

2017-03-02 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=41742 --- Comment #2 from Segher Boessenkool --- With current trunk the loop code is better (uses stbu), but the unnecessary extend still is there: memset: cmpwi 0,5,0 beqlr 0 rlwinm 4,4,0,0xff mtctr 5 addi 9,3,

[Bug c++/43313] ICE with non-POD and covariant return thunks

2017-03-02 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |FIXED --- Comment #9 from Segher Boessenkool --- At least GCC 6 and later refuse this testcase: 36:7: error: 'virtual ICarousel::~ICarousel()' is private within this context (but it accep

[Bug rtl-optimization/46854] PowerPC optimization regression

2017-03-03 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |FIXED --- Comment #5 from Segher Boessenkool --- Current trunk does (with -O2) test: mr. 10,3 lis 3,.LANCHOR0@ha la 3,.LANCHOR0@l(3) beqlr 0 .p2align 5,,31 .L3

[Bug target/43763] segfault when using by -mwarn-cell-microcode

2017-03-03 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=43763 --- Comment #4 from Segher Boessenkool --- Author: segher Date: Fri Mar 3 17:00:50 2017 New Revision: 245880 URL: https://gcc.gnu.org/viewcvs?rev=245880&root=gcc&view=rev Log: rs6000: Fix for -mwarn-cell-microcode (PR43763) If using -mwarn-cel

[Bug target/43763] segfault when using by -mwarn-cell-microcode

2017-03-03 Thread segher at gcc dot gnu.org
|unassigned at gcc dot gnu.org |segher at gcc dot gnu.org

[Bug target/77687] frame access after release without redzone on powerpc

2017-03-03 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77687 Segher Boessenkool changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Last reconfirmed|

[Bug target/50467] Compiler can move stack cleanup before last memory reference involving the stack

2017-03-03 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |DUPLICATE --- Comment #3 from Segher Boessenkool --- This is a duplicate of 77687, which is fixed on trunk. *** This bug has been marked as a duplicate of bug 77687 ***

[Bug target/77687] frame access after release without redzone on powerpc

2017-03-03 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77687 Segher Boessenkool changed: What|Removed |Added CC||meissner at gcc dot gnu.org --- Com

[Bug target/54168] ARM: Redundant instructions emitted at -O3

2017-03-04 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54168 Segher Boessenkool changed: What|Removed |Added Target|arm, powerpc*-*-* |arm --- Comment #2 from Segher Boes

[Bug target/56606] GCC refuses to emit long calls for operator new/delete on PowerPC

2017-03-04 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56606 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug target/56906] FAIL: g++.dg/opt/vt4.C -std=gnu++* scan-assembler-not _ZTV.A

2017-03-04 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |FIXED --- Comment #5 from Segher Boessenkool --- Fixed on all open release branches, so let's close this now.

[Bug rtl-optimization/61984] use mr. to remove extra cmp instruction on ppc

2017-03-04 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61984 Segher Boessenkool changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/79395] Compile error with -mcpu=power9 and __builtin_vec_vcmpne_p

2017-03-04 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79395 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug target/79251] PowerPC vec_insert generates store-hit-load if the element number is variable

2017-03-04 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79251 --- Comment #2 from Segher Boessenkool --- Perhaps something like: (copy word 1 in vB to word rB in vT; BE) sldi rB,rB,2 lvsl vP,0,rB vperm vT,vT,vT,vP xxinsertw vT,vB,0 lvsr vP,0,rB vperm vT,vT,vT,vP (i.e. rotate the dest vector so that the de

[Bug target/79233] portable p-bit shift with p <= 64 not optimized on powerpc64

2017-03-04 Thread segher at gcc dot gnu.org
||2017-03-04 CC||segher at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Segher Boessenkool --- Yes, but how can we model this in GCC?

[Bug target/79202] On Power8, consider using vupkhsw/xxpermdi to sign extend an int in a vector register instead of mfvsrwz/mtvsrwa

2017-03-04 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79202 --- Comment #5 from Segher Boessenkool --- Can't this just use a friz? If the cast to int wouldn't fit in an int it is undefined behaviour.

[Bug target/69143] PowerPC64: aggregate results are badly handled

2017-03-06 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69143 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug target/69034] ICE: RTL check: expected elt 1 type 'e' or 'u', have 'i' (rtx unspec) in copy_replacements_1, at reload.c:6323 with -fPIC and "X" asm input

2017-03-06 Thread segher at gcc dot gnu.org
||2017-03-07 CC||segher at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #4 from Segher Boessenkool --- Still fails on trunk (needs -mno-lra there, on powerpc -- the bug is (exposed) in reload).

[Bug inline-asm/59155] ICE: in reg_overlap_mentioned_p, at rtlanal.c:1473

2017-03-07 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59155 --- Comment #8 from Segher Boessenkool --- *** Bug 69034 has been marked as a duplicate of this bug. ***

[Bug target/69034] ICE: RTL check: expected elt 1 type 'e' or 'u', have 'i' (rtx unspec) in copy_replacements_1, at reload.c:6323 with -fPIC and "X" asm input

2017-03-07 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69034 Segher Boessenkool changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/79845] rs6000: make code in rd6000.c more i18n-friendly

2017-03-07 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79845 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug target/79623] error building a cross compiler for powerpc

2017-03-07 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |WONTFIX --- Comment #7 from Segher Boessenkool --- Please try with a supported version of GCC; reopen this bug if the problem still happens for you, then. If you want to ask questions about ancient

[Bug fortran/79484] Segfault when executing a test in Power8

2017-03-07 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79484 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug testsuite/79356] XPASS in attr-alloc_size-11.c

2017-03-10 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79356 --- Comment #8 from Segher Boessenkool --- Author: segher Date: Fri Mar 10 15:23:06 2017 New Revision: 246032 URL: https://gcc.gnu.org/viewcvs?rev=246032&root=gcc&view=rev Log: testsuite: attr-alloc_size-11.c (PR79356) As stated in the PR (and

[Bug testsuite/79356] XPASS in attr-alloc_size-11.c

2017-03-10 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79356 Segher Boessenkool changed: What|Removed |Added Target|s390x-*-*, powerpc*-*-*,|s390x-*-*, powerpc*-*-*,

[Bug rtl-optimization/79985] ICE in code_motion_path_driver, at sel-sched.c:6580

2017-03-10 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79985 --- Comment #2 from Segher Boessenkool --- Fails with -O2 -fselective-scheduling -mcpu=power8; also on BE, does not fail with power7. Confirmed.

[Bug target/68421] unused copy of global register variable into another gpr

2017-03-14 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68421 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug sanitizer/65643] FAIL: c-c++-common/asan/swapcontext-test-1.c on powerpc64

2017-03-14 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |WONTFIX --- Comment #4 from Segher Boessenkool --- This was a bug in glibc, see https://sourceware.org/bugzilla/show_bug.cgi?id=20004 , fixed at https://sourceware.org/git/gitweb.cgi?p=glibc.git;h

[Bug target/62233] unnecessary shift instructions to prepare loop counter

2017-03-14 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62233 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug target/62147] missed loop counter based optimization

2017-03-14 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62147 --- Comment #3 from Segher Boessenkool --- Still happens.

[Bug target/61837] missed loop invariant expression optimization

2017-03-14 Thread segher at gcc dot gnu.org
||2017-03-15 CC||segher at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #1 from Segher Boessenkool --- Confirmed. Still happens.

[Bug target/71294] [6 Regression] ICE in gen_add2_insn, at optabs.c:4442 on powerpc64le-linux

2017-03-15 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71294 --- Comment #15 from Segher Boessenkool --- You need to build GCC with a new enough binutils, 2.24 I believe.

[Bug fortran/33271] nint_2.f90 abort compiled with -O0

2017-03-15 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=33271 --- Comment #22 from Segher Boessenkool --- Author: segher Date: Wed Mar 15 20:48:49 2017 New Revision: 246174 URL: https://gcc.gnu.org/viewcvs?rev=246174&root=gcc&view=rev Log: rs6000: Do not xfail nint_2.f90 on Linux systems It was XFAILed be

[Bug rtl-optimization/79405] [7 Regression] Compile-time hog w/ -O2 (-Os, -O3) on 32-bit BE powerpc targets

2017-03-17 Thread segher at gcc dot gnu.org
|unassigned at gcc dot gnu.org |segher at gcc dot gnu.org --- Comment #7 from Segher Boessenkool --- The testcase has undefined behaviour, of course. We start with these insns, all in the same basic block, in this order: B := A|Z(1) A := B (2) D := A (3) First propagating (1

[Bug rtl-optimization/79910] [7 Regression] wrong code with -O -fweb

2017-03-20 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79910 --- Comment #7 from Segher Boessenkool --- Author: segher Date: Mon Mar 20 23:08:16 2017 New Revision: 246297 URL: https://gcc.gnu.org/viewcvs?rev=246297&root=gcc&view=rev Log: combine: Fix 79910 If the dest of an I0 or I1 is used in an insn be

[Bug target/80101] ICE in store_data_bypass_p, at recog.c:3737

2017-03-20 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80101 Segher Boessenkool changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/80101] ICE in store_data_bypass_p, at recog.c:3737

2017-03-20 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80101 --- Comment #1 from Segher Boessenkool --- power6.md defines a bypass: ; define the bypass for the case where the value written ; by a fixed point op is used as the source value on a ; store. (define_bypass 1 "power6-integer,\

[Bug target/80103] ICE in output_1144, at config/rs6000/vsx.md:2298

2017-03-20 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80103 Segher Boessenkool changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/80107] ICE in final_scan_insn, at final.c:2964

2017-03-20 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80107 Segher Boessenkool changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/80108] ICE in aggregate_value_p at function.c:2028

2017-03-20 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80108 Segher Boessenkool changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/80125] [7 Regression] r246297 causes segfault in reg_used_between_p()

2017-03-21 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80125 --- Comment #4 from Segher Boessenkool --- Created attachment 41010 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41010&action=edit another patch I used this one instead. all_adjacent is a pretty useless optimisation here, reg_used_betwe

[Bug middle-end/80131] powerpc: 1U << (31 - x) doesn't generate optimised code

2017-03-21 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80131 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug middle-end/80131] powerpc: 1U << (31 - x) doesn't generate optimised code

2017-03-21 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80131 --- Comment #4 from Segher Boessenkool --- Yeah, good point. Of course c is unsigned in the example, but we should handle signed as well (and that info is lost in RTL anyway).

[Bug target/80102] [7 Regression] ICE in maybe_record_trace_start, at dwarf2cfi.c:2330

2017-03-24 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80102 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug rtl-optimization/60818] ICE in validate_condition_mode on powerpc*-linux-gnu*

2017-03-25 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60818 --- Comment #14 from Segher Boessenkool --- I cannot get any of the testcases to fail with current trunk (but they do fail with GCC 6). Combine always merges the compare into the if_then_else pattern, and there are no such patterns in rs6000 (th

[Bug target/54063] [5/6/7 regression] on powerpc64 gcc 4.9/5/6/7 generates larger code for global variable accesses than gcc 4.7

2017-03-27 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54063 Segher Boessenkool changed: What|Removed |Added CC||segher at gcc dot gnu.org

[Bug target/47847] PowerPC: ICE: -mcpu=8540 -meabi -msdata -fno-common -mfloat-gprs=double

2017-03-28 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |INVALID --- Comment #2 from Segher Boessenkool --- So, not a bug.

[Bug target/47751] Wrong code with -mcpu=8540 -mfloat-gprs=double -mspe -Os on PowerPC

2017-03-28 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |INVALID --- Comment #4 from Segher Boessenkool --- Not a bug.

[Bug rtl-optimization/45498] Optimisations fail above arbitrary level of complexity

2017-03-28 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |FIXED --- Comment #3 from Segher Boessenkool --- At least as far back as 4.9, GCC does not touch the stack in the inner loop (except for stfiwx insns). Closing as fixed.

[Bug testsuite/43496] gcc.target/powerpc/gcse-1.c fails on powerpc-unknown-linux-gnu with -fpic/-fPIC

2017-03-28 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=43496 --- Comment #3 from Segher Boessenkool --- Author: segher Date: Tue Mar 28 22:26:17 2017 New Revision: 246555 URL: https://gcc.gnu.org/viewcvs?rev=246555&root=gcc&view=rev Log: rs6000: Fix gcc.target/powerpc/gcse-1.c for PIC (PR43496) With PIC

[Bug rtl-optimization/80233] [7 Regression] ICE in combine_instructions w/ -O2 (and above)

2017-03-29 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80233 --- Comment #2 from Segher Boessenkool --- How about this patch instead? --- a/gcc/combine.c +++ b/gcc/combine.c @@ -1250,7 +1250,8 @@ combine_instructions (rtx_insn *f, unsigned int nregs) continue; while (last_combined_i

[Bug rtl-optimization/80233] [7 Regression] ICE in combine_instructions w/ -O2 (and above)

2017-03-29 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80233 Segher Boessenkool changed: What|Removed |Added Keywords|ice-on-valid-code |ice-on-invalid-code --- Comment #3

[Bug target/32826] Reduction into a global variable causes a Load Hit Store Hazard (for the Cell)

2017-03-29 Thread segher at gcc dot gnu.org
||2017-03-29 CC||segher at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #4 from Segher Boessenkool --- It generates different code now, but still a LHS: vxor 0,0,0 li 10,16 lis 9

[Bug target/31557] return 0x80000000UL code gen can be improved

2017-03-29 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |FIXED --- Comment #5 from Segher Boessenkool --- Fixed on trunk, no backports planned, closing.

[Bug target/31557] return 0x80000000UL code gen can be improved

2017-03-29 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=31557 Segher Boessenkool changed: What|Removed |Added Status|RESOLVED|REOPENED Resolution|FIXED

[Bug rtl-optimization/80233] [7 Regression] ICE in combine_instructions w/ -O2 (and above)

2017-03-29 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80233 --- Comment #5 from Segher Boessenkool --- Author: segher Date: Wed Mar 29 20:53:59 2017 New Revision: 246575 URL: https://gcc.gnu.org/viewcvs?rev=246575&root=gcc&view=rev Log: combine: Fix PR80233 If combine has added an unconditional trap the

[Bug target/80108] ICE in aggregate_value_p at function.c:2028

2017-03-29 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80108 --- Comment #8 from Segher Boessenkool --- Hi Kelvin, 405 does not have VSX (or even VMX). The instructions enabled by -mpower9-minmax require VSX. The following behaviours all make sense, for -mcpu=405 -mpower9-minmax: 1) Ignore the latter o

[Bug rtl-optimization/80233] [7 Regression] ICE in combine_instructions w/ -O2 (and above)

2017-03-30 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80233 --- Comment #7 from Segher Boessenkool --- Is it fixed? Can this not happen on GCC 6?

[Bug rtl-optimization/60818] ICE in validate_condition_mode on powerpc*-linux-gnu*

2017-03-30 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60818 --- Comment #18 from Segher Boessenkool --- Okay, this I can reproduce (no -fPIC needed, not even -m32). Thanks!

[Bug rtl-optimization/80233] [7 Regression] ICE in combine_instructions w/ -O2 (and above)

2017-03-30 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80233 --- Comment #9 from Segher Boessenkool --- Yeah exactly... so I'm conflicted whether we need to backport this or not.

[Bug target/20614] PowerPC - inefficient use of condition register

2017-03-30 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |FIXED --- Comment #7 from Segher Boessenkool --- At least as far back as 4.9 GCC does no longer generate subfic; is uses a mix of cntlzw/srwi, addic/subfe, and cmpw insns. Using more than three CR

[Bug target/27212] vec_cmplt followed by a vec_all_ge, gives two vcmpgtuh instructions

2017-03-30 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |FIXED --- Comment #7 from Segher Boessenkool --- This has been fixed long ago.

[Bug target/17593] Over Aggressive Speculative Code Motion

2017-03-30 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |FIXED --- Comment #3 from Segher Boessenkool --- Since at least 4.9 only two registers are stored on the frame, and there is no frame at all for the early exits. I don't see any weird specul

[Bug testsuite/80056] gcc.dg/tree-prof/pr66295.c fails on powerpc

2017-03-30 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |FIXED --- Comment #2 from Segher Boessenkool --- I fixed this in r246206 (wasn't aware of this PR).

[Bug target/80132] powerpc: irrelevant register move before operation

2017-03-30 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |WORKSFORME --- Comment #1 from Segher Boessenkool --- This works fine on trunk. Closing this PR. If you want whatever fixed it backported, please identify what change fixed it.

[Bug rtl-optimization/80134] powerpc: loop on p[i] and *p++ should give the same code

2017-03-30 Thread segher at gcc dot gnu.org
||segher at gcc dot gnu.org Resolution|--- |DUPLICATE --- Comment #1 from Segher Boessenkool --- This is a duplicate of PR67288 (and many others). *** This bug has been marked as a duplicate of bug 67288 ***

[Bug target/67288] [5/6/7 regression] non optimal simple function (useless additional shift/remove/shift/add)

2017-03-30 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67288 --- Comment #7 from Segher Boessenkool --- *** Bug 80134 has been marked as a duplicate of this bug. ***

[Bug testsuite/43496] gcc.target/powerpc/gcse-1.c fails on powerpc-unknown-linux-gnu with -fpic/-fPIC

2017-03-30 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=43496 Segher Boessenkool changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

[Bug rtl-optimization/60818] ICE in validate_condition_mode on powerpc*-linux-gnu*

2017-03-31 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60818 --- Comment #21 from Segher Boessenkool --- You don't even need -Os for this last testcase, only -misel.

[Bug rtl-optimization/60818] ICE in validate_condition_mode on powerpc*-linux-gnu*

2017-03-31 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60818 --- Comment #22 from Segher Boessenkool --- The combination that makes it die is: Trying 18, 17 -> 19: Successfully matched this instruction: (set (reg:CC 176) (reg:CC 164)) Where insn 18 is (set (reg:SI 174) (gt:SI (reg:CC 164)

[Bug rtl-optimization/60818] ICE in validate_condition_mode on powerpc*-linux-gnu*

2017-03-31 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60818 --- Comment #23 from Segher Boessenkool --- I have a patch for the problem in comments 17 and 19 (which is different from the problems in earlier comments, only some of which i can reproduce).

[Bug rtl-optimization/60818] ICE in validate_condition_mode on powerpc*-linux-gnu*

2017-04-03 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60818 --- Comment #24 from Segher Boessenkool --- Author: segher Date: Tue Apr 4 00:10:02 2017 New Revision: 24 URL: https://gcc.gnu.org/viewcvs?rev=24&root=gcc&view=rev Log: simplify-rtx: Fix compare of comparisons (PR60818) The function si

[Bug target/80210] ICE in in extract_insn, at recog.c:2311 on ppc64 for with __builtin_pow

2017-04-10 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80210 --- Comment #2 from Segher Boessenkool --- Confirmed. The define_expand condition is *not* checked?! Possibly by the pow->sqrt code (yeah I'm guessing here).

[Bug target/80099] ICE in rs6000_expand_vector_extract, at config/rs6000/rs6000.c:7450

2017-04-10 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80099 Segher Boessenkool changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/80382] ICE with error: unrecognizable insn

2017-04-11 Thread segher at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80382 Segher Boessenkool changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |segher at gcc dot gnu.org

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