[Bug web/87461] New: Web site should use a responsive template

2018-09-28 Thread rearnsha at gcc dot gnu.org
Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org Target Milestone: --- If the GCC website is viewed on a small screen device, such as a mobile phone, then the entire page is scaled as-is until it will fit the width of the device. This makes it

[Bug c++/87373] Byte by byte accessing to the peripheral registers causes issues on ARM v7-m architecture

2018-10-01 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87373 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/82989] [6/7 regression] Inexplicable use of NEON for 64-bit math

2018-04-04 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82989 Richard Earnshaw changed: What|Removed |Added Target Milestone|7.4 |6.5

[Bug target/81647] inconsistent LTGT behavior at different optimization levels on AArch64.

2018-04-04 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81647 Richard Earnshaw changed: What|Removed |Added Target Milestone|--- |7.4

[Bug target/87565] suboptimal memory-indirect tailcalls on arm

2018-10-09 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87565 --- Comment #1 from Richard Earnshaw --- Not a good idea. Modern CPUs often don't predict such operations correctly

[Bug target/86383] [9 Regression] arm-netbsdelf cross compiler fails in selftests

2018-10-23 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86383 --- Comment #15 from Richard Earnshaw --- (In reply to coypu from comment #14) > Also, after these two patches, my own build of arm--netbsdelf is failing > from this: > configure: error: Pthreads are required to build libgomp > > Looking at conf

[Bug target/86383] [9 Regression] arm-netbsdelf cross compiler fails in selftests

2018-10-23 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86383 --- Comment #16 from Richard Earnshaw --- Author: rearnsha Date: Tue Oct 23 10:19:15 2018 New Revision: 265420 URL: https://gcc.gnu.org/viewcvs?rev=265420&root=gcc&view=rev Log: [arm] Update default CPUs during configure There are a c

[Bug bootstrap/87747] New: [9 regression] Bootstrap failure if using gcc-4.6 as stage1 compiler

2018-10-25 Thread rearnsha at gcc dot gnu.org
Severity: normal Priority: P3 Component: bootstrap Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: iii at linux dot ibm.com, rsandifo at gcc dot gnu.org Target Milestone: --- Target: arm-none

[Bug bootstrap/87747] [9 regression] Bootstrap failure if using gcc-4.6 as stage1 compiler

2018-10-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87747 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug c++/87760] Unable to delete overloads of std::memset on arm

2018-10-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87760 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug c++/87760] Unable to delete overloads of std::memset on arm

2018-10-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87760 Richard Earnshaw changed: What|Removed |Added Resolution|WORKSFORME |FIXED Target Milestone|---

[Bug bootstrap/87747] [9 regression] Bootstrap failure if using gcc-4.6 as stage1 compiler

2018-10-30 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87747 --- Comment #5 from Richard Earnshaw --- Author: rearnsha Date: Tue Oct 30 11:33:24 2018 New Revision: 265620 URL: https://gcc.gnu.org/viewcvs?rev=265620&root=gcc&view=rev Log: Don't allow the pool allocator to be configured to

[Bug rtl-optimization/87763] [9 Regression] aarch64 target testcases fail after r265398

2018-11-12 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=87763 --- Comment #6 from Richard Earnshaw --- (In reply to Wilco from comment #5) > (In reply to Segher Boessenkool from comment #4) > > (In reply to Wilco from comment #3) > > > IRA costing doesn't consider the possibility of a simple move being > >

[Bug libfortran/78314] [aarch64] ieee_support_halting does not report unsupported fpu traps correctly

2018-11-20 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78314 --- Comment #11 from Richard Earnshaw --- (In reply to nsz from comment #10) > it turns out the ieee_* functions are allowed in const expressions so they > need to work at compile time too (see bug 78449), which of course won't work > if they nee

[Bug target/86383] [9 Regression] arm-netbsdelf cross compiler fails in selftests

2018-11-20 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86383 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/88224] Wrong Cortex-R7 and Cortex-R8 FPU configuration

2018-11-27 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88224 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug rtl-optimization/54540] [4.8 regression] postreload incorrectly simplifies stack adjustment into constant load into SP

2012-11-20 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=54540 --- Comment #6 from Richard Earnshaw 2012-11-20 09:35:02 UTC --- (In reply to comment #5) > Can this be closed now? Well the comment 4 is still relevant, I suspect that there are still latent issues in postreload.

[Bug target/55073] Wrong Neon code generation at -O2 caused by -fschedule-insns

2012-11-29 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55073 --- Comment #1 from Richard Earnshaw 2012-11-29 17:51:49 UTC --- Author: rearnsha Date: Thu Nov 29 17:51:40 2012 New Revision: 193943 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=193943 Log: PR target/55073

[Bug target/55073] Wrong Neon code generation at -O2 caused by -fschedule-insns

2012-11-29 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55073 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|

[Bug target/55073] Wrong Neon code generation at -O2 caused by -fschedule-insns

2012-11-30 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55073 --- Comment #4 from Richard Earnshaw 2012-11-30 09:58:38 UTC --- (In reply to comment #3) > Hello Richard > > I updated my working copy of gcc to rev 193943, rebuilt the compiler, rebuilt > the testcase I originally attached to this bug

[Bug target/55073] Wrong Neon code generation at -O2 caused by -fschedule-insns

2012-11-30 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55073 --- Comment #8 from Richard Earnshaw 2012-11-30 14:00:21 UTC --- (In reply to comment #7) > Richard, > > I apologize, building at -O0 (and handrolling an assembly routine to do the > same computation) proves me wrong : your values are t

[Bug target/55073] Wrong Neon code generation at -O2 caused by -fschedule-insns

2012-11-30 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55073 --- Comment #10 from Richard Earnshaw 2012-11-30 14:40:07 UTC --- (In reply to comment #9) > Do you think rebuilding arm-linux-androideabi-gcc on Linux to check if the > generated code is the same is worth the time or is there no chance wh

[Bug target/55073] Wrong Neon code generation at -O2 caused by -fschedule-insns

2012-11-30 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55073 --- Comment #11 from Richard Earnshaw 2012-11-30 14:55:25 UTC --- Something else to check is that you are using the version of arm_neon.h that comes with gcc-4.8. This file has to match the version of GCC it was designed for.

[Bug target/55073] Wrong Neon code generation at -O2 caused by -fschedule-insns

2012-11-30 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55073 Richard Earnshaw changed: What|Removed |Added Status|RESOLVED|REOPENED Resolution|F

[Bug target/55073] Wrong Neon code generation at -O2 caused by -fschedule-insns

2012-11-30 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55073 Richard Earnshaw changed: What|Removed |Added CC||bernds at gcc dot gnu.org --

[Bug regression/55754] FAIL: gcc.target/arm/unsigned-extend-2.c scan-assembler ands

2012-12-20 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55754 --- Comment #3 from Richard Earnshaw 2012-12-20 15:44:23 UTC --- (In reply to comment #1) > This hunk needs to be reverted. op0 is modified but it is set to an equivalent > value. Perhaps you could update the documentation to make that

[Bug rtl-optimization/55757] Suboptimal interrupt prologue/epilogue for ARMv7-M (Cortex-M3)

2012-12-20 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55757 Richard Earnshaw changed: What|Removed |Added Priority|P3 |P5 Status|UNCONFI

[Bug c/56024] ARM NEON polynomial types behave as if signed

2013-01-18 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56024 Richard Earnshaw changed: What|Removed |Added Target||arm-eabi, arm-linux-gnueabi

[Bug c++/56025] ARM NEON polynomial types have broken overload resolution

2013-01-18 Thread rearnsha at gcc dot gnu.org
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56025 Richard Earnshaw changed: What|Removed |Added Target||arm-eabi, arm-linux-gnueabi

[Bug target/70008] [ARM] Reverse subtract with carry can be generated in thumb2 mode

2016-02-29 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70008 --- Comment #1 from Richard Earnshaw --- Huh? The attribute (set_attr "arch" "*,a") Should disable the second alternative for Thumb.

[Bug target/70014] [ARM] Predicate does not match constraint (*subsi3_carryin_const)

2016-02-29 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70014 --- Comment #1 from Richard Earnshaw --- More importantly, the constraint on operand 2 is for just a constant. but the predicate accepts a register. That's something the register allocator could not handle.

[Bug c/70089] ARM/THUMB unnecessarily typecasts some rvalues on memory store

2016-03-05 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70089 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug c/70088] New: ARM/THUMB unnecessarily typecasts some rvalues on memory store

2016-03-05 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70088 Bug ID: 70088 Summary: ARM/THUMB unnecessarily typecasts some rvalues on memory store Product: gcc Version: 5.2.1 Status: UNCONFIRMED Severity: minor

[Bug c/70089] ARM/THUMB unnecessarily typecasts some rvalues on memory store

2016-03-06 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70089 Richard Earnshaw changed: What|Removed |Added Status|RESOLVED|UNCONFIRMED Resolution|DUPLIC

[Bug c/70088] ARM/THUMB unnecessarily typecasts some rvalues on memory store

2016-03-06 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70088 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug c/70089] ARM/THUMB unnecessarily typecasts some rvalues on memory store

2016-03-06 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70089 --- Comment #4 from Richard Earnshaw --- *** Bug 70088 has been marked as a duplicate of this bug. ***

[Bug target/69614] [4.9/5 Regression] wrong code with -Os -fno-expensive-optimizations -fschedule-insns -mtpcs-leaf-frame -fira-algorithm=priority @ armv7a

2016-03-31 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69614 Richard Earnshaw changed: What|Removed |Added Target Milestone|6.0 |5.4

[Bug target/67896] Inconsistent behaviour between C and C++ for types poly8x8_t and poly16x8_t

2016-04-01 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67896 Richard Earnshaw changed: What|Removed |Added Target Milestone|--- |5.4

[Bug target/70566] [4.9/5/6 Regression] Bad ARM code generated for evaluating unsigned int bitfield value

2016-04-07 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70566 --- Comment #7 from Richard Earnshaw --- (In reply to ktkachov from comment #6) > Ah, on second glance the peephole looks correct in itself, but the second > branch following the bmi uses an incorrect condition code. > So we have: > tst

[Bug c++/70755] [ARM] excessive struct alignment for globals

2016-04-22 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70755 Richard Earnshaw changed: What|Removed |Added Target||arm Status|UNCONFIRMED

[Bug target/70738] Add -minteger-only option

2016-04-22 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70738 --- Comment #1 from Richard Earnshaw --- AArch64 already has a similar option already. We've called it -mgeneral-regs-only.

[Bug target/70894] ICE when using neon intrinsic with mabi=apcs-gnu

2016-05-09 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70894 Richard Earnshaw changed: What|Removed |Added Keywords||ice-on-invalid-code Statu

[Bug c++/70755] [ARM] excessive struct alignment for globals

2016-05-10 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70755 Richard Earnshaw changed: What|Removed |Added Priority|P3 |P4 Status|RESOLVED

[Bug libfortran/78449] compile time ieee_support_halting is not correct on arm and aarch64 ( FAIL: gfortran.dg/ieee/ieee_8.f90 -Os execution test )

2017-07-30 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78449 Richard Earnshaw changed: What|Removed |Added Target Milestone|--- |7.0

[Bug target/40836] ICE: "insn does not satisfy its constraints" (iwmmxt_movsi_insn)

2017-08-03 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=40836 Richard Earnshaw changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|---

[Bug target/81720] [arm] Invalid code generation

2017-08-04 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81720 Richard Earnshaw changed: What|Removed |Added Resolution|INVALID |WONTFIX --- Comment #5 from Richard E

[Bug middle-end/81818] aarch64 uses 2-3x memory and 2x time of arm at -Os, -O2, -O3

2017-08-16 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81818 --- Comment #9 from Richard Earnshaw --- (In reply to Andrew Roberts from comment #8) > I've tried building gcc-8-20170806 and gcc-8-20170813 with > --enable-gather-detailed-mem-stats > > This fails on x86-64, arm and aarch64 with the same error

[Bug target/81907] memset called when it does not need to be; -mtune=cortex-a9

2017-08-22 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81907 --- Comment #14 from Richard Earnshaw --- (In reply to dongkyun.s from comment #13) > > Confirmed the call on 6.4.1 but GCC 7 and trunk don't generate the call for > > -mcpu=cortex-a9 . > > I also verified memset call is not generated with GCC

[Bug target/82175] [8 Regression] -march=native fails on armv7 big/little system armv7l-unknown-linux-gnueabihf with gcc 8.0.0

2017-09-25 Thread rearnsha at gcc dot gnu.org
||2017-09-25 Assignee|unassigned at gcc dot gnu.org |rearnsha at gcc dot gnu.org Ever confirmed|0 |1 --- Comment #3 from Richard Earnshaw --- Mine

[Bug target/82175] [8 Regression] -march=native fails on armv7 big/little system armv7l-unknown-linux-gnueabihf with gcc 8.0.0

2017-09-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82175 --- Comment #4 from Richard Earnshaw --- Author: rearnsha Date: Tue Sep 26 09:33:49 2017 New Revision: 253189 URL: https://gcc.gnu.org/viewcvs?rev=253189&root=gcc&view=rev Log: [ARM] PR82175 - fix -mcpu=native not working correctly.

[Bug target/82175] [8 Regression] -march=native fails on armv7 big/little system armv7l-unknown-linux-gnueabihf with gcc 8.0.0

2017-09-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82175 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/77728] [5/6/7/8 Regression] Miscompilation multiple vector iteration on ARM

2017-04-25 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728 --- Comment #40 from Richard Earnshaw --- (In reply to Jakub Jelinek from comment #39) > It is an ABI change, so I think it is highly undesirable to backport. It is > enough that people will have to rebuild many packages built by GCC 7 > prerele

[Bug target/77728] [5/6/7/8 Regression] Miscompilation multiple vector iteration on ARM

2017-04-25 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728 --- Comment #43 from Richard Earnshaw --- Hmm, so how about just inserting the warning in the broken compilers?

[Bug target/77728] [5/6 Regression] Miscompilation multiple vector iteration on ARM

2017-04-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728 --- Comment #51 from Richard Earnshaw --- (In reply to Jonathan Wakely from comment #50) > (In reply to ktkachov from comment #3) > > Started with r225465. > > Something to do with alignment. > > I wonder if it's related to PR69841 ? > > Seems t

[Bug target/77728] [5/6 Regression] Miscompilation multiple vector iteration on ARM

2017-04-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728 Richard Earnshaw changed: What|Removed |Added CC||klug.stefan at gmx dot de --- Comment

[Bug libstdc++/80149] segfault in std::vector::resize when mixing binaries from gcc4 and gcc5 on armhf

2017-04-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80149 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/69841] Wrong template instantiation in C++11 on armv7l

2017-04-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69841 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/77728] [5/6 Regression] Miscompilation multiple vector iteration on ARM

2017-04-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77728 Richard Earnshaw changed: What|Removed |Added CC||biblbroks at hotmail dot com --- Comm

[Bug target/80530] [7/8 Regression][AArch64] ICE when expanding reciprocal square root with -mcpu=exynos-m1 or -mcpu=xgene-1

2017-04-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80530 Richard Earnshaw changed: What|Removed |Added Target||aarch64 Status|UNCONFIRME

[Bug target/80530] [7/8 Regression][AArch64] ICE when expanding reciprocal square root with -mcpu=exynos-m1 or -mcpu=xgene-1

2017-04-27 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80530 --- Comment #3 from Richard Earnshaw --- Author: rearnsha Date: Thu Apr 27 14:09:55 2017 New Revision: 247340 URL: https://gcc.gnu.org/viewcvs?rev=247340&root=gcc&view=rev Log: [AArch64] Fix for gcc-7 regression PR 80530 This patch f

[Bug target/80530] [7/8 Regression][AArch64] ICE when expanding reciprocal square root with -mcpu=exynos-m1 or -mcpu=xgene-1

2017-04-27 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80530 --- Comment #4 from Richard Earnshaw --- Author: rearnsha Date: Thu Apr 27 14:11:47 2017 New Revision: 247341 URL: https://gcc.gnu.org/viewcvs?rev=247341&root=gcc&view=rev Log: [AArch64] Fix for gcc-7 regression PR 80530 This patch f

[Bug target/80530] [7/8 Regression][AArch64] ICE when expanding reciprocal square root with -mcpu=exynos-m1 or -mcpu=xgene-1

2017-04-27 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80530 Richard Earnshaw changed: What|Removed |Added Keywords||ice-on-valid-code Status|

[Bug target/80627] The Dart is crashing when glibc is compiled with arch armv7-a

2017-05-04 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80627 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/80627] The Dart is crashing when glibc is compiled with arch armv7-a

2017-05-04 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80627 Richard Earnshaw changed: What|Removed |Added Resolution|FIXED |INVALID

[Bug target/80627] The Dart is crashing when glibc is compiled with arch armv7-a

2017-05-04 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80627 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug rtl-optimization/80754] invalid smull instructions generated after r247881

2017-05-15 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80754 Richard Earnshaw changed: What|Removed |Added CC||rearnsha at gcc dot gnu.org

[Bug target/46128] There is no mechanism for detecting VFP revisions in ARM GCC.

2017-06-19 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46128 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/45886] [ARM] support for __ARM_PCS_VFP predefined symbol in gcc 4.5.x would be very nice

2017-06-19 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=45886 --- Comment #6 from Richard Earnshaw --- Closing. All versions of gcc since 4.6 have supported __ARM_PCS_VFP. Older versions are no-longer maintained.

[Bug target/45886] [ARM] support for __ARM_PCS_VFP predefined symbol in gcc 4.5.x would be very nice

2017-06-19 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=45886 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug testsuite/53664] neon-testgen.ml generates duplicate scan-assembler directives

2017-06-19 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53664 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/11824] [ARM] Parameter passing via stack could be improved

2017-06-20 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=11824 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug other/16996] [meta-bug] code size improvements

2017-06-20 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=16996 Bug 16996 depends on bug 11824, which changed state. Bug 11824 Summary: [ARM] Parameter passing via stack could be improved https://gcc.gnu.org/bugzilla/show_bug.cgi?id=11824 What|Removed |Added

[Bug bootstrap/81168] Absence of vfp2 FPU

2017-06-22 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81168 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug c++/81229] [8 Regression] ICE in c_tree_chain_next on aarch64

2017-06-29 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81229 Richard Earnshaw changed: What|Removed |Added CC||nathan at acm dot org --- Comment #4

[Bug target/81273] Wrong code generated for ARM setting volatile struct field with a literal

2017-07-03 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81273 --- Comment #4 from Richard Earnshaw --- (In reply to LdB from comment #3) > I am stunned you could not build the code the only requirement is you > include the stdint.h so the uint32_t types are defined. I will fix the typos > are you really say

[Bug target/81273] Wrong code generated for ARM setting volatile struct field with a literal

2017-07-03 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81273 Richard Earnshaw changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|---

[Bug tree-optimization/81356] __builtin_strcpy is not good for copying an empty string on aarch64

2017-07-08 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81356 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/71436] [7 Regression] Segmentation fault in arm_output_multireg_pop

2016-11-30 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71436 --- Comment #12 from Richard Earnshaw --- (In reply to Jakub Jelinek from comment #8) > Or reload_completed || lra_in_progress, or punt on pseudos in the predicate. I think these patterns can be generated during the expand of inlined memcpy oper

[Bug target/78255] [5/6/7 regression] Indirect sibling call causing wrong code generation for ARM

2016-12-01 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78255 --- Comment #8 from Richard Earnshaw --- Hmm, why is this even being considered on ARM? arm.h:#define NO_FUNCTION_CSE 1 doc/tm.texi @defmac NO_FUNCTION_CSE Define this macro to be true if it is as good or better to call a constant function addr

[Bug target/77904] [ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used

2016-12-14 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77904 Richard Earnshaw changed: What|Removed |Added Target Milestone|--- |6.3

[Bug target/77933] Stack corruption on ARM when using high registers and __builtin_return_address

2016-12-14 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77933 Richard Earnshaw changed: What|Removed |Added Target Milestone|--- |5.5

[Bug target/78974] STM32L4 CPU read burst access equal to or more than 9 registers to FMC returns corrupted data starting from the 9th read word

2017-01-04 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78974 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug libstdc++/63829] _Lock_policy used in thread.cc can cause incompatibilities with binaries using different -mcpu

2017-01-06 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63829 --- Comment #8 from Richard Earnshaw --- From a discussion on IRC: What's the general story on lock policies? Are environments supposed to support all three? (if possible) no. it's something only used in std::shared_ptr, and generally entirely i

[Bug target/78397] The stack is not 8 bytes aligned on ARM

2017-01-11 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78397 --- Comment #3 from Richard Earnshaw --- The __aeabi_read_tp call is to a special helper function and not really considered to be a 'public interface'; the EABI only requires conformance to the stack alignment constraints at public interfaces. A

[Bug tree-optimization/78319] [7 Regression] PASS->FAIL: gcc.dg/uninit-pred-8_a.c bogus warning (test for bogus messages, line 20)

2017-01-11 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78319 --- Comment #17 from Richard Earnshaw --- (In reply to Jakub Jelinek from comment #15) > Unless people commonly use > RUNTESTFLAGS='--target_board=unix\{-mtune=cortex-a15,-mtune=cortex-m7\}' or > something similar, that might work well. The amo

[Bug target/78397] The stack is not 8 bytes aligned on ARM

2017-01-13 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78397 --- Comment #5 from Richard Earnshaw --- (In reply to Alexandre Martins from comment #4) > Unfortunatly, it's not crashing into the __aeabi_read_tp function, but into > the dynamic linker of freebsd (rtld-elf). For info, this function is located

[Bug rtl-optimization/79121] New: [6, 7 regression] invalid expansion of sign-extend unsigned plus left shift

2017-01-17 Thread rearnsha at gcc dot gnu.org
: wrong-code Severity: normal Priority: P3 Component: rtl-optimization Assignee: unassigned at gcc dot gnu.org Reporter: rearnsha at gcc dot gnu.org CC: jiwang at gcc dot gnu.org Target Milestone: --- Target: arm-* mips-* In

[Bug rtl-optimization/79121] [6/7 Regression] invalid expansion of sign-extend unsigned plus left shift

2017-01-19 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79121 --- Comment #2 from Richard Earnshaw --- Author: rearnsha Date: Thu Jan 19 10:35:38 2017 New Revision: 244613 URL: https://gcc.gnu.org/viewcvs?rev=244613&root=gcc&view=rev Log: [expand] Fix for PR rtl-optimization/79121 incorrect e

[Bug rtl-optimization/79121] [6 Regression] invalid expansion of sign-extend unsigned plus left shift

2017-01-19 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79121 Richard Earnshaw changed: What|Removed |Added Version|7.0 |6.0 Summary|[6/7 Regressio

[Bug rtl-optimization/79121] [6 Regression] invalid expansion of sign-extend unsigned plus left shift

2017-01-20 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79121 --- Comment #4 from Richard Earnshaw --- Author: rearnsha Date: Fri Jan 20 11:43:58 2017 New Revision: 244702 URL: https://gcc.gnu.org/viewcvs?rev=244702&root=gcc&view=rev Log: [expand] Fix for PR rtl-optimization/79121 incorrect e

[Bug rtl-optimization/79121] [6/7 Regression] invalid expansion of sign-extend unsigned plus left shift

2017-01-20 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79121 Richard Earnshaw changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[Bug target/79166] [ARM] Implement neon_valid_immediate tricks for BYTES_BIG_ENDIAN

2017-01-20 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79166 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/78397] The stack is not 8 bytes aligned on ARM

2017-01-20 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78397 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|---

[Bug target/71399] [5/6/7 Regression] 5.3.0 bootstrap comparison failure on arm-linux-gnueabihf

2017-01-20 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71399 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |WAITING Last reconfirmed|

[Bug rtl-optimization/77770] [5/6/7 Regression] Internal compiler error on source which compiles with earlier versions.

2017-01-23 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=0 Richard Earnshaw changed: What|Removed |Added Last reconfirmed|2016-09-28 00:00:00 |2017-1-23 CC|

[Bug target/78041] Wrong code on ARMv7 with -mthumb -mfpu=neon-fp16 -O0

2017-01-24 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041 Richard Earnshaw changed: What|Removed |Added Target Milestone|--- |5.5

[Bug target/79239] [7 regression] ICE in extract_insn, at recog.c:2311 (error: unrecognizable insn)

2017-01-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79239 Richard Earnshaw changed: What|Removed |Added Assignee|unassigned at gcc dot gnu.org |rearnsha at gcc dot gnu.org

[Bug target/79239] [7 regression] ICE in extract_insn, at recog.c:2311 (error: unrecognizable insn)

2017-01-26 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79239 --- Comment #8 from Richard Earnshaw --- Patch posted here https://gcc.gnu.org/ml/gcc-patches/2017-01/msg02073.html

[Bug target/79260] [7 Regression] missing header files for plugins: arm-isa.h, arm-flags.h

2017-01-30 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79260 --- Comment #2 from Richard Earnshaw --- Author: rearnsha Date: Mon Jan 30 14:39:50 2017 New Revision: 245029 URL: https://gcc.gnu.org/viewcvs?rev=245029&root=gcc&view=rev Log: PR target/79260 * config.gcc (arm*-*-*):

[Bug target/79260] [7 Regression] missing header files for plugins: arm-isa.h, arm-flags.h

2017-01-30 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79260 Richard Earnshaw changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|---

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