[Bug target/58460] Error: shift amount out of range 0 to 4 at operand 3 -- `sub sp,x1,x0,lsl 9'

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58460 mshawcroft at gcc dot gnu.org changed: What|Removed |Added CC||mshawcroft at gcc dot

[Bug target/58460] Error: shift amount out of range 0 to 4 at operand 3 -- `sub sp,x1,x0,lsl 9'

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58460 --- Comment #2 from mshawcroft at gcc dot gnu.org --- Author: mshawcroft Date: Fri Oct 4 14:57:04 2013 New Revision: 203204 URL: http://gcc.gnu.org/viewcvs?rev=203204&root=gcc&view=rev Log: [AArch64] Fix PR58460. 2013-10-04 Marcus S

[Bug target/58460] Error: shift amount out of range 0 to 4 at operand 3 -- `sub sp,x1,x0,lsl 9'

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58460 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED

[Bug other/60133] [4.8/4.9 Regression] wrong multiarch name on aarch64-linux-gnu

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60133 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED

[Bug target/60580] aarch64 generates wrong code for __attribute__ ((optimize("no-omit-frame-pointer")))

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60580 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Status|NEW |ASSIGNED --- Comment #5

[Bug tree-optimization/46038] Vectorizer generates misaligned address for vld1 qn, [rn:alignment]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46038 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED

[Bug target/59725] [4.9 Regression] ARM,AArch64 r206148 (PR tree-optimization/59544) caused regressions in pr52943

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59725 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Status|NEW |RESOLVED

[Bug tree-optimization/59651] [4.9 Regression] Vectorizer failing to spot dependence causes incorrect code generation.

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59651 mshawcroft at gcc dot gnu.org changed: What|Removed |Added CC||christophe.lyon at st dot

[Bug target/63975] some of the builtin-arith-overflow* fail on aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63975 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Status|REOPENED|RESOLVED

[Bug testsuite/63971] Some of gcc.target/aarch64/test_frame_*.c tests fail now

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63971 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED

[Bug target/64456] [AArch64] pr64252.c fail on aarch64_be

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64456 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Status|NEW |RESOLVED

[Bug target/64149] -mno-lra bitrots, suggest to remove for GCC 5

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64149 mshawcroft at gcc dot gnu.org changed: What|Removed |Added CC||mshawcroft at gcc dot

[Bug target/64224] [ARM] -mapcs -marm uses deprecated forms (as of ARMv7-A) of LDM in epilogues

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64224 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED

[Bug target/61633] New: AArch64 SISD ASHR instruction split clobbers input register.

Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: mshawcroft at gcc dot gnu.org The FFT code in Android AAC codec at -O2 is incorrectly compiled resulting in an infinite loop. I've failed to reduce the test case to something usable bu

[Bug target/61633] AArch64 SISD ASHR instruction split clobbers input register.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61633 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Target||aarch64

[Bug target/61633] AArch64 SISD ASHR instruction split clobbers input register.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61633 --- Comment #1 from mshawcroft at gcc dot gnu.org --- Author: mshawcroft Date: Mon Jun 30 07:54:59 2014 New Revision: 212137 URL: https://gcc.gnu.org/viewcvs?rev=212137&root=gcc&view=rev Log: [AArch64] Fix register cl

[Bug target/61633] AArch64 SISD ASHR instruction split clobbers input register.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61633 --- Comment #2 from mshawcroft at gcc dot gnu.org --- Author: mshawcroft Date: Mon Jun 30 11:58:18 2014 New Revision: 212143 URL: https://gcc.gnu.org/viewcvs?rev=212143&root=gcc&view=rev Log: [AArch64] Fix register cl

[Bug target/61633] AArch64 SISD ASHR instruction split clobbers input register.

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61633 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED

[Bug target/58622] With -fomit-frame-pointer, A64 does not generate post-decrement stores

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58622 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Status|ASSIGNED|RESOLVED

[Bug target/58622] With -fomit-frame-pointer, A64 does not generate post-decrement stores

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58622 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Target Milestone|--- |4.10.0

[Bug target/62262] aarch64 gcc generates invalid assembler

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62262 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Status|NEW |RESOLVED

[Bug target/63190] New: Assembler errors when building md5 code from fbb on aarch64

Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: mshawcroft at gcc dot gnu.org See the debian bug report here: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=758964 Venkat has patch in review here: https://gcc.gnu.org/ml/gcc-patches

[Bug target/63190] Assembler errors when building md5 code from fbb on aarch64

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63190 mshawcroft at gcc dot gnu.org changed: What|Removed |Added Target||aarch64