[Bug other/58374] New: Wrong target check in configure.ac in libvtv

: other Assignee: unassigned at gcc dot gnu.org Reporter: hjl.tools at gmail dot com configure.ac in libvtv in has unset VTV_SUPPORTED AC_MSG_CHECKING([for host support for vtable verification]) . ${srcdir}/configure.tgt AC_MSG_RESULT($VTV_SUPPORTED) # Decide if it's u

[Bug middle-end/58387] [4.9 Regression] wrong code at -Os and above on x86_64-linux-gnu (both 32-bit and 64-bit modes)

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58387 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug middle-end/58387] [4.9 Regression] wrong code at -Os and above on x86_64-linux-gnu (both 32-bit and 64-bit modes)

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58387 H.J. Lu changed: What|Removed |Added CC||law at gcc dot gnu.org --- Comment #8 from H.J.

[Bug bootstrap/58340] [4.9 regression] gcc/cp/pt.c:7064:1: internal compiler error: in propagate_threaded_block_debug_into, at tree-ssa-threadedge.c:623

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58340 H.J. Lu changed: What|Removed |Added Status|REOPENED|NEW --- Comment #24 from H.J. Lu --- r202345 a

[Bug c/57657] [regression from 4.7] Reports incorrect cache sizes on corei7

||2013-09-13 CC||hjl.tools at gmail dot com Ever confirmed|0 |1 --- Comment #2 from H.J. Lu --- I can't reproduce it with GCC 4.8.2 20130715 on Sandy Bridge, Ivy Bridge nor Haswell. It may be fixed by

[Bug target/58416] Incorrect x87-based union copying code

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58416 --- Comment #1 from H.J. Lu --- This may be related to PR57484.

[Bug c/57657] [regression from 4.7] Reports incorrect cache sizes on corei7

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=57657 H.J. Lu changed: What|Removed |Added Status|WAITING |RESOLVED Resolution|---

[Bug middle-end/58418] [4.9 Regression] wrong code at -O2 and -O3 on x86_64-linux-gnu (in 32-bit mode)

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58418 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug middle-end/58419] [4.9 Regression] wrong code at -O3 on x86_64-linux-gnu in 32-bit mode

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58419 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/58450] -fno-trapping-math causes decrease in performance

||2013-09-17 CC||hjl.tools at gmail dot com Ever confirmed|0 |1 --- Comment #2 from H.J. Lu --- This is related to PR 57988. Without -fno-trapping-math, there are 0x004009b6 <+54>:cvtsi2s

[Bug c++/56038] declarations in xmmintrin.h conflict with mingw-w64 intrin.h in c++ mode

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=56038 --- Comment #9 from H.J. Lu --- Does mingw provide its own SSE/MMX intrinsic implementations? Can mingw just include where SSE/MMX instrincis is needed?

[Bug bootstrap/58521] New: [4.9 Regression] bootstrap failure

Assignee: unassigned at gcc dot gnu.org Reporter: hjl.tools at gmail dot com CC: rguenth at gcc dot gnu.org On Linux/i686, r202865 caused: /export/project/git/gcc-regression/gcc/gcc/ira-color.c: In function ‘void ira_color()’: /export/project/git/gcc-regression/gcc

[Bug testsuite/50085] [4.7 Regression] FAIL: g++.dg/opt/life1.C scan-assembler GLOBAL_OFFSET_TABLE on x86_64-apple-darwin10

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50085 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|

[Bug fortran/50094] New: [4.7 Regression] FAIL: gfortran.dg/coarray_6.f90

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50094 Bug #: 50094 Summary: [4.7 Regression] FAIL: gfortran.dg/coarray_6.f90 Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal P

[Bug rtl-optimization/50088] movzbl is generated instead of movl

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50088 --- Comment #10 from H.J. Lu 2011-08-16 14:23:39 UTC --- The real problem is the store forward issue on Atom: addl$1, 4(%esp) # 67*addsi_1/2 [length = 5] andl$15, 4(%esp)# 68*andsi_1/1 [length =

[Bug rtl-optimization/50088] movzbl is generated instead of movl

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50088 --- Comment #11 from H.J. Lu 2011-08-16 14:45:27 UTC --- Can we model shift instructions to take any QI/HI/SI/DI register as shift count and make IRA to match the size when reading/writing shift count?

[Bug rtl-optimization/50088] movzbl is generated instead of movl

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50088 H.J. Lu changed: What|Removed |Added Attachment #25019|0 |1 is obsolete|

[Bug rtl-optimization/50088] movzbl is generated instead of movl

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50088 --- Comment #14 from H.J. Lu 2011-08-17 13:37:39 UTC --- (In reply to comment #13) > (In reply to comment #12) > > Created attachment 25025 [details] > > A patch to use the same mode for shift count > > > > This is an untested patch to use the s

[Bug rtl-optimization/50088] movzbl is generated instead of movl

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50088 --- Comment #16 from H.J. Lu 2011-08-17 14:37:35 UTC --- The testcase has ... int n8 = (arr[7] * 9 + 8) & 15; for (i = 0; i < len; i+=8) { n1 = (n1 + 1) & 15; s += arr[i] << n1; The shift count is 32bit, which causes 32bit

[Bug rtl-optimization/50107] [IRA, i386] allocates regiters in very non-optimal way

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50107 --- Comment #3 from H.J. Lu 2011-08-17 18:43:41 UTC --- (In reply to comment #2) > I guess something wrong with hard register preferencing for multi-register > pseudos in ira-color.c::ira_assign. I believe it works fine for one-register > pseudo

[Bug rtl-optimization/50107] [IRA, i386] allocates regiters in very non-optimal way

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50107 --- Comment #4 from H.J. Lu 2011-08-17 19:16:40 UTC --- Created attachment 25038 --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=25038 A patch This patch generates: movq%rdi, %rdx mulx%rsi, %r10, %r9 addq$3, %r9

[Bug rtl-optimization/50107] [IRA, i386] allocates regiters in very non-optimal way

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50107 --- Comment #5 from H.J. Lu 2011-08-17 19:22:51 UTC --- (In reply to comment #2) > I guess something wrong with hard register preferencing for multi-register > pseudos in ira-color.c::ira_assign. I believe it works fine for one-register > pseudo

[Bug rtl-optimization/50088] movzbl is generated instead of movl

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50088 H.J. Lu changed: What|Removed |Added Attachment #25025|0 |1 is obsolete|

[Bug rtl-optimization/50088] movzbl is generated instead of movl

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50088 H.J. Lu changed: What|Removed |Added Attachment #25040|0 |1 is obsolete|

[Bug rtl-optimization/50088] movzbl is generated instead of movl

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50088 H.J. Lu changed: What|Removed |Added Attachment #25042|0 |1 is obsolete|

[Bug rtl-optimization/50107] [IRA, i386] allocates regiters in very non-optimal way

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50107 --- Comment #7 from H.J. Lu 2011-08-18 14:44:03 UTC --- Another problem is [hjl@gnu-6 pr50107]$ cat udi.i extern unsigned long long k2; unsigned long long test_mul_64 (unsigned long a, unsigned long b) { k2 = (unsigned long long) a * b; k2

[Bug rtl-optimization/50107] [IRA, i386] allocates regiters in very non-optimal way

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50107 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug rtl-optimization/50107] [IRA, i386] allocates regiters in very non-optimal way

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50107 --- Comment #11 from H.J. Lu 2011-08-18 18:31:37 UTC --- (In reply to comment #10) > > movq%rdi, %rdx > > mulx%rsi, %rax, %rsi > > movq%rsi, %rdx > > ret > > .cfi_endproc > > .LFE0: > > .sizetest_mul_64, .-

[Bug middle-end/49721] convert_memory_address_addr_space may generate invalid new insns

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49721 --- Comment #25 from H.J. Lu 2011-08-18 21:56:43 UTC --- Another testcase: [hjl@gnu-6 pr49721]$ cat foo.f PARAMETER( LM=7 ) PARAMETER( NM=2+2**LM, NV=NM**3 ) PARAMETER( NR = (8*(NM**3+NM**2+5*NM-23+7*LM))/7 ) COMMON /X/ U,

[Bug rtl-optimization/50107] [IRA, i386] allocates registers in very non-optimal way

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50107 --- Comment #12 from H.J. Lu 2011-08-19 01:12:56 UTC --- I changed MULX to (define_insn "bmi2_umul3_1" [(set (match_operand: 0 "register_operand" "=r") (mult: (zero_extend: (match_operand:DWIH 1 "register_operand

[Bug target/48338] [4.7 Regression] Glibc miscompiled

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48338 --- Comment #8 from H.J. Lu 2011-08-19 14:34:33 UTC --- This may be a glibc bug: http://sourceware.org/ml/libc-alpha/2011-08/msg00063.html

[Bug bootstrap/50128] New: [4.7 Regression] bootstrap failure

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50128 Bug #: 50128 Summary: [4.7 Regression] bootstrap failure Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3

[Bug rtl-optimization/50107] [IRA, i386] allocates registers in very non-optimal way

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50107 --- Comment #13 from H.J. Lu 2011-08-19 16:05:58 UTC --- We start with (insn 11 4 16 2 (set (reg:TI 65) (mult:TI (zero_extend:TI (reg/v:DI 64 [ b ])) (zero_extend:TI (reg/v:DI 63 [ a ] uti-2.i:3 339 {bmi2_umulditi3_1}

[Bug bootstrap/50128] [4.7 Regression] bootstrap failure

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50128 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|

[Bug target/50131] New: Optimize x = -1 with "or" for -O

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50131 Bug #: 50131 Summary: Optimize x = -1 with "or" for -O Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3

[Bug target/50131] Optimize x = -1 with "or" for -O

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50131 --- Comment #1 from H.J. Lu 2011-08-19 20:58:00 UTC --- There are 1273 "movl $0x," and 924 "movq 0x," in cc1plus. This change can reduce cc1plus size by 6242 bytes.

[Bug c++/50134] New: -Wmissing-prototypes doesn't work for C++

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50134 Bug #: 50134 Summary: -Wmissing-prototypes doesn't work for C++ Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority

[Bug target/50131] Optimize x = -1 with "or" for -O

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50131 --- Comment #3 from H.J. Lu 2011-08-20 19:44:49 UTC --- (In reply to comment #2) > Is or $-1, reg on all CPUs equally expensive to mov $-1, reg though (as or > generally needs the previous reg content while mov does not; I know some CPUs > specia

[Bug other/46770] Replace .ctors/.dtors with .init_array/.fini_array on targets supporting them

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46770 H.J. Lu changed: What|Removed |Added Status|ASSIGNED|RESOLVED Component|target

[Bug target/50155] [4.7 Regression] AVX2 support broke -mavx

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50155 H.J. Lu changed: What|Removed |Added AssignedTo|unassigned at gcc dot |kirill.yukhin at intel dot |g

[Bug target/50131] Optimize x = -1 with "or" for -O

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50131 H.J. Lu changed: What|Removed |Added CC||sergos.gnu at gmail dot com --- Comment #5 from

[Bug testsuite/50170] New: [4.7 Regression] FAIL: gcc.target/i386/sse-22a.c

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50170 Bug #: 50170 Summary: [4.7 Regression] FAIL: gcc.target/i386/sse-22a.c Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal P

[Bug target/50172] New: AVX2 test failures for x32

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50172 Bug #: 50172 Summary: AVX2 test failures for x32 Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3 C

[Bug target/50172] AVX2 test failures for x32

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50172 --- Comment #1 from H.J. Lu 2011-08-24 03:13:09 UTC --- I got spawn -ignore SIGHUP /export/gnu/import/svn/gcc-test-x32/bld/gcc/xgcc -B/export/gnu/import/svn/gcc-test-x32/bld/gcc/ /export/gnu/import/svn/gcc-test-x32/src-trunk/gcc/testsuite/gcc.ta

[Bug target/50172] AVX2 test failures for x32

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50172 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|

[Bug target/50176] [4.6/4.7 Regression] 4.7 generates spill-fill dealing with char->int conversion

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50176 H.J. Lu changed: What|Removed |Added Target Milestone|--- |4.7.0

[Bug target/50164] [IRA, 4.7 Regression] Performance degradation due to increased memory instructions count

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50164 H.J. Lu changed: What|Removed |Added Target Milestone|--- |4.7.0

[Bug target/50176] [4.6/4.7 Regression] 4.7 generates spill-fill dealing with char->int conversion

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50176 --- Comment #1 from H.J. Lu 2011-08-24 18:09:44 UTC --- Is this only a 4.7 regression?

[Bug target/50176] [4.7 Regression] 4.7 generates spill-fill dealing with char->int conversion

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50176 --- Comment #3 from H.J. Lu 2011-08-25 13:56:52 UTC --- (In reply to comment #2) > For gcc with > Target: x86_64-unknown-linux-gnu > Configured with: ../configure --disable-bootstrap --enable-languages=c,c++ > --prefix=/export/users/izamyati/gcc

[Bug target/50164] [IRA, 4.7 Regression] Performance degradation due to increased memory instructions count

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50164 --- Comment #3 from H.J. Lu 2011-08-25 13:58:28 UTC --- (In reply to comment #2) > (In reply to comment #1) > > Yesterday I sent a patch > > http://gcc.gnu.org/ml/gcc-patches/2011-08/msg01954.html which most probably > > solved the problem. > >

[Bug rtl-optimization/48575] RTL vector patterns are limited to 26 elements

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48575 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|

[Bug tree-optimization/46009] ?: vectorized, very similar if is not

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46009 H.J. Lu changed: What|Removed |Added Status|ASSIGNED|RESOLVED Resolution|

[Bug target/50182] Performance degradation from gcc 4.1 (x86_64)

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50182 --- Comment #7 from H.J. Lu 2011-08-25 15:58:08 UTC --- (In reply to comment #6) > > The processor is Intel quad core something: > > processor: 0 > vendor_id: GenuineIntel > cpu family: 6 > model: 15 > model name: Genuine

[Bug tree-optimization/50188] Optimizer doesn't take into account, that longjmp could lead to loops, which causes illegal code transformations.

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50188 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug testsuite/50185] [4.7 Regression] Bad AVX2 tests

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50185 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/50164] [IRA, 4.7 Regression] Performance degradation due to increased memory instructions count

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50164 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |WAITING Last reconfirmed|

[Bug target/50176] [4.7 Regression] 4.7 generates spill-fill dealing with char->int conversion

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50176 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |WAITING Last reconfirmed|

[Bug target/50214] New: strmov/strset should use :P

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50214 Bug #: 50214 Summary: strmov/strset should use :P Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3

[Bug middle-end/50215] New: [4.7 Regression] FAIL: gcc.dg/guality/pr45882.c

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50215 Bug #: 50215 Summary: [4.7 Regression] FAIL: gcc.dg/guality/pr45882.c Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Pr

[Bug target/50176] [4.7 Regression] 4.7 generates spill-fill dealing with char->int conversion

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50176 H.J. Lu changed: What|Removed |Added Status|WAITING |NEW CC|

[Bug bootstrap/50237] [4.7 regression] comparison failure caused by HAVE_INITFINI_ARRAY check

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50237 H.J. Lu changed: What|Removed |Added CC|hjl at gcc dot gnu.org |hjl.tools at gmail dot com --- Comment #1 from

[Bug bootstrap/50237] [4.7 regression] comparison failure caused by HAVE_INITFINI_ARRAY check

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50237 --- Comment #3 from H.J. Lu 2011-08-30 13:57:46 UTC --- (In reply to comment #2) > > HAVE_INITFINI_ARRAY is supposed to check the binutils/glibc feature, > > independent of compiler. > > AFAICS it doesn't, it compiles everything with the host co

[Bug bootstrap/50237] [4.7 regression] comparison failure caused by HAVE_INITFINI_ARRAY check

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50237 --- Comment #5 from H.J. Lu 2011-08-30 14:23:05 UTC --- (In reply to comment #4) > Only stage2/3 binutils need to be the same and those are relevant for > feature tests. How does stage 2 binutils fail the test?

[Bug bootstrap/50237] [4.7 regression] comparison failure caused by HAVE_INITFINI_ARRAY check

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50237 --- Comment #8 from H.J. Lu 2011-08-30 15:55:51 UTC --- The main issue is mixing input .ctors sections with .init_array sections to generate the single output .init_array section. Not all linkers support it even if they support .init_array secti

[Bug bootstrap/50237] [4.7 regression] comparison failure caused by HAVE_INITFINI_ARRAY check

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50237 --- Comment #9 from H.J. Lu 2011-08-30 15:56:45 UTC --- In the meantime, you can use --enable-initfini-array/--disable-initfini-array to work around this.

[Bug testsuite/50240] New: [4.7 Regression] ERROR: (DejaGnu) proc "^s" does not exist

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50240 Bug #: 50240 Summary: [4.7 Regression] ERROR: (DejaGnu) proc "^s" does not exist Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED

[Bug testsuite/50240] [4.7 Regression] ERROR: (DejaGnu) proc "^s" does not exist

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50240 H.J. Lu changed: What|Removed |Added CC||tocarip.intel at gmail dot |

[Bug bootstrap/50237] [4.7 regression] comparison failure caused by HAVE_INITFINI_ARRAY check

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50237 --- Comment #11 from H.J. Lu 2011-08-31 04:21:53 UTC --- (In reply to comment #10) > On Tue, 30 Aug 2011, hjl.tools at gmail dot com wrote: > > > The main issue is mixing input .ctors sections with .init_array sections > &g

[Bug middle-end/50251] New: [4.7 Regression] Revision 178353 caused many test failures

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50251 Bug #: 50251 Summary: [4.7 Regression] Revision 178353 caused many test failures Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED

[Bug bootstrap/50237] [4.7 regression] comparison failure caused by HAVE_INITFINI_ARRAY check

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50237 --- Comment #13 from H.J. Lu 2011-08-31 15:44:02 UTC --- (In reply to comment #12) > > Arrange for the contents to have appropriate text values you can check for > with grep (or if you wish a custom C program to run on the build system to > ex

[Bug middle-end/50251] [4.7 Regression] Revision 178353 caused many test failures

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50251 H.J. Lu changed: What|Removed |Added CC||areg.melikadamyan at gmail |

[Bug middle-end/50251] [4.7 Regression] Revision 178353 caused many test failures

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50251 --- Comment #8 from H.J. Lu 2011-09-01 19:32:54 UTC --- alloca is special with stack alignment. We may need to take the new change into account.

[Bug fortran/50278] New: [4.7 Regression] SPEC CPU 2000 failed to build

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50278 Bug #: 50278 Summary: [4.7 Regression] SPEC CPU 2000 failed to build Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Pri

[Bug fortran/50278] [4.7 Regression] SPEC CPU 2000 failed to build

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50278 --- Comment #1 from H.J. Lu 2011-09-02 17:27:43 UTC --- [hjl@gnu-35 delta-fortran]$ cat x.f INTEGER FUNCTION ILAENV( ISPEC, NAME, OPTS, N1, N2, N3, $ N4 ) LOGICALCNAME, SNAME CHARACTER*1

[Bug bootstrap/50237] [4.7 regression] comparison failure caused by HAVE_INITFINI_ARRAY check

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50237 --- Comment #15 from H.J. Lu 2011-09-02 18:09:41 UTC --- (In reply to comment #14) > > > > .init_array section is an array of pointers. How do you grep it? > > You arrange for the pointers to be assigned values whose bytes happen to > correspo

[Bug bootstrap/50237] [4.7 regression] bootstrap comparison failure for libcpp/lex.o

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50237 H.J. Lu changed: What|Removed |Added URL||http://gcc.gnu.org/ml/gcc-p |

[Bug fortran/50288] New: FAIL: gfortran.dg/class_45b.f03

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50288 Bug #: 50288 Summary: FAIL: gfortran.dg/class_45b.f03 Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3

[Bug fortran/50278] [4.7 Regression] SPEC CPU 2000 failed to build

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50278 H.J. Lu changed: What|Removed |Added Status|UNCONFIRMED |RESOLVED Resolution|

[Bug c++/50296] New: [4.7 Regression] New C++ test failures

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50296 Bug #: 50296 Summary: [4.7 Regression] New C++ test failures Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P

[Bug c++/50296] [4.7 Regression] New C++ test failures

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50296 H.J. Lu changed: What|Removed |Added Target Milestone|--- |4.7.0 --- Comment #1 from H.J. Lu 2011-09-05 1

[Bug middle-end/50301] New: [4.7 Regression] 416.gamess in SPEC CPU 2006 failed to build with LTO

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50301 Bug #: 50301 Summary: [4.7 Regression] 416.gamess in SPEC CPU 2006 failed to build with LTO Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRM

[Bug middle-end/50301] [4.7 Regression] 416.gamess in SPEC CPU 2006 failed to build with LTO

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50301 H.J. Lu changed: What|Removed |Added CC||jamborm at gcc dot gnu.org Target Milestone|-

[Bug c/50332] New: [4.7 Regression] FAIL: gcc.dg/attr-invalid.c

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50332 Bug #: 50332 Summary: [4.7 Regression] FAIL: gcc.dg/attr-invalid.c Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Prior

[Bug middle-end/50343] New: [4.7 Regression] FAIL: gfortran.dg/graphite/id-22.f

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50343 Bug #: 50343 Summary: [4.7 Regression] FAIL: gfortran.dg/graphite/id-22.f Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal

[Bug middle-end/50343] [4.7 Regression] FAIL: gfortran.dg/graphite/id-22.f

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50343 H.J. Lu changed: What|Removed |Added CC||rguenth at gcc dot gnu.org Target Milestone|-

[Bug middle-end/50343] [4.7 Regression] FAIL: gfortran.dg/graphite/id-22.f

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50343 --- Comment #2 from H.J. Lu 2011-09-09 14:53:28 UTC --- spawn -ignore SIGHUP /export/gnu/import/svn/gcc-test-intel64corei7/bld/gcc/testsuite/gfortran/../../gfortran -B/export/gnu/import/svn/gcc-test-intel64corei7/bld/gcc/testsuite/gfortran/../../

[Bug middle-end/50343] [4.7 Regression] FAIL: gfortran.dg/graphite/id-22.f

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50343 --- Comment #3 from H.J. Lu 2011-09-09 22:05:16 UTC --- The same error on 252.eon in SPEC CPU 2K: g++ -c -o ggPlane.o -DSPEC_CPU2000_LP64 -DHAS_ERRLIST-I. -DNDEBUG -O3 -funroll-loops -ffast-math -fwhole-program -flto=jobserver -fuse-li

[Bug middle-end/50343] [4.7 Regression] FAIL: gfortran.dg/graphite/id-22.f

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50343 --- Comment #4 from H.J. Lu 2011-09-09 22:40:46 UTC --- It is caused by revision 178728: http://gcc.gnu.org/ml/gcc-cvs/2011-09/msg00343.html

[Bug bootstrap/50237] [4.7 regression] bootstrap comparison failure for libcpp/lex.o

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50237 H.J. Lu changed: What|Removed |Added URL|http://gcc.gnu.org/ml/gcc-p |http://gcc.gnu.org/ml/gcc-p |

[Bug middle-end/50343] [4.7 Regression] FAIL: gfortran.dg/graphite/id-22.f

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50343 --- Comment #6 from H.J. Lu 2011-09-10 17:29:45 UTC --- With SPEC CPU 2006, I got 456.hmmer: histogram.c: In function 'Lawless416': histogram.c:1028:1: internal compiler error: tree check: expected ssa_name, have real_cst in vect_recog_dot_prod

[Bug target/50369] New: Support 256bit vector permutation

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50369 Bug #: 50369 Summary: Support 256bit vector permutation Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3

[Bug tree-optimization/50413] [4.6/4.7 Regression] Incorrect instruction is used to shift value of 128 bit xmm0 registrer

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50413 --- Comment #9 from H.J. Lu 2011-09-19 14:09:08 UTC --- On Linux/x86, I got FAIL: g++.dg/vect/slp-pr50413.cc scan-tree-dump-times slp "basic block vectorized using SLP" 0

[Bug tree-optimization/50413] [4.6/4.7 Regression] Incorrect instruction is used to shift value of 128 bit xmm0 registrer

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50413 H.J. Lu changed: What|Removed |Added CC||hjl.tools at gmail dot com --- Comment #10

[Bug middle-end/50460] New: [4.7 Regression] __builtin___strcpy_chk/__builtin_object_size don't work

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50460 Bug #: 50460 Summary: [4.7 Regression] __builtin___strcpy_chk/__builtin_object_size don't work Classification: Unclassified Product: gcc Version: 4.7.0

[Bug middle-end/50460] [4.7 Regression] __builtin___strcpy_chk/__builtin_object_size don't work

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50460 H.J. Lu changed: What|Removed |Added CC||rguenth at gcc dot gnu.org --- Comment #2 from

[Bug fortran/50469] New: [4.7 Regression] FAIL: gfortran.dg/storage_size_2.f08

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50469 Bug #: 50469 Summary: [4.7 Regression] FAIL: gfortran.dg/storage_size_2.f08 Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal

[Bug libfortran/50487] New: FAIL: gfortran.dg/bessel_6.f90

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50487 Bug #: 50487 Summary: FAIL: gfortran.dg/bessel_6.f90 Classification: Unclassified Product: gcc Version: 4.7.0 Status: UNCONFIRMED Severity: normal Priority: P3

[Bug testsuite/50487] FAIL: gfortran.dg/bessel_6.f90

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50487 H.J. Lu changed: What|Removed |Added Component|libfortran |testsuite Target Milestone|---

[Bug testsuite/50487] FAIL: gfortran.dg/bessel_6.f90

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50487 --- Comment #4 from H.J. Lu 2011-09-22 18:22:25 UTC --- (In reply to comment #3) > > > > It works for me. Can you check it in? > > > > Sure, do you want me to apply it to 4.5 and 4.6 as well. Yes, please.

[Bug testsuite/50485] gcc.target/i386/sse4_1-blendps.c fails spuriously on i686

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50485 --- Comment #3 from H.J. Lu 2011-09-22 20:47:01 UTC --- (In reply to comment #0) > > The assignment is translated as a push/pop on the float stack: > ... ... > > So after the push/pop tmp[1] contains a quiet Nan, while the corresponding > par

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