https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117191
Georg-Johann Lay changed:
What|Removed |Added
CC||gjl at gcc dot gnu.org
--- Comment #
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117189
Georg-Johann Lay changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113934
Bug 113934 depends on bug 117189, which changed state.
Bug 117189 Summary: [avr][lra] DSE removing instruction that is not dead
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117189
What|Removed |Added
--
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117189
Bug ID: 117189
Summary: [avr] DSE removing instruction that is not dead
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116550
--- Comment #26 from Georg-Johann Lay ---
(In reply to denisc from comment #24)
> Johann do you think that it is better to open a new bug for lra-pr116550-2.c ?
Filed as PR117189.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117189
--- Comment #1 from Georg-Johann Lay ---
For example, run the following command in $builddir/gcc (using AVRtest):
$ make -k check-gcc RUNTESTFLAGS="--target_board=atmega128-sim
--tool_opts='-mlra' avr-torture.exp=pr117189.c"
[...]
Target is avr
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117500
Georg-Johann Lay changed:
What|Removed |Added
Keywords||ice-on-invalid-code
Targ
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117726
Georg-Johann Lay changed:
What|Removed |Added
Target Milestone|--- |15.0
Status|UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117681
Georg-Johann Lay changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Target Milestone|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117699
Georg-Johann Lay changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84211
Georg-Johann Lay changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Target Milestone|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56183
Bug 56183 depends on bug 116781, which changed state.
Bug 116781 Summary: [lra][avr] internal compiler error: in
cselib_invalidate_regno, at cselib.cc:2545
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116781
What|Removed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116781
Georg-Johann Lay changed:
What|Removed |Added
Status|NEW |RESOLVED
Target Milestone|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113934
Bug 113934 depends on bug 116781, which changed state.
Bug 116781 Summary: [lra][avr] internal compiler error: in
cselib_invalidate_regno, at cselib.cc:2545
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116781
What|Removed
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66511
Georg-Johann Lay changed:
What|Removed |Added
Resolution|--- |FIXED
Target Milestone|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=49807
Georg-Johann Lay changed:
What|Removed |Added
See Also||https://gcc.gnu.org/bugzill
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=60145
Georg-Johann Lay changed:
What|Removed |Added
See Also||https://gcc.gnu.org/bugzill
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=54378
Georg-Johann Lay changed:
What|Removed |Added
Target Milestone|--- |15.0
Status|NEW
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117681
Bug ID: 117681
Summary: [build] libgcc/unwind-sjlj.c:195:12: warning: cast
from pointer to integer of different size
[-Wpointer-to-int-cast]
Product: gcc
Version
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117699
--- Comment #4 from Georg-Johann Lay ---
(In reply to Andrew Pinski from comment #2)
> I think the problem is in peep2_find_free_register:
> /* Don't use registers set or clobbered by the insn. */
> FOR_EACH_INSN_DEF (def, peep2_ins
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117699
Bug ID: 117699
Summary: Scratch from peephole2 overlaps operands
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl-opt
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117659
Bug ID: 117659
Summary: [avr] Wrong code for u24 << 16
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117659
Georg-Johann Lay changed:
What|Removed |Added
Target Milestone|--- |14.3
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117500
Bug ID: 117500
Summary: [avr] Don't ICE on invalid inline asm operand
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: ta
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117500
Georg-Johann Lay changed:
What|Removed |Added
Target Milestone|--- |14.3
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116488
--- Comment #11 from Georg-Johann Lay ---
gcc.dg/torture/pr116488.c fails on avr.
/* { dg-do run } */
/* { dg-additional-options "-fno-forward-propagate" } */
int a, b;
signed char c, e;
unsigned char d;
__attribute__ ((noinline,noclone,noipa))
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117611
Bug ID: 117611
Summary: internal compiler error: in as_a, at machmode.h:381
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Compone
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116781
--- Comment #2 from Georg-Johann Lay ---
Created attachment 59602
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=59602&action=edit
pr116781-gjl.diff
(In reply to Denis Chertykov from comment #1)
> Probably we have a wring definition of "*
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117868
Bug ID: 117868
Summary: [avr][lra] Wrong code with -mlra in simd-1.c
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rtl
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117910
Bug ID: 117910
Summary: [avr][lra] Wrong code with -mlra in cmpdi-1.c
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: rt
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117910
--- Comment #1 from Georg-Johann Lay ---
(In reply to Georg-Johann Lay from comment #0)
> ...involving Y+12 and X+12 in cmpdi-1.s
Meant "Y+12 and Y+11".
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64242
Georg-Johann Lay changed:
What|Removed |Added
Keywords||wrong-code
Last reconfirmed|2018-11
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117914
Bug ID: 117914
Summary: [reload][avr] In function '__objc_add_class_to_hash
class-i.c:2162:1: error: insn does not satisfy its
constraints:
Product: gcc
Version:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=49807
Georg-Johann Lay changed:
What|Removed |Added
Target|avr, mips*-*-* |mips*-*-*
--- Comment #9 from Georg-J
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107957
Georg-Johann Lay changed:
What|Removed |Added
Resolution|--- |FIXED
Status|UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112268
Georg-Johann Lay changed:
What|Removed |Added
Target Milestone|--- |15.0
Depends on|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85719
--- Comment #1 from Georg-Johann Lay ---
IMO the documentation on "io", "io_low" and "address" has improved. Maybe it
is clearer now? There's also an example what code will be generated for
attribute "address".
https://gcc.gnu.org/onlinedocs/g
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114111
--- Comment #3 from Georg-Johann Lay ---
The avr backend has some combiner patterns to mitigate the bloated code,
however since recently, some pass is popping up subregs like in:
(insn 10 9 15 2 (set (reg:HI 48 [ _5 ])
(plus:HI (reg/v:H
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117933
Bug ID: 117933
Summary: [lra][avr] Increased code size / stack usage with
-mlra
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Prior
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117961
Bug ID: 117961
Summary: testsuite: scan-assembler[-not] is bogus for inline
asm
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Prior
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118334
Bug ID: 118334
Summary: Missing internals documentation for: INT_N,
FRACTIONAL_INT_MODE, PARTIAL_INT_MODE
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severi
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118334
--- Comment #1 from Georg-Johann Lay ---
Some explanations can be found in machmode.def
https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/machmode.def#l64
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118334
--- Comment #2 from Georg-Johann Lay ---
INT_MODE (MODE, BYTESIZE);
declares MODE to be of class INT and BYTESIZE bytes wide.
All of the bits of its representation are significant.
FRACTIONAL_INT_MODE (MODE, PRECISION,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118329
--- Comment #2 from Georg-Johann Lay ---
(In reply to Jonathan Wakely from comment #0)
> config/avr/avr-modes.def doesn't have the INT_N (PSI, 24); line after
> FRACTIONAL_INT_MODE line so, from middle-end POV, it is as
> if __int24 doesn't exis
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118329
--- Comment #4 from Georg-Johann Lay ---
avr-modes.def is the only backend that's using FRACTIONAL_INT_MODE. So will
INT_N replace it? Augment it?
And as far as I understand, INT_N defines __intN. What about avr.cc's built-in
types __int24 an
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118329
--- Comment #6 from Georg-Johann Lay ---
Currently there is:
static void
avr_init_builtin_int24 (void)
{
tree int24_type = make_signed_type (GET_MODE_BITSIZE (PSImode));
tree uint24_type = make_unsigned_type (GET_MODE_BITSIZE (PSImode));
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100530
--- Comment #20 from Georg-Johann Lay ---
So can this be closed as fixed (in v15+) ?
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118769
Bug ID: 118769
Summary: Provide better location information for diagnostics
with -Wattributes
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118768
Bug ID: 118768
Summary: [avr] Make genmultilib.awk more robust against white
spaces
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
P
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118768
Georg-Johann Lay changed:
What|Removed |Added
Blocks||118764
Target|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118806
--- Comment #3 from Georg-Johann Lay ---
...or let me state is this way:
This PR implements an optimization that is activated by some option
(-mno-call-main). What's unusual is that it is activated by the no- version of
the option, and -mcall-
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118806
Bug ID: 118806
Summary: [avr] Optimize running main (-mo-call-main)
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: enhancement
Priority: P3
Component:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118806
Georg-Johann Lay changed:
What|Removed |Added
Keywords||missed-optimization
Targ
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118806
--- Comment #2 from Georg-Johann Lay ---
(In reply to Xi Ruoyao from comment #1)
> Maybe it can also be done if main is [[noreturn]]?
Not sure about that.
The proposed patch /sets/ [[noreturn]] provided the conditions are right, i.e.
-mno-call-
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118764
Bug 118764 depends on bug 118768, which changed state.
Bug 118768 Summary: [avr] Make genmultilib.awk more robust against white spaces
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118768
What|Removed |Added
---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118768
Georg-Johann Lay changed:
What|Removed |Added
Resolution|--- |FIXED
Status|UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118764
Georg-Johann Lay changed:
What|Removed |Added
Resolution|--- |FIXED
Status|UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118764
Bug ID: 118764
Summary: [avr] Add support for Compact Vector Table
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: targe
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118764
Georg-Johann Lay changed:
What|Removed |Added
Target||avr
Severity|normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118000
Bug ID: 118000
Summary: [avr] memcpy from __flash1 clobbers RAMPZ on EBI
devices
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Prio
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118001
Bug ID: 118001
Summary: [avr] Support __flashx as 24-bit named address space
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Compon
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118001
Georg-Johann Lay changed:
What|Removed |Added
Keywords||addr-space
Severity|normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117914
Georg-Johann Lay changed:
What|Removed |Added
See Also||https://gcc.gnu.org/bugzill
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117961
--- Comment #8 from Georg-Johann Lay ---
(In reply to ak from comment #7)
> i suppose scan-assembler could just ignore lines starting with #
I don't think that's the correct solution. Better ignore lines with
ASM_COMMENT_START, which may or ma
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117961
--- Comment #6 from Georg-Johann Lay ---
So how do you get the absolute path into the assembly?
Via .file there is the name of the test case, but as far as I can see, .file
doesn't show the whole absolute path to the test case.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117961
--- Comment #4 from Georg-Johann Lay ---
But the problem is not x86_64 specific. And it is ont specific to "mov".
The problem will occur on any platform with any scan-assembler[-not] string
provided:
1) The program is using inline assembly, an
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118012
--- Comment #1 from Georg-Johann Lay ---
(In reply to Georg-Johann Lay from comment #0)
> For comparison, here is the code when the test is for bit 1 instead of bit 0:
>
> if (b & 1)
^^
This should be "if (b & 2)"
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118012
--- Comment #4 from Georg-Johann Lay ---
It's even crazier when the device doesn't have MUL instruction. In that case,
a libgcc function is used. With -Os the call consumes less code than the
bit-extract + extend + neg + and, so a library call
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118012
--- Comment #6 from Georg-Johann Lay ---
(In reply to Andrew Pinski from comment #5)
> /* Expand X*Y as X&-Y when Y must be zero or one. */
> ...
> if (bit0_p || bit1_p)
> {
> bool speed = optimize_insn
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118012
Bug ID: 118012
Summary: [avr] Expensive code (bit extract + extend + neg +
and) instead of bit test
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: no
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118012
Georg-Johann Lay changed:
What|Removed |Added
CC||michael.collison at linaro dot
org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118001
Georg-Johann Lay changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118012
--- Comment #8 from Georg-Johann Lay ---
Isn't there a way to make match.md patterns conditional?
A -fno-tree-phiopt gives mixed results...
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118000
Georg-Johann Lay changed:
What|Removed |Added
Resolution|--- |FIXED
Status|UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118012
Georg-Johann Lay changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Component|middle-end
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118012
--- Comment #14 from Georg-Johann Lay ---
(In reply to Richard Biener from comment #13)
> On RTL we do target costing for if-conversion sequences, PHI-OPT doesn't
...and...
> For specific cases improving RTL expansion is also possible
Which doe
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118012
--- Comment #10 from Georg-Johann Lay ---
(In reply to Andrew Pinski from comment #9)
> Basically gimple should be almost all target indepdendent except in the late
> stages.
The problem is that some canonicalizations are very expensive on some
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118012
--- Comment #12 from Georg-Johann Lay ---
(In reply to Andrew Pinski from comment #9)
> match patterns should almost never be conditional unless
The pattern in question was introdiced as optimization, not as
canonicalization.
I don't think that
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117726
Bug ID: 117726
Summary: [avr] better optimize multi-byte shifts
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: target
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117744
--- Comment #1 from Georg-Johann Lay ---
Created attachment 59678
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=59678&action=edit
pr111683-1.c.338r.fold_mem_offsets
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117744
--- Comment #2 from Georg-Johann Lay ---
Created attachment 59679
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=59679&action=edit
pr111683-1.c.339r.cprop_hardreg
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117744
Georg-Johann Lay changed:
What|Removed |Added
Resolution|--- |FIXED
Status|UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117744
Georg-Johann Lay changed:
What|Removed |Added
Target Milestone|--- |15.0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117744
Bug ID: 117744
Summary: cprop_hardreg deleted an insns that's not dead
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: r
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117744
Georg-Johann Lay changed:
What|Removed |Added
See Also|https://gcc.gnu.org/bugzill |
|a/show_bug.cgi?i
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64242
--- Comment #47 from Georg-Johann Lay ---
On avr, fixed in v12.5, v13.4, and v14.3+.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58322
Georg-Johann Lay changed:
What|Removed |Added
Last reconfirmed|2013-09-30 00:00:00 |2024-12-5
--- Comment #2 from Georg-J
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118329
--- Comment #8 from Georg-Johann Lay ---
(In reply to Jonathan Wakely from comment #0)
> avr uses FRACTIONAL_INT_MODE while e.g. msp430 uses PARTIAL_INT_MODE,
> don't remember the difference
The comments in machmode.def propose that PARTIAL_INT_
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118361
Bug ID: 118361
Summary: [meta-bug] Expensive arithmetic instead of a simple
bit test
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118360
Bug ID: 118360
Summary: [avr] Expensive shift instead of bit test
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: middle
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118361
Georg-Johann Lay changed:
What|Removed |Added
Ever confirmed|0 |1
Status|UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118360
Georg-Johann Lay changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Ever confirmed|0
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118329
--- Comment #9 from Georg-Johann Lay ---
Withe these changes and INT_N (PSI, 24), I am getting errors like
error: ISO C does not support '__int24' types [-Wpedantic]
__int24 and __uint24 were introduced in v4.8 and would work for older revisio
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113934
Bug 113934 depends on bug 117910, which changed state.
Bug 117910 Summary: [avr][lra] Wrong code with -mlra in cmpdi-1.c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117910
What|Removed |Added
-
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117910
Georg-Johann Lay changed:
What|Removed |Added
Status|UNCONFIRMED |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117868
--- Comment #5 from Georg-Johann Lay ---
*** Bug 117910 has been marked as a duplicate of this bug. ***
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=56183
Bug 56183 depends on bug 117910, which changed state.
Bug 117910 Summary: [avr][lra] Wrong code with -mlra in cmpdi-1.c
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117910
What|Removed |Added
---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118554
Bug ID: 118554
Summary: Allow to specify the size of an inline asm
Product: gcc
Version: 15.0
Status: UNCONFIRMED
Severity: enhancement
Priority: P3
Component:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118556
--- Comment #1 from Georg-Johann Lay ---
For ordinary insns, it's enough to -dp to see code length (at least on a target
that implements insn attribute "length"). So -dp should suffice.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115817
--- Comment #5 from Georg-Johann Lay ---
(In reply to Dmytro Bagrii from comment #4)
> gcc is smart enough not to initialize R1 when it is not used.
Actually not. The decision whether __zero_reg__ is required in an ISR is
worked out by the asse
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