Assignee: unassigned at gcc dot gnu.org
Reporter: david.feuer at gmail dot com
Target Milestone: ---
Atomic fetch and and/or/xor/etc., are not natively supported on amd64/x86_64,
so they're simulated with CAS loops. There's a special case when this is
unnecessary
Assignee: unassigned at gcc dot gnu.org
Reporter: david.feuer at gmail dot com
Target Milestone: ---
Atomic fetch and and/or/xor/etc., are not natively supported on amd64/x86_64,
so they're simulated with CAS loops. There's a special case when this is
unnecessary