[Bug target/116413] [LRA] [M68K] ICE: unrecognized insn in lra_set_insn_recog_data, at lra.cc:1036

2024-08-27 Thread schwab--- via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116413 Andreas Schwab changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug c++/95701] undefined enum conversion accepted in constant expression

2024-08-27 Thread carlosgalvezp at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95701 Carlos Galvez changed: What|Removed |Added CC||carlosgalvezp at gmail dot com --- Comme

[Bug c++/116506] New: [15 Regression] Destructors of temporary awaitables are executed too early

2024-08-27 Thread daklishch at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116506 Bug ID: 116506 Summary: [15 Regression] Destructors of temporary awaitables are executed too early Product: gcc Version: 15.0 Status: UNCONFIRMED Keywords: c++

[Bug tree-optimization/116500] gcc.dg/vect/vect-switch-ifcvt-1.c FAILs

2024-08-27 Thread andi-gcc at firstfloor dot org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116500 --- Comment #4 from Andi Kleen --- It seems sparc doesn't support comparisons in vectorization? /vol/gcc/src/hg/master/local/gcc/testsuite/gcc.dg/vect/vect-switch-ifcvt-1.c:13:7: missed: not vectorized: relevant stmt not supported: _13 = _1

[Bug tree-optimization/116500] gcc.dg/vect/vect-switch-ifcvt-1.c FAILs

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116500 --- Comment #5 from Andrew Pinski --- (In reply to Andi Kleen from comment #4) > It seems sparc doesn't support comparisons in vectorization? I think you want to check vect_condition for this. (like bb-slp-69.c )

[Bug testsuite/116500] gcc.dg/vect/vect-switch-ifcvt-1.c FAILs on sparc

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116500 Andrew Pinski changed: What|Removed |Added Component|tree-optimization |testsuite Last reconfirmed|

[Bug c++/109867] -Wswitch-default reports missing default in coroutine

2024-08-27 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109867 --- Comment #4 from GCC Commits --- The trunk branch has been updated by Arsen Arsenovic : https://gcc.gnu.org/g:ff0cba200af72f2514ebc987a99027f314d4cc99 commit r15-3234-gff0cba200af72f2514ebc987a99027f314d4cc99 Author: Arsen ArsenoviÄ Date:

[Bug target/114224] popcount RTL cost seems wrong with cssc

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114224 --- Comment #4 from Andrew Pinski --- Note after r15-2946-gfcc3af99498804, for: ``` int fc(unsigned char a) { return __builtin_popcountg(a) == 1; } ``` Without CSSC, GCC produces: ``` and w0, w0, 255 fmovd31, x0

[Bug testsuite/116500] gcc.dg/vect/vect-switch-ifcvt-1.c FAILs on sparc

2024-08-27 Thread andi at firstfloor dot org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116500 --- Comment #7 from andi at firstfloor dot org --- Thanks. Updated patch. This one seems obvious so I'll commit soon. diff --git a/gcc/testsuite/gcc.dg/vect/vect-switch-ifcvt-1.c b/gcc/testsuite/gcc.dg/vect/vect-switch-ifcvt-1.c index f5352ef8ed

[Bug target/114224] popcount RTL cost seems wrong with cssc

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114224 --- Comment #5 from Andrew Pinski --- (In reply to Andrew Pinski from comment #4) > Note after r15-2946-gfcc3af99498804, for: > ``` > int fc(unsigned char a) > { > return __builtin_popcountg(a) == 1; > } > ``` > > Without CSSC, GCC produces:

[Bug testsuite/116500] gcc.dg/vect/vect-switch-ifcvt-1.c FAILs on sparc

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116500 --- Comment #8 from Andrew Pinski --- (In reply to andi from comment #7) > Thanks. Updated patch. This one seems obvious so I'll commit soon. > > diff --git a/gcc/testsuite/gcc.dg/vect/vect-switch-ifcvt-1.c > b/gcc/testsuite/gcc.dg/vect/vect-sw

[Bug c++/115905] [coroutines] Wrong behavior of await_suspend()

2024-08-27 Thread ddvamp007 at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115905 --- Comment #2 from Artyom Kolpakov --- I apologize very much. Not having figured out who the actual developer of clang is, I took third persons opinions as the organization's opinion and used that to create the further discussion. As it was poi

[Bug testsuite/116500] gcc.dg/vect/vect-switch-ifcvt-1.c FAILs on sparc

2024-08-27 Thread ro at CeBiTec dot Uni-Bielefeld.DE via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116500 --- Comment #9 from ro at CeBiTec dot Uni-Bielefeld.DE --- > --- Comment #8 from Andrew Pinski --- > (In reply to andi from comment #7) >> Thanks. Updated patch. This one seems obvious so I'll commit soon. >> >> diff --git a/gcc/testsuite/gcc.

[Bug target/116507] New: [15 Regression] movhi_aarch64 should use fmov if FP16

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116507 Bug ID: 116507 Summary: [15 Regression] movhi_aarch64 should use fmov if FP16 Product: gcc Version: 15.0 Status: UNCONFIRMED Keywords: missed-optimization Severity: enha

[Bug target/116507] [15 Regression] movhi_aarch64 should use fmov if FP16

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116507 Andrew Pinski changed: What|Removed |Added Status|UNCONFIRMED |ASSIGNED Ever confirmed|0

[Bug middle-end/116508] New: [15 Regression] `popcount(short) == 1` or char no longer expands to using `(arg ^ (arg - 1)) > arg - 1` trick after r15-2946-gfcc3af99498804

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116508 Bug ID: 116508 Summary: [15 Regression] `popcount(short) == 1` or char no longer expands to using `(arg ^ (arg - 1)) > arg - 1` trick after r15-2946-gfcc3af99498804 Product

[Bug middle-end/116508] [15 Regression] `popcount(short) == 1` or char no longer expands to using `(arg ^ (arg - 1)) > arg - 1` trick after r15-2946-gfcc3af99498804

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116508 Andrew Pinski changed: What|Removed |Added Last reconfirmed||2024-08-27 Ever confirmed|0

[Bug target/114224] popcount RTL cost seems wrong with cssc

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114224 Andrew Pinski changed: What|Removed |Added See Also||https://gcc.gnu.org/bugzill

[Bug target/113939] Switch m68k to LRA

2024-08-27 Thread law at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113939 --- Comment #2 from Jeffrey A. Law --- Andreas, do you think the m68k port is ready to try bootstrapping with LRA enabled by default? It'd be relatively simple to flip it in my tester.

[Bug target/55212] [SH] Switch to LRA

2024-08-27 Thread glaubitz at physik dot fu-berlin.de via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=55212 --- Comment #205 from John Paul Adrian Glaubitz --- (In reply to John Paul Adrian Glaubitz from comment #204) > Yeah, I'm pretty sure that's because I disabled late combine as one of the > measures trying to mitigate the segfault. > > I am testi

[Bug testsuite/116500] gcc.dg/vect/vect-switch-ifcvt-1.c FAILs on sparc

2024-08-27 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116500 --- Comment #10 from GCC Commits --- The trunk branch has been updated by Andi Kleen : https://gcc.gnu.org/g:ffb00a0da44be946bcac45dd702e18555f564b2e commit r15-3236-gffb00a0da44be946bcac45dd702e18555f564b2e Author: Andi Kleen Date: Tue Aug

[Bug target/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute and arm_sve_vector_bits

2024-08-27 Thread sayhappy at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484 J Lee changed: What|Removed |Added CC||sayhappy at gmail dot com --- Comment #4 from J

[Bug target/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute and arm_sve_vector_bits

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484 --- Comment #5 from Andrew Pinski --- (In reply to J Lee from comment #4) > Is this error also related to the same 'const' issue? No that is unrelated to this attribute issue.

[Bug target/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute and arm_sve_vector_bits

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484 --- Comment #6 from Andrew Pinski --- (In reply to Andrew Pinski from comment #5) > (In reply to J Lee from comment #4) > > Is this error also related to the same 'const' issue? > > No that is unrelated to this attribute issue. Well the origin

[Bug target/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute and arm_sve_vector_bits

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484 --- Comment #7 from Andrew Pinski --- (In reply to Andrew Pinski from comment #6) > (In reply to Andrew Pinski from comment #5) > > (In reply to J Lee from comment #4) > > > Is this error also related to the same 'const' issue? > > > > No that

[Bug c++/85282] CWG 727 (full specialization in non-namespace scope)

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85282 Andrew Pinski changed: What|Removed |Added See Also||https://bugzilla.mozilla.or

[Bug rtl-optimization/114729] RISC-V SPEC2017 507.cactu excessive spillls with -fschedule-insns

2024-08-27 Thread vineetg at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114729 --- Comment #14 from Vineet Gupta --- Interim update: Per discussions [1] [2] with Richard Sandiford, some of the behavior is fundamental to the "model" heuristics of -fsched-pressure, specially for in-order cores which benefit from little more

[Bug rtl-optimization/114729] RISC-V SPEC2017 507.cactu excessive spillls with -fschedule-insns

2024-08-27 Thread vineetg at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114729 Vineet Gupta changed: What|Removed |Added CC||vineetg at gcc dot gnu.org --- Comment #

[Bug rtl-optimization/114729] RISC-V SPEC2017 507.cactu excessive spillls with -fschedule-insns

2024-08-27 Thread vineetg at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114729 --- Comment #16 from Vineet Gupta --- After ECC hack, the issue persists. Toggles (for cc1plus): -O2 -march=rv64gc_zfa -mabi=lp64d %sfp is the spill because -fno-schedule-insns | -fschedule-insns

[Bug testsuite/116271] [15 regression] gcc.dg/vect/tsvc/vect-tsvc-s176.c fails after r15-2777-g8fac69a2dbff98

2024-08-27 Thread cvs-commit at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116271 --- Comment #4 from GCC Commits --- The master branch has been updated by Joern Rennecke : https://gcc.gnu.org/g:beb94f5979953969593a2387561cdbc8fedfaeb1 commit r15-3240-gbeb94f5979953969593a2387561cdbc8fedfaeb1 Author: Joern Rennecke Date:

[Bug fortran/113412] ATAN(Y,X) does not check arguments and generates wrong error message.

2024-08-27 Thread kargls at comcast dot net via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113412 --- Comment #13 from kargls at comcast dot net --- On 8/27/24 12:25, anlauf at gcc dot gnu.org wrote: > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=113412 > > --- Comment #12 from anlauf at gcc dot gnu.org --- > (In reply to kargls from comment

[Bug libstdc++/116473] std::ranges::to vs constexpr

2024-08-27 Thread de34 at live dot cn via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116473 Jiang An changed: What|Removed |Added CC||de34 at live dot cn --- Comment #1 from Jian

[Bug ipa/116410] -ffat-lto-objects generates different and inefficient code compared with -fno-fat-lto-objects

2024-08-27 Thread yinyuefengyi at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116410 --- Comment #7 from Xionghu Luo (luoxhu at gcc dot gnu.org) --- (In reply to H.J. Lu from comment #5) > Created attachment 59016 [details] > A patch > > Please try this. Thanks, it works.

[Bug ada/116498] gnat enters busy wait trying to compile for msp430-none-elf with -mlarge flag

2024-08-27 Thread alancf0 at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116498 --- Comment #3 from Alan Fisher --- > It seems odd that neither Pmode nor ptr_mode is in the set of integer modes > though. This does seem odd... One would think PSI should sit between HI and SI as here: https://gcc.gnu.org/onlinedocs/gccint/M

[Bug target/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute and arm_sve_vector_bits

2024-08-27 Thread sayhappy at gmail dot com via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484 --- Comment #8 from J Lee --- I agree with you, Andrew. Now, GCC can't be used to build XSIMD at least RISC-V. I didn't expect getting such quick and helpful comments like this. Thanks sergesanspaille and Andrew ! :-)

[Bug target/114224] popcount RTL cost seems wrong with cssc

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114224 Andrew Pinski changed: What|Removed |Added URL||https://gcc.gnu.org/piperma

[Bug target/116507] [15 Regression] movhi_aarch64 should use fmov if FP16

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116507 --- Comment #1 from Andrew Pinski --- Hmm, the whole `*mov_aarch64` set of patterns are a mess and looks like they need some cleanup too.

[Bug middle-end/116508] [15 Regression] `popcount(short) == 1` or char no longer expands to using `(arg ^ (arg - 1)) > arg - 1` trick after r15-2946-gfcc3af99498804

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116508 --- Comment #2 from Andrew Pinski --- part of the problem here is the use of OPTAB_DIRECT when it should use OPTAB_WIDEN instead.

[Bug middle-end/116508] [15 Regression] `popcount(short) == 1` or char no longer expands to using `(arg ^ (arg - 1)) > arg - 1` trick after r15-2946-gfcc3af99498804

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116508 --- Comment #3 from Andrew Pinski --- (In reply to Andrew Pinski from comment #2) > part of the problem here is the use of OPTAB_DIRECT when it should use > OPTAB_WIDEN instead. That fixes short but for char looks like there is still some cost

[Bug middle-end/116508] [15 Regression] `popcount(short) == 1` or char no longer expands to using `(arg ^ (arg - 1)) > arg - 1` trick after r15-2946-gfcc3af99498804

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116508 --- Comment #4 from Andrew Pinski --- (In reply to Andrew Pinski from comment #3) > (In reply to Andrew Pinski from comment #2) > > part of the problem here is the use of OPTAB_DIRECT when it should use > > OPTAB_WIDEN instead. > > That fixes s

[Bug target/116509] New: 128bit integer compares can be improved

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116509 Bug ID: 116509 Summary: 128bit integer compares can be improved Product: gcc Version: 15.0 Status: UNCONFIRMED Keywords: missed-optimization Severity: enhancement

[Bug target/116509] 128bit integer compares can be improved

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116509 --- Comment #1 from Andrew Pinski --- Created attachment 59018 --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=59018&action=edit What LLVM produces This is what LLVM produces. GCC should be able to do similarly.

[Bug middle-end/116508] [15 Regression] `popcount(short) == 1` or char no longer expands to using `(arg ^ (arg - 1)) > arg - 1` trick after r15-2946-gfcc3af99498804

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116508 Andrew Pinski changed: What|Removed |Added See Also||https://gcc.gnu.org/bugzill

[Bug target/107533] Inefficient code sequence for fp16 testcase on aarch64

2024-08-27 Thread ramana at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107533 --- Comment #2 from Ramana Radhakrishnan --- yes the by-value parameters are a separate issue that I hope recent patches on the list (I remember something flying past) should help correct.

[Bug target/107533] Inefficient code sequence for fp16 testcase on aarch64

2024-08-27 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107533 --- Comment #3 from Andrew Pinski --- (In reply to Ramana Radhakrishnan from comment #2) > yes the by-value parameters are a separate issue that I hope recent patches > on the list (I remember something flying past) should help correct. The pat

<    1   2