[Bug rtl-optimization/24069] [4.1 Regression] ice during feedback stage of profiledbootstrap on powerpc

2005-09-28 Thread steinmtz at us dot ibm dot com
--- Additional Comments From steinmtz at us dot ibm dot com 2005-09-29 04:36 --- ./> gcc -v Using built-in specs. Target: powerpc64-linux Configured with: /home/steinmtz/work/src/mainline/gcc/configure -- prefix=/home/steinmtz/work/install/mainline --build=powerpc64-linux -- host=powerpc

[Bug target/24102] floatdisf2_internal2 broken

2005-09-28 Thread amodra at bigpond dot net dot au
-- What|Removed |Added CC|amodra at gcc dot gnu dot | |org | Target Milestone|4.0.2 |3.4.5 http

[Bug middle-end/17886] variable rotate and long long rotate should be better optimized

2005-09-28 Thread mmitchel at gcc dot gnu dot org
--- Additional Comments From mmitchel at gcc dot gnu dot org 2005-09-29 05:05 --- Here's the best I can think of for the first case, assuming that %ecx contains the rotate-left count, %eax contains the low order word, and %ebx contains the high-order word. mov %eax, %ebx cmp %ecx, $

[Bug rtl-optimization/20945] [4.0/4.1 Regresson] about 2x perfomance regression in comparision with 3.4.2

2005-09-28 Thread pinskia at gcc dot gnu dot org
-- What|Removed |Added GCC target triplet|i586-suse-linux |i586-*-*-* http://gcc.gnu.org/bugzilla/show_bug.cgi?id=20945

[Bug rtl-optimization/19780] Floating point computation far slower for -mfpmath=sse

2005-09-28 Thread pinskia at gcc dot gnu dot org
--- Additional Comments From pinskia at gcc dot gnu dot org 2005-09-29 04:06 --- Oh, and this looks very related to two operand instructions issue. PPC gives optimial code: L2: fmul f0,f6,f9 fmul f13,f7,f10 fmul f12,f8,f11 fmsub f29,f8,f10,f0 fmsub

[Bug rtl-optimization/19780] Floating point computation far slower for -mfpmath=sse

2005-09-28 Thread pinskia at gcc dot gnu dot org
--- Additional Comments From pinskia at gcc dot gnu dot org 2005-09-29 04:05 --- Confirmed. This is weird and this is an ra issue. I don't understand why the ra is spilling it to the stack as there are enough SSE registers to hold the 6 registers. -- What|Removed

[Bug tree-optimization/24059] [4.1 Regression] ICE expand_expr_real_1 with -ftree-vectorize -O2

2005-09-28 Thread uros at kss-loka dot si
--- Additional Comments From uros at kss-loka dot si 2005-09-29 06:22 --- Fixed by: http://gcc.gnu.org/ml/gcc-patches/2005-09/msg01284.html (I have added PR number to the ChangeLog entry) -- What|Removed |Added ---

[Bug bootstrap/21335] [meta-bug] bootstrap fails with -ftree-vectorize

2005-09-28 Thread uros at kss-loka dot si
-- Bug 21335 depends on bug 24059, which changed state. Bug 24059 Summary: [4.1 Regression] ICE expand_expr_real_1 with -ftree-vectorize -O2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=24059 What|Old Value |New Value ---

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