--- Comment #6 from ian at airs dot com 2005-11-01 18:46 ---
Created an attachment (id=10101)
--> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=10101&action=view)
.s file from gcc 3.4 -S -O2
I've attached the assembler code generated by gcc 3.4 with -S -O2. This code
is much better t
--- Comment #5 from ian at airs dot com 2005-11-01 18:06 ---
That means that you did get only one register, and that therefore the block was
simple enough for RTL if-conversion to operate.
So I'd still like to understand why we get two identical registers in the
original test case, whic
--- Comment #4 from pinskia at gcc dot gnu dot org 2005-11-01 16:17 ---
If we change (*p1)[d-1] to (*p1)[d], we get:
.L2:
movl 8(%edi), %eax
movswl (%eax),%edx
movl 4(%edi), %eax
movswl (%eax),%eax
subl %edx, %eax
movl %eax, %ecx
sarl $31, %ecx
xorl %ecx
--- Comment #3 from ian at airs dot com 2005-11-01 16:09 ---
You've managed to change the code so that we still have two registers, but now
they have different values. I agree that there are probably going to be times
when it is good to have two different registers. But when they alway
--- Comment #2 from pinskia at gcc dot gnu dot org 2005-11-01 14:54 ---
Actually it is "int*" and "int" and that mainly comes down to how we repesent
(int*)[d];
If we change the code (we should be able to do this in the IR also, Daniel
Berlin had a patch which did it):
extern int abs (in
--- Comment #1 from ian at airs dot com 2005-11-01 06:02 ---
Created an attachment (id=10095)
--> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=10095&action=view)
.s file from gcc -S -O2
For reference, here is the complete .s file I get from gcc -S -O2.
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