https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70155
--- Comment #7 from hjl at gcc dot gnu.org ---
Author: hjl
Date: Fri Apr 29 17:27:59 2016
New Revision: 235647
URL: https://gcc.gnu.org/viewcvs?rev=235647&root=gcc&view=rev
Log:
Update scan-assembler-not in PR target/70155 tests
Since PIC leads
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70155
H.J. Lu changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70155
--- Comment #5 from hjl at gcc dot gnu.org ---
Author: hjl
Date: Wed Apr 27 17:32:40 2016
New Revision: 235518
URL: https://gcc.gnu.org/viewcvs?rev=235518&root=gcc&view=rev
Log:
Extend STV pass to 64-bit mode
128-bit SSE load and store instruct
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70155
--- Comment #4 from Uroš Bizjak ---
(In reply to H.J. Lu from comment #3)
> We can extend STV pass to 64-bit mode to convert load and store of
> 128-bit ntegers to 128-bit SSE load and store, which is implemented
> on hjl/pr70155/master branch.
>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70155
H.J. Lu changed:
What|Removed |Added
Status|UNCONFIRMED |NEW
Last reconfirmed|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70155
--- Comment #2 from H.J. Lu ---
(In reply to Uroš Bizjak from comment #1)
> This can be tweaked in processor_cost table.
RA will use integer registers for TImode.
> However, is SSE move really faster? Cost tables doesn't say so.
Yes, that is w
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70155
--- Comment #1 from Uroš Bizjak ---
This can be tweaked in processor_cost table.
However, is SSE move really faster? Cost tables doesn't say so.
