[Bug target/63359] aarch64: 32bit registers in inline asm

2020-06-15 Thread andysem at mail dot ru
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 andysem at mail dot ru changed: What|Removed |Added CC||andysem at mail dot ru --- Comme

[Bug target/63359] aarch64: 32bit registers in inline asm

2016-06-23 Thread nsz at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 nsz at gcc dot gnu.org changed: What|Removed |Added CC||nsz at gcc dot gnu.org --- Comme

[Bug target/63359] aarch64: 32bit registers in inline asm

2016-06-23 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 --- Comment #12 from Richard Earnshaw --- We considered that, but it won't work. For example, in ILP32 address registers need to use the X form, but are still 32-bits in size. There are other cases as well where a W or X form is required but th

[Bug target/63359] aarch64: 32bit registers in inline asm

2016-06-23 Thread gcc.hall at gmail dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 --- Comment #11 from Jeremy --- int32_t n; asm( "str %1,[%0],#4" : "+r" (ptr) : "r" (n) : "memory" ); Caught me until I just happened to examine the assembler. Of course %w1 works - but then I need SEPARATE code for 32-bit ARM and for aarch64.

[Bug target/63359] aarch64: 32bit registers in inline asm

2016-01-13 Thread pinskia at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 Andrew Pinski changed: What|Removed |Added Keywords||documentation --- Comment #10 from Andre

[Bug target/63359] aarch64: 32bit registers in inline asm

2014-09-24 Thread james.molloy at arm dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 --- Comment #9 from James Molloy --- OK, given your second example I agree that the usecase isn't quite as pathological as I thought. > I'm not saying I'll never accept a warning for this sort of code; but I'd need convincing that it won't undul

[Bug target/63359] aarch64: 32bit registers in inline asm

2014-09-24 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 --- Comment #8 from Richard Earnshaw --- (In reply to James Molloy from comment #6) > Good example, although I might argue slightly pathological. > Agreed, this is somewhat pathological, but I only need to find one valid counter-example :-) Fu

[Bug target/63359] aarch64: 32bit registers in inline asm

2014-09-24 Thread glisse at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 --- Comment #7 from Marc Glisse --- (In reply to Richard Earnshaw from comment #3) > I'm not so sure about a warning, however. I could envisage cases where the > warning would be incorrect and avoiding it would lead to code pessimisation. I don

[Bug target/63359] aarch64: 32bit registers in inline asm

2014-09-24 Thread james.molloy at arm dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 --- Comment #6 from James Molloy --- Good example, although I might argue slightly pathological. So in this case currently, GCC doesn't even implicitly promote the argument, just uses it as-is. It seems a very dangerous behaviour to have as defa

[Bug target/63359] aarch64: 32bit registers in inline asm

2014-09-24 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 --- Comment #5 from Richard Earnshaw --- So consider: int f(int i){ long x; asm("lsl %0, %1, 33" : "=r"(x) : "r"(i)); // lshift by more than sizeof(int) return x; } We really don't care about the top bits in i, so we don't want to extend

[Bug target/63359] aarch64: 32bit registers in inline asm

2014-09-24 Thread james.molloy at arm dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 --- Comment #4 from James Molloy --- Hi Richard, My two-pennyworth for what it's worth - we've had several people with broken code tripped by this bug, and Apple have reported seeing the same thing with their internal codebases. This one seems o

[Bug target/63359] aarch64: 32bit registers in inline asm

2014-09-24 Thread rearnsha at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 Richard Earnshaw changed: What|Removed |Added Status|UNCONFIRMED |NEW Last reconfirmed|

[Bug target/63359] aarch64: 32bit registers in inline asm

2014-09-24 Thread glisse at gcc dot gnu.org
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 --- Comment #2 from Marc Glisse --- (In reply to James Molloy from comment #1) > > Besides, clang rejects it, so please find a common syntax... > > It shouldn't. The "w" modifier should have been supported since clang 3.4, > and is certainly sup

[Bug target/63359] aarch64: 32bit registers in inline asm

2014-09-24 Thread james.molloy at arm dot com
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63359 James Molloy changed: What|Removed |Added CC||james.molloy at arm dot com --- Comment #