[Bug target/14552] compiled trivial vector intrinsic code is ineffiencent

2005-11-21 Thread pluto at agmk dot net
--- Comment #16 from pluto at agmk dot net 2005-11-21 11:29 --- without Uros' mmx-patch the gcc-4.1.0-20051113 generates amazing code: (gcc -O3 -march=pentium3 -S -fomit-frame-pointer pr14552.c) test: subl$20, %esp movlw, %eax movlw+4, %edx movl

[Bug target/14552] compiled trivial vector intrinsic code is ineffiencent

2005-09-15 Thread uros at kss-loka dot si
--- Additional Comments From uros at kss-loka dot si 2005-09-15 11:39 --- (In reply to comment #14) > Yes, it does not work when configuring gcc with --with-cpu=pentium4 see PR 19161. No, the patch works OK for pentium4. The remaining problem is in optimize_mode_switching() function.

[Bug target/14552] compiled trivial vector intrinsic code is ineffiencent

2005-09-13 Thread pinskia at gcc dot gnu dot org
--- Additional Comments From pinskia at gcc dot gnu dot org 2005-09-13 21:13 --- (In reply to comment #13) > Are there remaining issues with them? Yes, it does not work when configuring gcc with --with-cpu=pentium4 see PR 19161. -- What|Removed |Add

[Bug target/14552] compiled trivial vector intrinsic code is ineffiencent

2005-09-13 Thread fjahanian at apple dot com
--- Additional Comments From fjahanian at apple dot com 2005-09-13 21:09 --- Hello, What is the status of Uros's patches in: http://gcc.gnu.org/ml/gcc-patches/2005-07/msg01128.html Looks like they did not make it to FSF mainline? Are there remaining issues with them? -- http://

[Bug target/14552] compiled trivial vector intrinsic code is ineffiencent

2005-07-21 Thread uros at kss-loka dot si
--- Additional Comments From uros at kss-loka dot si 2005-07-21 08:42 --- You can patch the mainline 4.1 compiler with the patch at http://gcc.gnu.org/ml/gcc-patches/2005-07/msg01128.html. Patch (which is currently awaiting a review) will make gcc to produce optimal code: 'gcc -O2 -mm

[Bug target/14552] compiled trivial vector intrinsic code is ineffiencent

2005-06-22 Thread uros at kss-loka dot si
--- Additional Comments From uros at kss-loka dot si 2005-06-22 10:14 --- Just for fun, I have compiled the testcase with MMX/x87 mode switching patch included, to check MMX vector extensions. This little patch is needed to enable MMX vector extensions (only MMX vector add expander is

[Bug target/14552] compiled trivial vector intrinsic code is ineffiencent

2005-04-04 Thread pinskia at gcc dot gnu dot org
-- What|Removed |Added Target Milestone|4.1.0 |--- http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14552

[Bug target/14552] compiled trivial vector intrinsic code is ineffiencent

2005-01-18 Thread rth at gcc dot gnu dot org
--- Additional Comments From rth at gcc dot gnu dot org 2005-01-18 11:34 --- No, Andrew, mainline is not plainly wrong. We are correctly not using the MMX unit when is not in use. The instruction selection thing can still be seen with the SSE unit though, if you widen the vectors to

[Bug target/14552] compiled trivial vector intrinsic code is ineffiencent

2005-01-12 Thread pinskia at gcc dot gnu dot org
-- Bug 14552 depends on bug 19391, which changed state. Bug 19391 Summary: [4.0 Regression] missed optimization with size of 8 vectors http://gcc.gnu.org/bugzilla/show_bug.cgi?id=19391 What|Old Value |New Value --

[Bug target/14552] compiled trivial vector intrinsic code is ineffiencent

2005-01-11 Thread pinskia at gcc dot gnu dot org
-- What|Removed |Added BugsThisDependsOn||19391 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=14552

[Bug target/14552] compiled trivial vector intrinsic code is ineffiencent

2005-01-11 Thread pinskia at gcc dot gnu dot org
--- Additional Comments From pinskia at gcc dot gnu dot org 2005-01-12 06:26 --- I will have to file a new bug for this as we produce so much worse code now on the mainline but that is because we expand the + to do it all four times instead of using the sse/mmx unit which is just plai