https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119368
--- Comment #5 from Jan Hubicka ---
Thinking of it more, I think enabling memory alternatives in
(define_insn "sse4_1_v4hiv4si2"
[(set (match_operand:V4SI 0 "register_operand" "=Yr,*x,v")
(any_extend:V4SI
(vec_select:V4HI
(m
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119368
Sam James changed:
What|Removed |Added
Last reconfirmed||2025-03-24
Status|UNCONFIRMED
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119368
--- Comment #2 from Jan Hubicka ---
On this combiner fails to match:
Failed to match this instruction:
(set (subreg:V4SI (reg:V2DI 101 [ ]) 0)
(sign_extend:V4SI (vec_select:V4HI (mem:V8HI (reg:DI 106) [0 *x_3(D)+0 S16
A128])
(p
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119368
--- Comment #4 from Hongtao Liu ---
>
> But for this case, I think targetm.can_change_mode_class (op_mode,
> result_mode, ALL_REGS) is not needed since it's memory.
I mean case in #c1, for case in #c0, it's more complicated.
1. It's also rela
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119368
Hongtao Liu changed:
What|Removed |Added
CC||liuhongt at gcc dot gnu.org
--- Comment #
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119368
Alexander Monakov changed:
What|Removed |Added
CC||amonakov at gcc dot gnu.org
--- Com
