[Bug target/118057] RISC-V: Can't vectorize load and store with zvl128b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118057 --- Comment #8 from Jeffrey A. Law --- This is really a costing issue. Some designs (such as Ventana's) strided access can be very profitable, particularly for a relatively small stride. On others it may be considerably worse. Point being som

[Bug target/118057] RISC-V: Can't vectorize load and store with zvl128b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118057 Andrew Waterman changed: What|Removed |Added CC||andrew at sifive dot com --- Comment

[Bug target/118057] RISC-V: Can't vectorize load and store with zvl128b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118057 --- Comment #6 from Robin Dapp --- (In reply to Richard Biener from comment #5) > I would expect this to be always slower when vectorized unless the core is > seriously bottle-necked on the frontend. The loads/stores need to be > decomposed to

[Bug target/118057] RISC-V: Can't vectorize load and store with zvl128b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118057 Richard Biener changed: What|Removed |Added Target||riscv --- Comment #5 from Richard Bien

[Bug target/118057] RISC-V: Can't vectorize load and store with zvl128b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118057 --- Comment #4 from rdapp.gcc at gmail dot com --- > https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118057 > > --- Comment #3 from JuzheZhong --- > (In reply to Robin Dapp from comment #2) >> I think depending on the performance of strided loads/s

[Bug target/118057] RISC-V: Can't vectorize load and store with zvl128b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118057 --- Comment #3 from JuzheZhong --- (In reply to Robin Dapp from comment #2) > I think depending on the performance of strided loads/stores this can be > profitable to vectorize. Looks like we need loop versioning to account for > the possible a

[Bug target/118057] RISC-V: Can't vectorize load and store with zvl128b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118057 --- Comment #2 from Robin Dapp --- I think depending on the performance of strided loads/stores this can be profitable to vectorize. Looks like we need loop versioning to account for the possible aliasing but once this is out of the way we coul

[Bug target/118057] RISC-V: Can't vectorize load and store with zvl128b

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=118057 --- Comment #1 from JuzheZhong --- https://godbolt.org/z/q1E6dn6T9 Try -fno-vect-cost-model, it can be vectorized. I think both Clang and GCC (with no cost vect model) vectorized code can't give better performance in a wide-issue OOO superscal