https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102169
Segher Boessenkool changed:
What|Removed |Added
Resolution|--- |DUPLICATE
Status|NEW
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102169
Carl Love changed:
What|Removed |Added
CC||carll at gcc dot gnu.org
--- Comment #5 fro
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102169
HaoChen Gui changed:
What|Removed |Added
CC||guihaoc at gcc dot gnu.org
--- Comment #4
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102169
--- Comment #3 from Peter Bergner ---
It's interesting that VSX reg costs is 4000, but the FPR and Altivec regs are
cost zero like GPRs. I wonder why that is. These look like d-form memory
accesses and we don't have d-form Altivec memory ops,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102169
--- Comment #2 from Peter Bergner ---
So we have the following during IRA:
(insn 7 2 8 2 (set (reg:SI 120 [ barD.3297 ])
(mem/c:SI (plus:DI (unspec:DI [
(symbol_ref:DI ("*.LANCHOR0") [flags 0x182])
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102169
Segher Boessenkool changed:
What|Removed |Added
CC||segher at gcc dot gnu.org
Ever
