https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
Jeffrey A. Law changed:
What|Removed |Added
Status|ASSIGNED|RESOLVED
Resolution|---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
afomin at gcc dot gnu.org changed:
What|Removed |Added
CC||afomin at gcc dot gnu.org
---
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
--- Comment #16 from Richard Henderson ---
Author: rth
Date: Wed Mar 2 21:09:54 2016
New Revision: 233916
URL: https://gcc.gnu.org/viewcvs?rev=233916&root=gcc&view=rev
Log:
PR rtl-opt/67145
* simplify-rtx.c (simplify_plus_minus): Allow reass
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
--- Comment #15 from Segher Boessenkool ---
Thanks Richard, that is a much safer solution for now.
FWIW, your original patch regressed at least code generation for
0xULL - a on powerpc (-m32), and various other
things change (al
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
--- Comment #14 from Jeffrey A. Law ---
Alexander,
Can you comment on how serious this regression is for whatever benchmark your
test was derived from?
Can you also indicate whether or not similar issues have been seen with x86_64
(the report
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
--- Comment #13 from Richard Henderson ---
I can clean up the rs6000 some more to avoid some objections
that Segher raised -- by-hand rtl generation etc.
Or, I've just about finished testing the simplify-rtx-only
patch suggested in
https://gc
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
--- Comment #12 from Jakub Jelinek ---
I'm with rth here, I think we should apply his patch.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
Jeffrey A. Law changed:
What|Removed |Added
CC||law at redhat dot com,
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
Richard Henderson changed:
What|Removed |Added
Status|NEW |ASSIGNED
--- Comment #10 from Richar
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
--- Comment #9 from Richard Henderson ---
For x86, we have one pattern, and it has things in the correct order.
For aarch64, the only correct pattern is add3_carryin_alt2.
The nesting and canonicalization of all the others are bogus.
But powerp
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
Jakub Jelinek changed:
What|Removed |Added
CC||rth at gcc dot gnu.org
--- Comment #8 fr
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
--- Comment #7 from Alan Modra ---
See https://gcc.gnu.org/ml/gcc-patches/2015-05/msg02055.html
The patch proposed here will again "simplify"
(plus:DI (plus:DI (reg:DI 165 [ val+8 ])
(reg:DI 169 [+8 ]))
(reg:DI 76 ca))
to this
(pl
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
--- Comment #6 from Yuri Rumyantsev ---
We checked that proposed patch does not introduce new performance regression
and I will prepare it for review after bootstrapping and regression testing
completion, likely tomorrow.
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
Jakub Jelinek changed:
What|Removed |Added
CC||jakub at gcc dot gnu.org
--- Comment #5
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
Richard Biener changed:
What|Removed |Added
Keywords||missed-optimization
Priority|
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
--- Comment #4 from Yuri Rumyantsev ---
I attached simple non-tested patch which restores performance on x86. This
change is no perfect but using it I noticed 2%-6% speed-up on 32-bit x86
platform. The idea of patch is very simple - we do not bai
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67145
--- Comment #3 from Yuri Rumyantsev ---
Created attachment 37120
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=37120&action=edit
non-tested patch
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