[Bug rtl-optimization/110573] branch delay slots are not filled with atomic stores

2023-07-06 Thread pinskia at gcc dot gnu.org via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110573 --- Comment #6 from Andrew Pinski --- (In reply to Luke Geeson from comment #4) > I understand treating atomics as volatile has historical precedent but a > case can be made, at least on modern architectures and with improved > understanding of

[Bug rtl-optimization/110573] branch delay slots are not filled with atomic stores

2023-07-06 Thread luke.geeson at cs dot ucl.ac.uk via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110573 --- Comment #5 from Luke Geeson --- For the record the %registers are symbolic - simply replace them with concrete ones containing the location x,y,etc...

[Bug rtl-optimization/110573] branch delay slots are not filled with atomic stores

2023-07-06 Thread luke.geeson at cs dot ucl.ac.uk via Gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110573 --- Comment #4 from Luke Geeson --- Ah so since atomics are treated as volatile (like LLVM) instructions that access them cannot inhabit a delay slot. Is it still valid to treat atomics as volatile? Consider the following MIPS litmus test: ```