--- Comment #5 from amylaar at gcc dot gnu dot org 2009-03-05 00:54 ---
patch is here:
http://gcc.gnu.org/ml/gcc-patches/2009-03/msg00259.html
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amylaar at gcc dot gnu dot org changed:
What|Removed |Added
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--- Comment #4 from amylaar at gcc dot gnu dot org 2009-03-02 18:59 ---
(In reply to comment #3)
> I still don't understand what you mean by that. Do you mean the registers are
> vector based and the instructions effect the conditional register and that
> conditional register has slots
--- Comment #3 from pinskia at gcc dot gnu dot org 2009-03-02 18:19 ---
I still don't understand what you mean by that. Do you mean the registers are
vector based and the instructions effect the conditional register and that
conditional register has slots (elements) that correspond to t
--- Comment #2 from amylaar at gcc dot gnu dot org 2009-03-02 18:16 ---
(In reply to comment #1)
> Is there a reason behind why you want this? SIMD CC modes seems a bit weird
The MXP architecture has a SIMD CC register that is pretty close to CC0.
I.e. some moves and adds can be done w
--- Comment #1 from pinskia at gcc dot gnu dot org 2009-03-02 17:15 ---
Is there a reason behind why you want this? SIMD CC modes seems a bit weird
.
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=39347
