[Bug target/119547] RISC-V: VSETVL mistakenly modified other data

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119547 --- Comment #14 from 曾治金 --- (In reply to Robin Dapp from comment #13) > Hmm, now I compiled with -O3 on top of --param > logical-op-non-short-circuit=0 (which shouldn't actually be necessary or > change anything as it's the default) but there

[Bug target/119547] RISC-V: VSETVL mistakenly modified other data

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119547 --- Comment #11 from 曾治金 --- (In reply to Robin Dapp from comment #10) > > 4. run > > ``` > > export LD_LIBRARY_PATH=//lib > > ./opencv_test_core > > --gtest_filter="Core_ConvertScale/ElemWiseTest.accuracy/0" > > ``` > > [==] Runni

[Bug target/119547] RISC-V: VSETVL mistakenly modified other data

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119547 --- Comment #6 from 曾治金 --- This issue report in https://github.com/opencv/opencv/issues/26936, and I extract it into my test case. I just check the assemble code and don't run the test case. But if you need to run the opencv application to fi

[Bug target/119547] RISC-V: VSETVL mistakenly modified other data

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119547 --- Comment #8 from 曾治金 --- This is my temporary patch and may be it's incorrect. Perhaps I am unable to solve this issue, but I would like to offer this patch as a reference. >From 2068f7493da45d67699de587224510659fe776a7 Mon Sep 17 00:00:00

[Bug target/119547] RISC-V: VSETVL mistakenly modified other data

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119547 --- Comment #7 from 曾治金 --- (In reply to Li Pan from comment #2) > Any information about gcc version? Seems asm layout is different from > today's upstream. CC RISC-V relatives. > > 123 │ .L41: > 124 │ addiw t2,t2,1 > 125 │ v

[Bug target/119547] RISC-V: VSETVL mistakenly modified other data

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119547 --- Comment #3 from 曾治金 --- Hi, it will reproduce by gcc 14.2. And in gcc upstream code, you need to add `--param logical-op-non-short-circuit=0` flag to reproduce. This is because the default value of LOGICAL_OP_NON_SHORT_CIRCUIT of risc-v is c

[Bug target/119547] RISC-V: VSETVL mistakenly modified other data

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119547 曾治金 changed: What|Removed |Added CC||zhijin.zeng at spacemit dot com --- Comment #4 fr

[Bug target/119547] RISC-V: VSETVL mistakenly modified other data

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119547 --- Comment #1 from 曾治金 --- I think this issue has nothing to do with the logical-op-non-short-circuit parameter and it is a bug of risc-v vsetvl pass. The risc-v vsetvl pass use lcm algorithm to find the suitable place to insert vsetvl instruct

[Bug target/119547] New: RISC-V: VSETVL mistakenly modified other data

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=119547 Bug ID: 119547 Summary: RISC-V: VSETVL mistakenly modified other data Product: gcc Version: 15.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: ta

[Bug target/116305] RISC-V: dwarf cfi_escape information is incorrect when use vlenb to get scalable frame

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116305 曾治金 changed: What|Removed |Added Resolution|--- |FIXED Status|UNCONFIRMED

[Bug c/116305] New: RISC-V: dwarf cfi_escape information is incorrect when use vlenb to get scalable frame

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116305 Bug ID: 116305 Summary: RISC-V: dwarf cfi_escape information is incorrect when use vlenb to get scalable frame Product: gcc Version: 14.1.1 Status: UNCONFIRMED